1 # $NetBSD: files.tsarm,v 1.12 2020/05/23 13:46:36 jmcneill Exp $ 2 # 3 # First try for arm-specific configuration info 4 # 5 6 file arch/evbarm/tsarm/tsarm_machdep.c 7 8 # EP93xx Processor CPU support 9 include "arch/arm/ep93xx/files.ep93xx" 10 11 attach epsoc at mainbus 12 13 attach epcom at epsoc with epcom_ts 14 file arch/evbarm/tsarm/epcom_ts.c 15 16 define tspldbus {} 17 device tspld: isabus, tspldbus, sysmon_wdog 18 attach tspld at mainbus 19 file arch/evbarm/tsarm/tspld.c tspld 20 21 file arch/evbarm/tsarm/isa/isa_machdep.c isa 22 file arch/evbarm/tsarm/isa/isa_io.c isa 23 file arch/evbarm/tsarm/isa/isa_io_asm.S isa 24 25 attach wdc at tspldbus with wdc_ts 26 file arch/evbarm/tsarm/wdc_ts.c wdc_ts 27 28 device tsrtc: mc146818 29 attach tsrtc at tspldbus 30 file arch/evbarm/tsarm/tsrtc.c tsrtc 31 32 device tslcd: hd44780, wsemuldisplaydev 33 attach tslcd at tspldbus 34 file arch/evbarm/tsarm/tslcd.c tslcd 35 36 device tskp: matrixkp, wskbddev 37 attach tskp at tspldbus 38 file arch/evbarm/tsarm/tskp.c tskp 39 40 # XXXX pcic here because it needs to be late. The catch: pcic needs 41 # to be late, so devices which attach to it are attached late. But it 42 # needs to be before its isa and pci attachments. This answer is 43 # non-optimal, but I don't have a better answer right now. 44 45 # PCIC pcmcia controller 46 # XXX this needs to be done very late, so it's done here. This feels 47 # like a kludge, but it might be for the best. 48 49 defparam PCIC_ISA_ALLOC_IOBASE 50 defparam PCIC_ISA_ALLOC_IOSIZE 51 defparam PCIC_ISA_INTR_ALLOC_MASK 52 53 device pcic: pcmciabus 54 file dev/ic/i82365.c pcic 55 56 # PCIC pcmcia controller on ISA bus. 57 attach pcic at isa with pcic_isa 58 file dev/isa/i82365_isa.c pcic_isa 59 60 # Code common to ISA and ISAPnP attachments 61 file dev/isa/i82365_isasubr.c pcic_isa 62
Indexes created Sat Sep 20 22:09:52 GMT 2025