1 1.3 matt /* $NetBSD: i80321_mainbus.c,v 1.3 2012/02/12 16:31:01 matt Exp $ */ 2 1.1 nonaka 3 1.1 nonaka /* 4 1.1 nonaka * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 1.1 nonaka * All rights reserved. 6 1.1 nonaka * 7 1.1 nonaka * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 1.1 nonaka * 9 1.1 nonaka * Redistribution and use in source and binary forms, with or without 10 1.1 nonaka * modification, are permitted provided that the following conditions 11 1.1 nonaka * are met: 12 1.1 nonaka * 1. Redistributions of source code must retain the above copyright 13 1.1 nonaka * notice, this list of conditions and the following disclaimer. 14 1.1 nonaka * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 nonaka * notice, this list of conditions and the following disclaimer in the 16 1.1 nonaka * documentation and/or other materials provided with the distribution. 17 1.1 nonaka * 3. All advertising materials mentioning features or use of this software 18 1.1 nonaka * must display the following acknowledgement: 19 1.1 nonaka * This product includes software developed for the NetBSD Project by 20 1.1 nonaka * Wasabi Systems, Inc. 21 1.1 nonaka * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.1 nonaka * or promote products derived from this software without specific prior 23 1.1 nonaka * written permission. 24 1.1 nonaka * 25 1.1 nonaka * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.1 nonaka * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.1 nonaka * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.1 nonaka * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.1 nonaka * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.1 nonaka * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.1 nonaka * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.1 nonaka * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.1 nonaka * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.1 nonaka * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.1 nonaka * POSSIBILITY OF SUCH DAMAGE. 36 1.1 nonaka */ 37 1.1 nonaka 38 1.1 nonaka #include <sys/cdefs.h> 39 1.3 matt __KERNEL_RCSID(0, "$NetBSD: i80321_mainbus.c,v 1.3 2012/02/12 16:31:01 matt Exp $"); 40 1.1 nonaka 41 1.1 nonaka #include <sys/param.h> 42 1.1 nonaka #include <sys/systm.h> 43 1.1 nonaka #include <sys/device.h> 44 1.1 nonaka 45 1.1 nonaka #include <machine/autoconf.h> 46 1.2 dyoung #include <sys/bus.h> 47 1.1 nonaka 48 1.1 nonaka #include <evbarm/hdl_g/hdlgreg.h> 49 1.1 nonaka #include <evbarm/hdl_g/hdlgvar.h> 50 1.1 nonaka 51 1.1 nonaka #include <arm/xscale/i80321reg.h> 52 1.1 nonaka #include <arm/xscale/i80321var.h> 53 1.1 nonaka 54 1.1 nonaka #include <dev/pci/pcireg.h> 55 1.1 nonaka #include <dev/pci/pcidevs.h> 56 1.1 nonaka 57 1.3 matt int hdlg_mainbus_match(device_t, cfdata_t, void *); 58 1.3 matt void hdlg_mainbus_attach(device_t, device_t, void *); 59 1.1 nonaka 60 1.3 matt CFATTACH_DECL_NEW(iopxs_mainbus, sizeof(struct i80321_softc), 61 1.1 nonaka hdlg_mainbus_match, hdlg_mainbus_attach, NULL, NULL); 62 1.1 nonaka 63 1.1 nonaka /* There can be only one. */ 64 1.1 nonaka int hdlg_mainbus_found; 65 1.1 nonaka 66 1.1 nonaka int 67 1.3 matt hdlg_mainbus_match(device_t parent, cfdata_t cf, void *aux) 68 1.1 nonaka { 69 1.1 nonaka 70 1.1 nonaka if (hdlg_mainbus_found) 71 1.1 nonaka return 0; 72 1.1 nonaka return 1; 73 1.1 nonaka } 74 1.1 nonaka 75 1.1 nonaka void 76 1.3 matt hdlg_mainbus_attach(device_t parent, device_t self, void *aux) 77 1.1 nonaka { 78 1.3 matt struct i80321_softc *sc = device_private(self); 79 1.1 nonaka pcireg_t b0u, b0l, b1u, b1l; 80 1.1 nonaka paddr_t memstart; 81 1.1 nonaka psize_t memsize; 82 1.1 nonaka 83 1.1 nonaka hdlg_mainbus_found = 1; 84 1.3 matt sc->sc_dev = self; 85 1.1 nonaka 86 1.1 nonaka /* 87 1.1 nonaka * Fill in the space tag for the i80321's own devices, 88 1.1 nonaka * and hand-craft the space handle for it (the device 89 1.1 nonaka * was mapped during early bootstrap). 90 1.1 nonaka */ 91 1.1 nonaka i80321_bs_init(&i80321_bs_tag, sc); 92 1.1 nonaka sc->sc_st = &i80321_bs_tag; 93 1.1 nonaka sc->sc_sh = HDLG_80321_VBASE; 94 1.1 nonaka 95 1.1 nonaka /* 96 1.1 nonaka * Slice off a subregion for the Memory Controller -- we need it 97 1.1 nonaka * here in order read the memory size. 98 1.1 nonaka */ 99 1.1 nonaka if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE, 100 1.1 nonaka VERDE_MCU_SIZE, &sc->sc_mcu_sh)) 101 1.1 nonaka panic("%s: unable to subregion MCU registers", 102 1.3 matt device_xname(sc->sc_dev)); 103 1.1 nonaka 104 1.1 nonaka if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE, 105 1.1 nonaka VERDE_ATU_SIZE, &sc->sc_atu_sh)) 106 1.1 nonaka panic("%s: unable to subregion ATU registers", 107 1.3 matt device_xname(sc->sc_dev)); 108 1.1 nonaka 109 1.1 nonaka /* 110 1.1 nonaka * We have mapped the PCI I/O windows in the early bootstrap phase. 111 1.1 nonaka */ 112 1.1 nonaka sc->sc_iow_vaddr = HDLG_IOW_VBASE; 113 1.1 nonaka 114 1.1 nonaka /* 115 1.1 nonaka * Check the configuration of the ATU to see if another BIOS 116 1.1 nonaka * has configured us. If a PC BIOS didn't configure us, then: 117 1.1 nonaka * IQ80321: BAR0 00000000.0000000c BAR1 is 00000000.8000000c. 118 1.1 nonaka * IQ31244: BAR0 00000000.00000004 BAR1 is 00000000.0000000c. 119 1.1 nonaka * If a BIOS has configured us, at least one of those should be 120 1.1 nonaka * different. This is pretty fragile, but it's not clear what 121 1.1 nonaka * would work better. 122 1.1 nonaka */ 123 1.1 nonaka b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0); 124 1.1 nonaka b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4); 125 1.1 nonaka b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8); 126 1.1 nonaka b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc); 127 1.1 nonaka b0l &= PCI_MAPREG_MEM_ADDR_MASK; 128 1.1 nonaka b0u &= PCI_MAPREG_MEM_ADDR_MASK; 129 1.1 nonaka b1l &= PCI_MAPREG_MEM_ADDR_MASK; 130 1.1 nonaka b1u &= PCI_MAPREG_MEM_ADDR_MASK; 131 1.1 nonaka 132 1.1 nonaka if ((b0u != b1u) || (b0l != 0) || ((b1l & ~0x80000000U) != 0)) 133 1.1 nonaka sc->sc_is_host = 0; 134 1.1 nonaka else 135 1.1 nonaka sc->sc_is_host = 1; 136 1.1 nonaka 137 1.1 nonaka aprint_naive(": i80219 I/O Processor\n"); 138 1.1 nonaka aprint_normal(": i80219 I/O Processor, acting as PCI %s\n", 139 1.1 nonaka sc->sc_is_host ? "host" : "slave"); 140 1.1 nonaka 141 1.3 matt i80321_intr_evcnt_attach(); 142 1.3 matt 143 1.1 nonaka i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize); 144 1.1 nonaka 145 1.1 nonaka /* 146 1.1 nonaka * We set up the Inbound Windows as follows: 147 1.1 nonaka * 148 1.1 nonaka * 0 Access to i80219 PMMRs 149 1.1 nonaka * 150 1.1 nonaka * 1 Reserve space for private devices 151 1.1 nonaka * 152 1.1 nonaka * 2 RAM access 153 1.1 nonaka * 154 1.1 nonaka * 3 Unused. 155 1.1 nonaka * 156 1.1 nonaka * This chunk needs to be customized for each IOP321 application. 157 1.1 nonaka */ 158 1.1 nonaka #if 0 159 1.1 nonaka sc->sc_iwin[0].iwin_base_lo = VERDE_PMMR_BASE; 160 1.1 nonaka sc->sc_iwin[0].iwin_base_hi = 0; 161 1.1 nonaka sc->sc_iwin[0].iwin_xlate = VERDE_PMMR_BASE; 162 1.1 nonaka sc->sc_iwin[0].iwin_size = VERDE_PMMR_SIZE; 163 1.1 nonaka #endif 164 1.1 nonaka 165 1.1 nonaka if (sc->sc_is_host) { 166 1.1 nonaka /* Map PCI:Local 1:1. */ 167 1.1 nonaka sc->sc_iwin[1].iwin_base_lo = VERDE_OUT_XLATE_MEM_WIN0_BASE | 168 1.1 nonaka PCI_MAPREG_MEM_PREFETCHABLE_MASK | 169 1.1 nonaka PCI_MAPREG_MEM_TYPE_64BIT; 170 1.1 nonaka sc->sc_iwin[1].iwin_base_hi = 0; 171 1.1 nonaka } else { 172 1.1 nonaka sc->sc_iwin[1].iwin_base_lo = 0; 173 1.1 nonaka sc->sc_iwin[1].iwin_base_hi = 0; 174 1.1 nonaka } 175 1.1 nonaka sc->sc_iwin[1].iwin_xlate = VERDE_OUT_XLATE_MEM_WIN0_BASE; 176 1.1 nonaka sc->sc_iwin[1].iwin_size = VERDE_OUT_XLATE_MEM_WIN_SIZE; 177 1.1 nonaka 178 1.1 nonaka if (sc->sc_is_host) { 179 1.1 nonaka sc->sc_iwin[2].iwin_base_lo = memstart | 180 1.1 nonaka PCI_MAPREG_MEM_PREFETCHABLE_MASK | 181 1.1 nonaka PCI_MAPREG_MEM_TYPE_64BIT; 182 1.1 nonaka sc->sc_iwin[2].iwin_base_hi = 0; 183 1.1 nonaka } else { 184 1.1 nonaka sc->sc_iwin[2].iwin_base_lo = 0; 185 1.1 nonaka sc->sc_iwin[2].iwin_base_hi = 0; 186 1.1 nonaka } 187 1.1 nonaka sc->sc_iwin[2].iwin_xlate = memstart; 188 1.1 nonaka sc->sc_iwin[2].iwin_size = memsize; 189 1.1 nonaka 190 1.1 nonaka if (sc->sc_is_host) { 191 1.1 nonaka sc->sc_iwin[3].iwin_base_lo = 0 | 192 1.1 nonaka PCI_MAPREG_MEM_PREFETCHABLE_MASK | 193 1.1 nonaka PCI_MAPREG_MEM_TYPE_64BIT; 194 1.1 nonaka } else { 195 1.1 nonaka sc->sc_iwin[3].iwin_base_lo = 0; 196 1.1 nonaka } 197 1.1 nonaka sc->sc_iwin[3].iwin_base_hi = 0; 198 1.1 nonaka sc->sc_iwin[3].iwin_xlate = 0; 199 1.1 nonaka sc->sc_iwin[3].iwin_size = 0; 200 1.1 nonaka 201 1.1 nonaka /* 202 1.1 nonaka * We set up the Outbound Windows as follows: 203 1.1 nonaka * 204 1.1 nonaka * 0 Access to private PCI space. 205 1.1 nonaka * 206 1.1 nonaka * 1 Unused. 207 1.1 nonaka */ 208 1.1 nonaka sc->sc_owin[0].owin_xlate_lo = 209 1.1 nonaka PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo); 210 1.1 nonaka sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi; 211 1.1 nonaka 212 1.1 nonaka /* 213 1.1 nonaka * Set the Secondary Outbound I/O window to map 214 1.1 nonaka * to PCI address 0 for all 64K of the I/O space. 215 1.1 nonaka */ 216 1.1 nonaka sc->sc_ioout_xlate = 0; 217 1.1 nonaka sc->sc_ioout_xlate_offset = 0x1000; 218 1.1 nonaka 219 1.1 nonaka /* 220 1.1 nonaka * Initialize the interrupt part of our PCI chipset tag. 221 1.1 nonaka */ 222 1.1 nonaka hdlg_pci_init(&sc->sc_pci_chipset, sc); 223 1.1 nonaka 224 1.1 nonaka i80321_attach(sc); 225 1.1 nonaka } 226