1 /* $NetBSD: isa_io_asm.S,v 1.3 2008/04/28 20:23:17 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jesse Off. 9 * 10 * This code is derived from software contributed to The NetBSD Foundation 11 * by Mark Brinicombe. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright 1997 37 * Digital Equipment Corporation. All rights reserved. 38 * 39 * This software is furnished under license and may be used and 40 * copied only in accordance with the following terms and conditions. 41 * Subject to these conditions, you may download, copy, install, 42 * use, modify and distribute this software in source and/or binary 43 * form. No title or ownership is transferred hereby. 44 * 45 * 1) Any source code used, modified or distributed must reproduce 46 * and retain this copyright notice and list of conditions as 47 * they appear in the source file. 48 * 49 * 2) No right is granted to use any trade name, trademark, or logo of 50 * Digital Equipment Corporation. Neither the "Digital Equipment 51 * Corporation" name nor any trademark or logo of Digital Equipment 52 * Corporation may be used to endorse or promote products derived 53 * from this software without the prior written permission of 54 * Digital Equipment Corporation. 55 * 56 * 3) This software is provided "AS-IS" and any express or implied 57 * warranties, including but not limited to, any implied warranties 58 * of merchantability, fitness for a particular purpose, or 59 * non-infringement are disclaimed. In no event shall DIGITAL be 60 * liable for any damages whatsoever, and in particular, DIGITAL 61 * shall not be liable for special, indirect, consequential, or 62 * incidental damages or damages for lost profits, loss of 63 * revenue or loss of use, whether such damages arise in contract, 64 * negligence, tort, under statute, in equity, at law or otherwise, 65 * even if advised of the possibility of such damage. 66 */ 67 68 /* 69 * bus_space I/O functions for isa 70 */ 71 72 #include <machine/asm.h> 73 74 #ifdef GPROF 75 #define PAUSE nop ; nop ; nop ; nop ; nop 76 #else 77 #define PAUSE 78 #endif 79 80 /* 81 * Note these functions use ARM Architecture V4 instructions as 82 * all current systems with ISA will be using processors that support 83 * V4 or later architectures (SHARK & CATS & TS7XXX) 84 */ 85 86 /* 87 * read single 88 */ 89 90 ENTRY(isa_bs_r_1) 91 sub r1, r1, #0x4000000 /* 8 bit space is 64Mb below in VA */ 92 ldrb r0, [r1, r2] 93 PAUSE 94 mov pc, lr 95 96 ENTRY(isa_bs_r_2) 97 ldrh r0, [r1, r2] 98 PAUSE 99 mov pc, lr 100 101 ENTRY(isa_bs_r_4) 102 ldr r0, [r1, r2] 103 PAUSE 104 mov pc, lr 105 106 /* 107 * read multiple. 108 */ 109 110 ENTRY(isa_bs_rm_1) 111 add r0, r1, r2 112 mov r1, r3 113 sub r0, r0, #0x4000000 /* 8 bit space is 64Mb below in VA */ 114 ldr r2, [sp, #0] 115 teq r2, #0 116 moveq pc, lr 117 118 Lisa_rm_1_loop: 119 ldrb r3, [r0] 120 strb r3, [r1], #1 121 subs r2, r2, #1 122 bne Lisa_rm_1_loop 123 124 mov pc, lr 125 126 ENTRY(isa_bs_rm_2) 127 add r0, r1, r2 128 mov r1, r3 129 ldr r2, [sp, #0] 130 teq r2, #0 131 moveq pc, lr 132 133 Lisa_rm_2_loop: 134 ldrh r3, [r0] 135 strh r3, [r1], #2 136 subs r2, r2, #1 137 bne Lisa_rm_2_loop 138 139 mov pc, lr 140 141 ENTRY(isa_bs_rm_4) 142 add r0, r1, r2 143 mov r1, r3 144 ldr r2, [sp, #0] 145 teq r2, #0 146 moveq pc, lr 147 148 Lisa_rm_4_loop: 149 ldr r3, [r0] 150 str r3, [r1], #4 151 subs r2, r2, #1 152 bne Lisa_rm_4_loop 153 154 mov pc, lr 155 156 /* 157 * read region. 158 */ 159 160 ENTRY(isa_bs_rr_1) 161 add r0, r1, r2 162 mov r1, r3 163 sub r0, r0, #0x4000000 /* 8 bit space is 64Mb below in VA */ 164 ldr r2, [sp, #0] 165 teq r2, #0 166 moveq pc, lr 167 168 Lisa_rr_1_loop: 169 ldrb r3, [r0], #1 170 strb r3, [r1], #1 171 subs r2, r2, #1 172 bne Lisa_rr_1_loop 173 174 mov pc, lr 175 176 ENTRY(isa_bs_rr_2) 177 add r0, r1, r2 178 mov r1, r3 179 ldr r2, [sp, #0] 180 teq r2, #0 181 moveq pc, lr 182 183 Lisa_rr_2_loop: 184 ldrh r3, [r0], #2 185 strh r3, [r1], #2 186 subs r2, r2, #1 187 bne Lisa_rr_2_loop 188 189 mov pc, lr 190 191 ENTRY(isa_bs_rr_4) 192 add r0, r1, r2 193 mov r1, r3 194 ldr r2, [sp, #0] 195 teq r2, #0 196 moveq pc, lr 197 198 Lisa_rr_4_loop: 199 ldr r3, [r0], #4 200 str r3, [r1], #4 201 subs r2, r2, #1 202 bne Lisa_rr_4_loop 203 204 mov pc, lr 205 206 /* 207 * write single 208 */ 209 210 ENTRY(isa_bs_w_1) 211 sub r1, r1, #0x4000000 /* 8 bit space is 64Mb below in VA */ 212 strb r3, [r1, r2] 213 PAUSE 214 mov pc, lr 215 216 ENTRY(isa_bs_w_2) 217 strh r3, [r1, r2] 218 PAUSE 219 mov pc, lr 220 221 ENTRY(isa_bs_w_4) 222 str r3, [r1, r2] 223 PAUSE 224 mov pc, lr 225 226 /* 227 * write multiple 228 */ 229 230 ENTRY(isa_bs_wm_1) 231 add r0, r1, r2 232 mov r1, r3 233 sub r0, r0, #0x4000000 /* 8 bit space is 64Mb below in VA */ 234 ldr r2, [sp, #0] 235 teq r2, #0 236 moveq pc, lr 237 238 Lisa_wm_1_loop: 239 ldrb r3, [r1], #1 240 strb r3, [r0] 241 subs r2, r2, #1 242 bne Lisa_wm_1_loop 243 244 mov pc, lr 245 246 ENTRY(isa_bs_wm_2) 247 add r0, r1, r2 248 mov r1, r3 249 ldr r2, [sp, #0] 250 teq r2, #0 251 moveq pc, lr 252 253 Lisa_wm_2_loop: 254 ldrh r3, [r1], #2 255 strh r3, [r0] 256 subs r2, r2, #1 257 bne Lisa_wm_2_loop 258 259 mov pc, lr 260 261 ENTRY(isa_bs_wm_4) 262 add r0, r1, r2 263 mov r1, r3 264 ldr r2, [sp, #0] 265 teq r2, #0 266 moveq pc, lr 267 268 Lisa_wm_4_loop: 269 ldr r3, [r1], #4 270 str r3, [r0] 271 subs r2, r2, #1 272 bne Lisa_wm_4_loop 273 274 mov pc, lr 275 276 277 /* 278 * write region. 279 */ 280 281 ENTRY(isa_bs_wr_1) 282 add r0, r1, r2 283 mov r1, r3 284 sub r0, r0, #0x4000000 /* 8 bit space is 64Mb below in VA */ 285 ldr r2, [sp, #0] 286 teq r2, #0 287 moveq pc, lr 288 289 Lisa_wr_1_loop: 290 ldrb r3, [r1], #1 291 strb r3, [r0], #1 292 subs r2, r2, #1 293 bne Lisa_wr_1_loop 294 295 mov pc, lr 296 297 ENTRY(isa_bs_wr_2) 298 add r0, r1, r2 299 mov r1, r3 300 ldr r2, [sp, #0] 301 teq r2, #0 302 moveq pc, lr 303 304 Lisa_wr_2_loop: 305 ldrh r3, [r1], #2 306 strh r3, [r0], #2 307 subs r2, r2, #1 308 bne Lisa_wr_2_loop 309 310 mov pc, lr 311 312 ENTRY(isa_bs_wr_4) 313 add r0, r1, r2 314 mov r1, r3 315 ldr r2, [sp, #0] 316 teq r2, #0 317 moveq pc, lr 318 319 Lisa_wr_4_loop: 320 ldr r3, [r1], #4 321 str r3, [r0], #4 322 subs r2, r2, #1 323 bne Lisa_wr_4_loop 324 325 mov pc, lr 326 327 /* 328 * Set region 329 */ 330 331 ENTRY(isa_bs_sr_2) 332 add r0, r1, r2 333 mov r1, r3 334 ldr r2, [sp, #0] 335 teq r2, #0 336 moveq pc, lr 337 338 Lisa_bs_sr_2_loop: 339 strh r1, [r0], #2 340 subs r2, r2, #1 341 bne Lisa_bs_sr_2_loop 342 343 mov pc, lr 344
Indexes created Thu Sep 25 06:09:39 GMT 2025