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      1 /* $NetBSD: mtx-1.c,v 1.9 2020/08/17 07:50:41 simonb Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2006 Itronix Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Garrett D'Amore for Itronix Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. The name of Itronix Inc. may not be used to endorse
     18  *    or promote products derived from this software without specific
     19  *    prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
     25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     28  * ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #include <sys/cdefs.h>
     35 __KERNEL_RCSID(0, "$NetBSD: mtx-1.c,v 1.9 2020/08/17 07:50:41 simonb Exp $");
     36 
     37 #include <sys/param.h>
     38 #include <sys/bus.h>
     39 #include <sys/cpu.h>
     40 
     41 #include <mips/locore.h>
     42 
     43 #include <evbmips/alchemy/obiovar.h>
     44 #include <evbmips/alchemy/board.h>
     45 
     46 #define	MTX1_RESET	0xE00001C
     47 
     48 #define	GET16(x)	\
     49 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
     50 #define	PUT16(x, v)	\
     51 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
     52 
     53 static void mtx1_init(void);
     54 static int mtx1_pci_intr_map(const struct pci_attach_args *,
     55 				 pci_intr_handle_t *);
     56 static void mtx1_reboot(void);
     57 
     58 static const struct obiodev mtx1_devices[] = {
     59 #if 0
     60 	{ "aupcmcia", -1, -1 },
     61 	{ "auaudio", -1, -1 },
     62 #endif
     63 	{ NULL },
     64 };
     65 
     66 static struct alchemy_board mtx1_info = {
     67 	"4G Systems MTX-1",
     68 	mtx1_devices,
     69 	mtx1_init,
     70 	mtx1_pci_intr_map,
     71 	mtx1_reboot,
     72 	NULL,	/* poweroff */
     73 };
     74 
     75 /* The MTX-1 kernels only support little endian */
     76 CTASSERT(_BYTE_ORDER == _LITTLE_ENDIAN);
     77 
     78 const struct alchemy_board *
     79 board_info(void)
     80 {
     81 
     82 	return &mtx1_info;
     83 }
     84 
     85 void
     86 mtx1_init(void)
     87 {
     88 
     89 	if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
     90 		panic("mtx-1: CPU not an AU1500!");
     91 
     92 	/*
     93 	 * If we had any kind of identification registers, we could
     94 	 * print them here.  Apparently the MTX-1 doesn't have that
     95 	 * kind of info.
     96 	 */
     97 
     98 	/* leave console and clocks alone -- YAMON should have got it right! */
     99 }
    100 
    101 int
    102 mtx1_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    103 {
    104 	/*
    105 	 * The board has up to 4 adapters, each with two minipci slots,
    106 	 * giving up to 8 devices.  Each slot 0 is the top, and slot 1
    107 	 * is the bottom.
    108 	 *
    109 	 * As these are mini PCI slots, only 2 interrupt pins can be
    110 	 * used on each slot.
    111 	 */
    112 	static const int irqmap[8/*device*/][4/*pin*/] = {
    113 		{  1,  2, -1, -1 },	/* IDSEL 0 - Adapter A - Slot 0 */
    114 		{  1,  2, -1, -1 },	/* IDSEL 1 - Adapter A - Slot 1 */
    115 		{  4,  5, -1, -1 },	/* IDSEL 2 - Adapter B - Slot 0 */
    116 		{  5,  4, -1, -1 },	/* IDSEL 3 - Adapter B - Slot 1 */
    117 
    118 		{  1,  2, -1, -1 },	/* IDSEL 4 - Adapter C - Slot 0 */
    119 		{  1,  2, -1, -1 },	/* IDSEL 5 - Adapter C - Slot 1 */
    120 		{  4,  5, -1, -1 },	/* IDSEL 6 - Adapter D - Slot 0 */
    121 		{  5,  4, -1, -1 },	/* IDSEL 7 - Adapter D - Slot 1 */
    122 	};
    123 	int	pin, dev, irq;
    124 
    125 	/* if interrupt pin not used... */
    126 	if ((pin = pa->pa_intrpin) == 0)
    127 		return 1;
    128 
    129 	if (pin > 4) {
    130 		printf("pci: bad interrupt pin %d\n", pin);
    131 		return 1;
    132 	}
    133 
    134 	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
    135 	if ((dev < 0) || (dev > 7)) {
    136 		printf("pci: bad device %d\n", dev);
    137 		return 1;
    138 	}
    139 
    140 	if ((irq = irqmap[dev][pin - 1]) == -1) {
    141 		printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
    142 		return 1;
    143 	}
    144 
    145 	*ihp = irq;
    146 	return 0;
    147 }
    148 
    149 void
    150 mtx1_reboot(void)
    151 {
    152 	/* fyi, this looks like the same as the DBAu1500 reset */
    153 	PUT16(MTX1_RESET , 0);
    154 	delay(100000);	/* 100 msec */
    155 }
    156