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mtx-1.c revision 1.3.98.1
      1  1.3.98.1     matt /* $NetBSD: mtx-1.c,v 1.3.98.1 2010/01/20 09:04:33 matt Exp $ */
      2       1.1  gdamore 
      3       1.1  gdamore /*-
      4       1.1  gdamore  * Copyright (c) 2006 Itronix Inc.
      5       1.1  gdamore  * All rights reserved.
      6       1.1  gdamore  *
      7       1.1  gdamore  * Written by Garrett D'Amore for Itronix Inc.
      8       1.1  gdamore  *
      9       1.1  gdamore  * Redistribution and use in source and binary forms, with or without
     10       1.1  gdamore  * modification, are permitted provided that the following conditions
     11       1.1  gdamore  * are met:
     12       1.1  gdamore  * 1. Redistributions of source code must retain the above copyright
     13       1.1  gdamore  *    notice, this list of conditions and the following disclaimer.
     14       1.1  gdamore  * 2. Redistributions in binary form must reproduce the above copyright
     15       1.1  gdamore  *    notice, this list of conditions and the following disclaimer in the
     16       1.1  gdamore  *    documentation and/or other materials provided with the distribution.
     17       1.1  gdamore  * 3. The name of Itronix Inc. may not be used to endorse
     18       1.1  gdamore  *    or promote products derived from this software without specific
     19       1.1  gdamore  *    prior written permission.
     20       1.1  gdamore  *
     21       1.1  gdamore  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
     22       1.1  gdamore  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23       1.1  gdamore  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24       1.1  gdamore  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
     25       1.1  gdamore  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     26       1.1  gdamore  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27       1.1  gdamore  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     28       1.1  gdamore  * ON ANY THEORY OF LIABILITY, WHETHER IN
     29       1.1  gdamore  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30       1.1  gdamore  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31       1.1  gdamore  * POSSIBILITY OF SUCH DAMAGE.
     32       1.1  gdamore  */
     33       1.1  gdamore 
     34       1.1  gdamore #include <sys/cdefs.h>
     35  1.3.98.1     matt __KERNEL_RCSID(0, "$NetBSD: mtx-1.c,v 1.3.98.1 2010/01/20 09:04:33 matt Exp $");
     36       1.1  gdamore 
     37       1.1  gdamore #include <sys/param.h>
     38       1.1  gdamore #include <machine/bus.h>
     39       1.1  gdamore #include <machine/locore.h>
     40       1.1  gdamore #include <evbmips/alchemy/obiovar.h>
     41       1.1  gdamore #include <evbmips/alchemy/board.h>
     42       1.1  gdamore 
     43       1.1  gdamore #define	MTX1_RESET	0xE00001C
     44       1.1  gdamore 
     45       1.1  gdamore #define	GET16(x)	\
     46       1.1  gdamore 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
     47       1.1  gdamore #define	PUT16(x, v)	\
     48       1.1  gdamore 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
     49       1.1  gdamore 
     50       1.1  gdamore static void mtx1_init(void);
     51       1.1  gdamore static int mtx1_pci_intr_map(struct pci_attach_args *,
     52       1.1  gdamore 				 pci_intr_handle_t *);
     53       1.1  gdamore static void mtx1_reboot(void);
     54       1.1  gdamore 
     55       1.1  gdamore static const struct obiodev mtx1_devices[] = {
     56       1.1  gdamore #if 0
     57       1.1  gdamore 	{ "aupcmcia", -1, -1 },
     58       1.1  gdamore 	{ "auaudio", -1, -1 },
     59       1.1  gdamore #endif
     60       1.1  gdamore 	{ NULL },
     61       1.1  gdamore };
     62       1.1  gdamore 
     63       1.1  gdamore static struct alchemy_board mtx1_info = {
     64       1.1  gdamore 	"4G Systems MTX-1",
     65       1.1  gdamore 	mtx1_devices,
     66       1.1  gdamore 	mtx1_init,
     67       1.1  gdamore 	mtx1_pci_intr_map,
     68       1.1  gdamore 	mtx1_reboot,
     69       1.1  gdamore 	NULL,	/* poweroff */
     70       1.1  gdamore };
     71       1.1  gdamore 
     72       1.1  gdamore const struct alchemy_board *
     73       1.2  gdamore board_info(void)
     74       1.1  gdamore {
     75       1.1  gdamore 
     76       1.1  gdamore 	return &mtx1_info;
     77       1.1  gdamore }
     78       1.1  gdamore 
     79       1.1  gdamore void
     80       1.1  gdamore mtx1_init(void)
     81       1.1  gdamore {
     82       1.1  gdamore 
     83  1.3.98.1     matt 	if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
     84       1.1  gdamore 		panic("mtx-1: CPU not an AU1500!");
     85       1.1  gdamore 
     86       1.1  gdamore 	/*
     87       1.1  gdamore 	 * If we had any kind of identification registers, we could
     88       1.1  gdamore 	 * print them here.  Apparently the MTX-1 doesn't have that
     89       1.1  gdamore 	 * kind of info.
     90       1.1  gdamore 	 */
     91       1.1  gdamore 
     92       1.1  gdamore 	/* leave console and clocks alone -- YAMON should have got it right! */
     93       1.1  gdamore }
     94       1.1  gdamore 
     95       1.1  gdamore int
     96       1.1  gdamore mtx1_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
     97       1.1  gdamore {
     98       1.1  gdamore 	/*
     99       1.1  gdamore 	 * The board has up to 4 adapters, each with two minipci slots,
    100       1.1  gdamore 	 * giving up to 8 devices.  Each slot 0 is the top, and slot 1
    101       1.1  gdamore 	 * is the bottom.
    102       1.1  gdamore 	 *
    103       1.1  gdamore 	 * As these are mini PCI slots, only 2 interrupt pins can be
    104       1.1  gdamore 	 * used on each slot.
    105       1.1  gdamore 	 */
    106       1.1  gdamore 	static const int irqmap[8/*device*/][4/*pin*/] = {
    107       1.1  gdamore 		{  1,  2, -1, -1 },	/* IDSEL 0 - Adapter A - Slot 0 */
    108       1.1  gdamore 		{  1,  2, -1, -1 },	/* IDSEL 1 - Adapter A - Slot 1 */
    109       1.1  gdamore 		{  4,  5, -1, -1 },	/* IDSEL 2 - Adapter B - Slot 0 */
    110       1.1  gdamore 		{  5,  4, -1, -1 },	/* IDSEL 3 - Adapter B - Slot 1 */
    111       1.1  gdamore 
    112       1.1  gdamore 		{  1,  2, -1, -1 },	/* IDSEL 4 - Adapter C - Slot 0 */
    113       1.1  gdamore 		{  1,  2, -1, -1 },	/* IDSEL 5 - Adapter C - Slot 1 */
    114       1.1  gdamore 		{  4,  5, -1, -1 },	/* IDSEL 6 - Adapter D - Slot 0 */
    115       1.1  gdamore 		{  5,  4, -1, -1 },	/* IDSEL 7 - Adapter D - Slot 1 */
    116       1.1  gdamore 	};
    117       1.1  gdamore 	int	pin, dev, irq;
    118       1.1  gdamore 
    119       1.1  gdamore 	/* if interrupt pin not used... */
    120       1.1  gdamore 	if ((pin = pa->pa_intrpin) == 0)
    121       1.1  gdamore 		return 1;
    122       1.1  gdamore 
    123       1.1  gdamore 	if (pin > 4) {
    124       1.1  gdamore 		printf("pci: bad interrupt pin %d\n", pin);
    125       1.1  gdamore 		return 1;
    126       1.1  gdamore 	}
    127       1.1  gdamore 
    128       1.1  gdamore 	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
    129       1.1  gdamore 	if ((dev < 0) || (dev > 7)) {
    130       1.1  gdamore 		printf("pci: bad device %d\n", dev);
    131       1.1  gdamore 		return 1;
    132       1.1  gdamore 	}
    133       1.1  gdamore 
    134       1.1  gdamore 	if ((irq = irqmap[dev][pin - 1]) == -1) {
    135       1.1  gdamore 		printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
    136       1.1  gdamore 		return 1;
    137       1.1  gdamore 	}
    138       1.1  gdamore 
    139       1.1  gdamore 	*ihp = irq;
    140       1.1  gdamore 	return 0;
    141       1.1  gdamore }
    142       1.1  gdamore 
    143       1.1  gdamore void
    144       1.1  gdamore mtx1_reboot(void)
    145       1.1  gdamore {
    146       1.1  gdamore 	/* fyi, this looks like the same as the DBAu1500 reset */
    147       1.1  gdamore 	PUT16(MTX1_RESET , 0);
    148       1.1  gdamore 	delay(100000);	/* 100 msec */
    149       1.1  gdamore }
    150