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mcclock_isa.c revision 1.7
      1  1.7   gdamore /*	$NetBSD: mcclock_isa.c,v 1.7 2006/03/28 03:43:57 gdamore Exp $	*/
      2  1.1    simonb 
      3  1.1    simonb /*
      4  1.1    simonb  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5  1.1    simonb  * All rights reserved.
      6  1.1    simonb  *
      7  1.1    simonb  * Author: Chris G. Demetriou
      8  1.1    simonb  *
      9  1.1    simonb  * Permission to use, copy, modify and distribute this software and
     10  1.1    simonb  * its documentation is hereby granted, provided that both the copyright
     11  1.1    simonb  * notice and this permission notice appear in all copies of the
     12  1.1    simonb  * software, derivative works or modified versions, and any portions
     13  1.1    simonb  * thereof, and that both notices appear in supporting documentation.
     14  1.1    simonb  *
     15  1.1    simonb  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.1    simonb  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  1.1    simonb  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.1    simonb  *
     19  1.1    simonb  * Carnegie Mellon requests users of this software to return to
     20  1.1    simonb  *
     21  1.1    simonb  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  1.1    simonb  *  School of Computer Science
     23  1.1    simonb  *  Carnegie Mellon University
     24  1.1    simonb  *  Pittsburgh PA 15213-3890
     25  1.1    simonb  *
     26  1.1    simonb  * any improvements or extensions that they make and grant Carnegie the
     27  1.1    simonb  * rights to redistribute these changes.
     28  1.1    simonb  */
     29  1.1    simonb 
     30  1.1    simonb #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31  1.1    simonb 
     32  1.7   gdamore __KERNEL_RCSID(0, "$NetBSD: mcclock_isa.c,v 1.7 2006/03/28 03:43:57 gdamore Exp $");
     33  1.1    simonb 
     34  1.1    simonb #include <sys/param.h>
     35  1.1    simonb #include <sys/kernel.h>
     36  1.1    simonb #include <sys/systm.h>
     37  1.1    simonb #include <sys/device.h>
     38  1.1    simonb 
     39  1.1    simonb #include <machine/bus.h>
     40  1.1    simonb 
     41  1.7   gdamore #include <dev/clock_subr.h>
     42  1.1    simonb #include <dev/ic/mc146818reg.h>
     43  1.7   gdamore #include <dev/ic/mc146818var.h>
     44  1.1    simonb 
     45  1.2    simonb #include <dev/isa/isareg.h>
     46  1.1    simonb #include <dev/isa/isavar.h>
     47  1.1    simonb 
     48  1.7   gdamore /*
     49  1.7   gdamore  * Note the Algorithmics PMON firmware uses a different year base.
     50  1.7   gdamore  */
     51  1.7   gdamore #define	ALGOR_YEAR_ZERO		1920
     52  1.1    simonb 
     53  1.1    simonb static int	mcclock_isa_match(struct device *, struct cfdata *, void *);
     54  1.1    simonb static void	mcclock_isa_attach(struct device *, struct device *, void *);
     55  1.1    simonb 
     56  1.7   gdamore CFATTACH_DECL(mcclock_isa, sizeof (struct mc146818_softc),
     57  1.4   thorpej     mcclock_isa_match, mcclock_isa_attach, NULL, NULL);
     58  1.1    simonb 
     59  1.7   gdamore static void	mcclock_isa_write(struct mc146818_softc *, u_int, u_int);
     60  1.7   gdamore static u_int	mcclock_isa_read(struct mc146818_softc *, u_int);
     61  1.1    simonb 
     62  1.7   gdamore extern todr_chip_handle_t	todr_handle;
     63  1.1    simonb 
     64  1.1    simonb static int
     65  1.1    simonb mcclock_isa_match(struct device *parent, struct cfdata *match, void *aux)
     66  1.1    simonb {
     67  1.1    simonb 	struct isa_attach_args *ia = aux;
     68  1.1    simonb 	bus_space_handle_t ioh;
     69  1.1    simonb 
     70  1.1    simonb 	if (ia->ia_nio < 1 ||
     71  1.5  drochner 	    (ia->ia_io[0].ir_addr != ISA_UNKNOWN_PORT &&
     72  1.2    simonb 	     ia->ia_io[0].ir_addr != IO_RTC))
     73  1.1    simonb 		return (0);
     74  1.1    simonb 
     75  1.1    simonb 	if (ia->ia_niomem > 0 &&
     76  1.5  drochner 	    (ia->ia_iomem[0].ir_addr != ISA_UNKNOWN_IOMEM))
     77  1.1    simonb 		return (0);
     78  1.1    simonb 
     79  1.1    simonb 	if (ia->ia_nirq > 0 &&
     80  1.5  drochner 	    (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ))
     81  1.1    simonb 		return (0);
     82  1.1    simonb 
     83  1.1    simonb 	if (ia->ia_ndrq > 0 &&
     84  1.5  drochner 	    (ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ))
     85  1.1    simonb 		return (0);
     86  1.1    simonb 
     87  1.2    simonb 	if (bus_space_map(ia->ia_iot, IO_RTC, 0x2, 0, &ioh))
     88  1.1    simonb 		return (0);
     89  1.1    simonb 
     90  1.1    simonb 	bus_space_unmap(ia->ia_iot, ioh, 0x2);
     91  1.1    simonb 
     92  1.1    simonb 	ia->ia_nio = 1;
     93  1.2    simonb 	ia->ia_io[0].ir_addr = IO_RTC;
     94  1.1    simonb 	ia->ia_io[0].ir_size = 0x02;
     95  1.1    simonb 
     96  1.1    simonb 	ia->ia_niomem = 0;
     97  1.1    simonb 	ia->ia_nirq = 0;
     98  1.1    simonb 	ia->ia_ndrq = 0;
     99  1.1    simonb 
    100  1.1    simonb 	return (1);
    101  1.1    simonb }
    102  1.1    simonb 
    103  1.1    simonb static void
    104  1.1    simonb mcclock_isa_attach(struct device *parent, struct device *self, void *aux)
    105  1.1    simonb {
    106  1.1    simonb 	struct isa_attach_args *ia = aux;
    107  1.7   gdamore 	struct mc146818_softc *sc = (struct mc146818_softc *)self;
    108  1.1    simonb 
    109  1.7   gdamore 	sc->sc_bst = ia->ia_iot;
    110  1.7   gdamore 	if (bus_space_map(sc->sc_bst, ia->ia_io[0].ir_addr,
    111  1.7   gdamore 	    ia->ia_io[0].ir_size, 0, &sc->sc_bsh))
    112  1.1    simonb 		panic("mcclock_isa_attach: couldn't map clock I/O space");
    113  1.1    simonb 
    114  1.7   gdamore 	sc->sc_year0 = ALGOR_YEAR_ZERO;
    115  1.7   gdamore 	sc->sc_flag = MC146818_NO_CENT_ADJUST;
    116  1.7   gdamore 	sc->sc_mcread = mcclock_isa_read;
    117  1.7   gdamore 	sc->sc_mcwrite = mcclock_isa_write;
    118  1.7   gdamore 	sc->sc_getcent = NULL;
    119  1.7   gdamore 	sc->sc_setcent = NULL;
    120  1.7   gdamore 
    121  1.7   gdamore 	/*
    122  1.7   gdamore 	 * Turn interrupts off, just in case.  Need to leave the SQWE
    123  1.7   gdamore 	 * set, because that's the DRAM refresh signal on Rev. B boards.
    124  1.7   gdamore 	 */
    125  1.7   gdamore 	mcclock_isa_write(sc, MC_REGB, MC_REGB_SQWE | MC_REGB_BINARY |
    126  1.7   gdamore 	    MC_REGB_24HR);
    127  1.7   gdamore 
    128  1.7   gdamore 	mc146818_attach(sc);
    129  1.7   gdamore 
    130  1.7   gdamore 	todr_handle = &sc->sc_handle;
    131  1.1    simonb }
    132  1.1    simonb 
    133  1.7   gdamore void
    134  1.7   gdamore mcclock_isa_write(struct mc146818_softc *sc, u_int reg, u_int datum)
    135  1.1    simonb {
    136  1.7   gdamore 	bus_space_tag_t iot = sc->sc_bst;
    137  1.7   gdamore 	bus_space_handle_t ioh = sc->sc_bsh;
    138  1.1    simonb 
    139  1.1    simonb 	bus_space_write_1(iot, ioh, 0, reg);
    140  1.1    simonb 	bus_space_write_1(iot, ioh, 1, datum);
    141  1.1    simonb }
    142  1.1    simonb 
    143  1.7   gdamore u_int
    144  1.7   gdamore mcclock_isa_read(struct mc146818_softc *sc, u_int reg)
    145  1.1    simonb {
    146  1.7   gdamore 	bus_space_tag_t iot = sc->sc_bst;
    147  1.7   gdamore 	bus_space_handle_t ioh = sc->sc_bsh;
    148  1.1    simonb 
    149  1.1    simonb 	bus_space_write_1(iot, ioh, 0, reg);
    150  1.1    simonb 	return bus_space_read_1(iot, ioh, 1);
    151  1.1    simonb }
    152