Home | History | Annotate | Line # | Download | only in isa 
      1 /*	$NetBSD: mcclock_isa.c,v 1.14 2011/07/08 18:49:48 matt Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31 
     32 __KERNEL_RCSID(0, "$NetBSD: mcclock_isa.c,v 1.14 2011/07/08 18:49:48 matt Exp $");
     33 
     34 #include <sys/param.h>
     35 #include <sys/kernel.h>
     36 #include <sys/systm.h>
     37 #include <sys/device.h>
     38 
     39 #include <sys/bus.h>
     40 
     41 #include <dev/clock_subr.h>
     42 #include <dev/ic/mc146818reg.h>
     43 #include <dev/ic/mc146818var.h>
     44 
     45 #include <dev/isa/isareg.h>
     46 #include <dev/isa/isavar.h>
     47 
     48 /*
     49  * Note the Algorithmics PMON firmware uses a different year base.
     50  */
     51 #define	ALGOR_YEAR_ZERO		1920
     52 
     53 static int	mcclock_isa_match(device_t, cfdata_t, void *);
     54 static void	mcclock_isa_attach(device_t, device_t, void *);
     55 
     56 CFATTACH_DECL_NEW(mcclock_isa, sizeof(struct mc146818_softc),
     57     mcclock_isa_match, mcclock_isa_attach, NULL, NULL);
     58 
     59 static void	mcclock_isa_write(struct mc146818_softc *, u_int, u_int);
     60 static u_int	mcclock_isa_read(struct mc146818_softc *, u_int);
     61 
     62 static int
     63 mcclock_isa_match(device_t parent, cfdata_t cf, void *aux)
     64 {
     65 	struct isa_attach_args *ia = aux;
     66 	bus_space_handle_t ioh;
     67 
     68 	if (ia->ia_nio < 1 ||
     69 	    (ia->ia_io[0].ir_addr != ISA_UNKNOWN_PORT &&
     70 	     ia->ia_io[0].ir_addr != IO_RTC))
     71 		return (0);
     72 
     73 	if (ia->ia_niomem > 0 &&
     74 	    (ia->ia_iomem[0].ir_addr != ISA_UNKNOWN_IOMEM))
     75 		return (0);
     76 
     77 	if (ia->ia_nirq > 0 &&
     78 	    (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ))
     79 		return (0);
     80 
     81 	if (ia->ia_ndrq > 0 &&
     82 	    (ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ))
     83 		return (0);
     84 
     85 	if (bus_space_map(ia->ia_iot, IO_RTC, 0x2, 0, &ioh))
     86 		return (0);
     87 
     88 	bus_space_unmap(ia->ia_iot, ioh, 0x2);
     89 
     90 	ia->ia_nio = 1;
     91 	ia->ia_io[0].ir_addr = IO_RTC;
     92 	ia->ia_io[0].ir_size = 0x02;
     93 
     94 	ia->ia_niomem = 0;
     95 	ia->ia_nirq = 0;
     96 	ia->ia_ndrq = 0;
     97 
     98 	return (1);
     99 }
    100 
    101 static void
    102 mcclock_isa_attach(device_t parent, device_t self, void *aux)
    103 {
    104 	struct mc146818_softc *sc = device_private(self);
    105 	struct isa_attach_args *ia = aux;
    106 
    107 	sc->sc_dev = self;
    108 	sc->sc_bst = ia->ia_iot;
    109 	if (bus_space_map(sc->sc_bst, ia->ia_io[0].ir_addr,
    110 	    ia->ia_io[0].ir_size, 0, &sc->sc_bsh))
    111 		panic("mcclock_isa_attach: couldn't map clock I/O space");
    112 
    113 	sc->sc_year0 = ALGOR_YEAR_ZERO;
    114 	sc->sc_flag = MC146818_NO_CENT_ADJUST;
    115 	sc->sc_mcread = mcclock_isa_read;
    116 	sc->sc_mcwrite = mcclock_isa_write;
    117 	sc->sc_getcent = NULL;
    118 	sc->sc_setcent = NULL;
    119 
    120 	/*
    121 	 * Turn interrupts off, just in case.  Need to leave the SQWE
    122 	 * set, because that's the DRAM refresh signal on Rev. B boards.
    123 	 */
    124 	mcclock_isa_write(sc, MC_REGB, MC_REGB_SQWE | MC_REGB_BINARY |
    125 	    MC_REGB_24HR);
    126 
    127 	mc146818_attach(sc);
    128 
    129 	aprint_normal("\n");
    130 }
    131 
    132 static void
    133 mcclock_isa_write(struct mc146818_softc *sc, u_int reg, u_int datum)
    134 {
    135 	bus_space_tag_t iot = sc->sc_bst;
    136 	bus_space_handle_t ioh = sc->sc_bsh;
    137 
    138 	bus_space_write_1(iot, ioh, 0, reg);
    139 	bus_space_write_1(iot, ioh, 1, datum);
    140 }
    141 
    142 static u_int
    143 mcclock_isa_read(struct mc146818_softc *sc, u_int reg)
    144 {
    145 	bus_space_tag_t iot = sc->sc_bst;
    146 	bus_space_handle_t ioh = sc->sc_bsh;
    147 
    148 	bus_space_write_1(iot, ioh, 0, reg);
    149 	return bus_space_read_1(iot, ioh, 1);
    150 }
    151