gt.c revision 1.14 1 1.14 matt /* $NetBSD: gt.c,v 1.14 2015/06/07 07:19:21 matt Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2002 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.7 lukem
38 1.7 lukem #include <sys/cdefs.h>
39 1.14 matt __KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.14 2015/06/07 07:19:21 matt Exp $");
40 1.1 simonb
41 1.1 simonb #include <sys/param.h>
42 1.1 simonb #include <sys/systm.h>
43 1.1 simonb #include <sys/device.h>
44 1.1 simonb
45 1.1 simonb #include <dev/pci/pcivar.h>
46 1.1 simonb
47 1.14 matt #include <mips/cpuregs.h>
48 1.14 matt
49 1.1 simonb #include <evbmips/malta/maltareg.h>
50 1.1 simonb #include <evbmips/malta/maltavar.h>
51 1.1 simonb
52 1.1 simonb #include <evbmips/malta/dev/gtreg.h>
53 1.1 simonb #include <evbmips/malta/dev/gtvar.h>
54 1.1 simonb
55 1.1 simonb #include "pci.h"
56 1.1 simonb
57 1.1 simonb /*
58 1.1 simonb * Galileo systems (so far) are always single-processor, so this is sufficient.
59 1.1 simonb */
60 1.1 simonb #define PCI_CONF_LOCK(s) (s) = splhigh()
61 1.1 simonb #define PCI_CONF_UNLOCK(s) splx((s))
62 1.1 simonb
63 1.13 matt static void gt_attach_hook(device_t, device_t, struct pcibus_attach_args *);
64 1.1 simonb static int gt_bus_maxdevs(void *, int);
65 1.1 simonb static pcitag_t gt_make_tag(void *, int, int, int);
66 1.1 simonb static void gt_decompose_tag(void *, pcitag_t, int *, int *, int *);
67 1.1 simonb static pcireg_t gt_conf_read(void *, pcitag_t, int);
68 1.1 simonb static void gt_conf_write(void *, pcitag_t, int, pcireg_t);
69 1.1 simonb
70 1.1 simonb void
71 1.1 simonb gt_pci_init(pci_chipset_tag_t pc, struct gt_config *mcp)
72 1.1 simonb {
73 1.1 simonb
74 1.1 simonb pc->pc_conf_v = mcp;
75 1.1 simonb pc->pc_attach_hook = gt_attach_hook;
76 1.1 simonb pc->pc_bus_maxdevs = gt_bus_maxdevs;
77 1.1 simonb pc->pc_make_tag = gt_make_tag;
78 1.1 simonb pc->pc_decompose_tag = gt_decompose_tag;
79 1.1 simonb pc->pc_conf_read = gt_conf_read;
80 1.1 simonb pc->pc_conf_write = gt_conf_write;
81 1.1 simonb }
82 1.1 simonb
83 1.1 simonb static void
84 1.13 matt gt_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba)
85 1.1 simonb {
86 1.1 simonb
87 1.1 simonb /* Nothing to do... */
88 1.1 simonb }
89 1.1 simonb
90 1.13 matt static int gt_match(device_t, cfdata_t, void *);
91 1.13 matt static void gt_attach(device_t, device_t, void *);
92 1.1 simonb static int gt_print(void *aux, const char *pnp);
93 1.1 simonb
94 1.13 matt CFATTACH_DECL_NEW(gt, 0,
95 1.5 thorpej gt_match, gt_attach, NULL, NULL);
96 1.1 simonb
97 1.1 simonb static int
98 1.13 matt gt_match(device_t parent, cfdata_t match, void *aux)
99 1.1 simonb {
100 1.1 simonb return 1;
101 1.1 simonb }
102 1.1 simonb
103 1.1 simonb static void
104 1.13 matt gt_attach(device_t parent, device_t self, void *aux)
105 1.1 simonb {
106 1.1 simonb struct malta_config *mcp = &malta_configuration;
107 1.1 simonb struct pcibus_attach_args pba;
108 1.1 simonb
109 1.1 simonb printf("\n");
110 1.1 simonb
111 1.1 simonb #if NPCI > 0
112 1.12 dyoung pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
113 1.1 simonb pba.pba_bus = 0;
114 1.2 thorpej pba.pba_bridgetag = NULL;
115 1.1 simonb pba.pba_iot = &mcp->mc_iot;
116 1.1 simonb pba.pba_memt = &mcp->mc_memt;
117 1.1 simonb pba.pba_dmat = &mcp->mc_pci_dmat; /* pci_bus_dma_tag */
118 1.6 fvdl pba.pba_dmat64 = NULL;
119 1.1 simonb pba.pba_pc = &mcp->mc_pc;
120 1.1 simonb
121 1.8 drochner config_found_ia(self, "pcibus", &pba, gt_print);
122 1.1 simonb #endif
123 1.1 simonb }
124 1.1 simonb
125 1.1 simonb static int
126 1.11 dsl gt_print(void *aux, const char *pnp)
127 1.1 simonb {
128 1.1 simonb /* XXX */
129 1.1 simonb return 0;
130 1.1 simonb }
131 1.1 simonb
132 1.1 simonb static int
133 1.1 simonb gt_bus_maxdevs(void *v, int busno)
134 1.1 simonb {
135 1.1 simonb
136 1.1 simonb /* The galileo has problems accessing device 31. */
137 1.1 simonb if (busno == 0)
138 1.1 simonb return (31);
139 1.1 simonb return (32);
140 1.1 simonb }
141 1.1 simonb
142 1.1 simonb static pcitag_t
143 1.1 simonb gt_make_tag(void *v, int b, int d, int f)
144 1.1 simonb {
145 1.1 simonb
146 1.1 simonb return ((b << 16) | (d << 11) | (f << 8));
147 1.1 simonb }
148 1.1 simonb
149 1.1 simonb static void
150 1.1 simonb gt_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
151 1.1 simonb {
152 1.1 simonb
153 1.1 simonb if (bp != NULL)
154 1.1 simonb *bp = (tag >> 16) & 0xff;
155 1.1 simonb if (dp != NULL)
156 1.1 simonb *dp = (tag >> 11) & 0x1f;
157 1.1 simonb if (fp != NULL)
158 1.1 simonb *fp = (tag >> 8) & 0x7;
159 1.1 simonb }
160 1.1 simonb
161 1.1 simonb static pcireg_t
162 1.1 simonb gt_conf_read(void *v, pcitag_t tag, int offset)
163 1.1 simonb {
164 1.1 simonb pcireg_t data;
165 1.1 simonb int bus, dev, func, s;
166 1.1 simonb
167 1.1 simonb gt_decompose_tag(NULL /* XXX */, tag, &bus, &dev, &func);
168 1.1 simonb
169 1.1 simonb /* The galileo has problems accessing device 31. */
170 1.1 simonb if (bus == 0 && dev == 31)
171 1.1 simonb return ((pcireg_t) -1);
172 1.1 simonb
173 1.1 simonb /* XXX: no support for bus > 0 yet */
174 1.1 simonb if (bus > 0)
175 1.1 simonb return ((pcireg_t) -1);
176 1.1 simonb
177 1.1 simonb PCI_CONF_LOCK(s);
178 1.1 simonb
179 1.1 simonb /* Clear cause register bits. */
180 1.1 simonb GT_REGVAL(GT_INTR_CAUSE) = 0;
181 1.1 simonb
182 1.1 simonb GT_REGVAL(GT_PCI0_CFG_ADDR) = (1 << 31) | tag | offset;
183 1.1 simonb data = GT_REGVAL(GT_PCI0_CFG_DATA);
184 1.1 simonb
185 1.1 simonb /* Check for master abort. */
186 1.1 simonb if (GT_REGVAL(GT_INTR_CAUSE) & (GTIC_MASABORT0 | GTIC_TARABORT0))
187 1.1 simonb data = (pcireg_t) -1;
188 1.1 simonb
189 1.1 simonb PCI_CONF_UNLOCK(s);
190 1.1 simonb
191 1.1 simonb return (data);
192 1.1 simonb }
193 1.1 simonb
194 1.1 simonb static void
195 1.1 simonb gt_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)
196 1.1 simonb {
197 1.1 simonb int bus, dev, func, s;
198 1.1 simonb
199 1.1 simonb gt_decompose_tag(NULL /* XXX */, tag, &bus, &dev, &func);
200 1.1 simonb
201 1.1 simonb /* The galileo has problems accessing device 31. */
202 1.1 simonb if (bus == 0 && dev == 31)
203 1.1 simonb return;
204 1.1 simonb
205 1.1 simonb /* XXX: no support for bus > 0 yet */
206 1.1 simonb if (bus > 0)
207 1.1 simonb return;
208 1.1 simonb
209 1.1 simonb PCI_CONF_LOCK(s);
210 1.1 simonb
211 1.1 simonb /* Clear cause register bits. */
212 1.1 simonb GT_REGVAL(GT_INTR_CAUSE) = 0;
213 1.1 simonb
214 1.1 simonb GT_REGVAL(GT_PCI0_CFG_ADDR) = (1 << 31) | tag | offset;
215 1.1 simonb GT_REGVAL(GT_PCI0_CFG_DATA) = data;
216 1.1 simonb
217 1.1 simonb PCI_CONF_UNLOCK(s);
218 1.1 simonb }
219