gt.c revision 1.13 1 /* $NetBSD: gt.c,v 1.13 2011/06/06 17:13:05 matt Exp $ */
2
3 /*
4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.13 2011/06/06 17:13:05 matt Exp $");
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/device.h>
44
45 #include <dev/pci/pcivar.h>
46
47 #include <evbmips/malta/maltareg.h>
48 #include <evbmips/malta/maltavar.h>
49
50 #include <evbmips/malta/dev/gtreg.h>
51 #include <evbmips/malta/dev/gtvar.h>
52
53 #include "pci.h"
54
55 /*
56 * Galileo systems (so far) are always single-processor, so this is sufficient.
57 */
58 #define PCI_CONF_LOCK(s) (s) = splhigh()
59 #define PCI_CONF_UNLOCK(s) splx((s))
60
61 static void gt_attach_hook(device_t, device_t, struct pcibus_attach_args *);
62 static int gt_bus_maxdevs(void *, int);
63 static pcitag_t gt_make_tag(void *, int, int, int);
64 static void gt_decompose_tag(void *, pcitag_t, int *, int *, int *);
65 static pcireg_t gt_conf_read(void *, pcitag_t, int);
66 static void gt_conf_write(void *, pcitag_t, int, pcireg_t);
67
68 void
69 gt_pci_init(pci_chipset_tag_t pc, struct gt_config *mcp)
70 {
71
72 pc->pc_conf_v = mcp;
73 pc->pc_attach_hook = gt_attach_hook;
74 pc->pc_bus_maxdevs = gt_bus_maxdevs;
75 pc->pc_make_tag = gt_make_tag;
76 pc->pc_decompose_tag = gt_decompose_tag;
77 pc->pc_conf_read = gt_conf_read;
78 pc->pc_conf_write = gt_conf_write;
79 }
80
81 static void
82 gt_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba)
83 {
84
85 /* Nothing to do... */
86 }
87
88 static int gt_match(device_t, cfdata_t, void *);
89 static void gt_attach(device_t, device_t, void *);
90 static int gt_print(void *aux, const char *pnp);
91
92 CFATTACH_DECL_NEW(gt, 0,
93 gt_match, gt_attach, NULL, NULL);
94
95 static int
96 gt_match(device_t parent, cfdata_t match, void *aux)
97 {
98 return 1;
99 }
100
101 static void
102 gt_attach(device_t parent, device_t self, void *aux)
103 {
104 struct malta_config *mcp = &malta_configuration;
105 struct pcibus_attach_args pba;
106
107 printf("\n");
108
109 #if NPCI > 0
110 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
111 pba.pba_bus = 0;
112 pba.pba_bridgetag = NULL;
113 pba.pba_iot = &mcp->mc_iot;
114 pba.pba_memt = &mcp->mc_memt;
115 pba.pba_dmat = &mcp->mc_pci_dmat; /* pci_bus_dma_tag */
116 pba.pba_dmat64 = NULL;
117 pba.pba_pc = &mcp->mc_pc;
118
119 config_found_ia(self, "pcibus", &pba, gt_print);
120 #endif
121 }
122
123 static int
124 gt_print(void *aux, const char *pnp)
125 {
126 /* XXX */
127 return 0;
128 }
129
130 static int
131 gt_bus_maxdevs(void *v, int busno)
132 {
133
134 /* The galileo has problems accessing device 31. */
135 if (busno == 0)
136 return (31);
137 return (32);
138 }
139
140 static pcitag_t
141 gt_make_tag(void *v, int b, int d, int f)
142 {
143
144 return ((b << 16) | (d << 11) | (f << 8));
145 }
146
147 static void
148 gt_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
149 {
150
151 if (bp != NULL)
152 *bp = (tag >> 16) & 0xff;
153 if (dp != NULL)
154 *dp = (tag >> 11) & 0x1f;
155 if (fp != NULL)
156 *fp = (tag >> 8) & 0x7;
157 }
158
159 static pcireg_t
160 gt_conf_read(void *v, pcitag_t tag, int offset)
161 {
162 pcireg_t data;
163 int bus, dev, func, s;
164
165 gt_decompose_tag(NULL /* XXX */, tag, &bus, &dev, &func);
166
167 /* The galileo has problems accessing device 31. */
168 if (bus == 0 && dev == 31)
169 return ((pcireg_t) -1);
170
171 /* XXX: no support for bus > 0 yet */
172 if (bus > 0)
173 return ((pcireg_t) -1);
174
175 PCI_CONF_LOCK(s);
176
177 /* Clear cause register bits. */
178 GT_REGVAL(GT_INTR_CAUSE) = 0;
179
180 GT_REGVAL(GT_PCI0_CFG_ADDR) = (1 << 31) | tag | offset;
181 data = GT_REGVAL(GT_PCI0_CFG_DATA);
182
183 /* Check for master abort. */
184 if (GT_REGVAL(GT_INTR_CAUSE) & (GTIC_MASABORT0 | GTIC_TARABORT0))
185 data = (pcireg_t) -1;
186
187 PCI_CONF_UNLOCK(s);
188
189 return (data);
190 }
191
192 static void
193 gt_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)
194 {
195 int bus, dev, func, s;
196
197 gt_decompose_tag(NULL /* XXX */, tag, &bus, &dev, &func);
198
199 /* The galileo has problems accessing device 31. */
200 if (bus == 0 && dev == 31)
201 return;
202
203 /* XXX: no support for bus > 0 yet */
204 if (bus > 0)
205 return;
206
207 PCI_CONF_LOCK(s);
208
209 /* Clear cause register bits. */
210 GT_REGVAL(GT_INTR_CAUSE) = 0;
211
212 GT_REGVAL(GT_PCI0_CFG_ADDR) = (1 << 31) | tag | offset;
213 GT_REGVAL(GT_PCI0_CFG_DATA) = data;
214
215 PCI_CONF_UNLOCK(s);
216 }
217