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      1 /* $NetBSD: systemsw.c,v 1.2 2017/07/24 09:56:45 mrg Exp $ */
      2 
      3 /*
      4  * Copyright 2000, 2001
      5  * Broadcom Corporation. All rights reserved.
      6  *
      7  * This software is furnished under license and may be used and copied only
      8  * in accordance with the following terms and conditions.  Subject to these
      9  * conditions, you may download, copy, install, use, modify and distribute
     10  * modified or unmodified copies of this software in source and/or binary
     11  * form. No title or ownership is transferred hereby.
     12  *
     13  * 1) Any source code used, modified or distributed must reproduce and
     14  *    retain this copyright notice and list of conditions as they appear in
     15  *    the source file.
     16  *
     17  * 2) No right is granted to use any trade name, trademark, or logo of
     18  *    Broadcom Corporation.  The "Broadcom Corporation" name may not be
     19  *    used to endorse or promote products derived from this software
     20  *    without the prior written permission of Broadcom Corporation.
     21  *
     22  * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
     23  *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
     24  *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
     25  *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
     26  *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
     27  *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
     30  *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     31  *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
     32  *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #include <sys/cdefs.h>
     36 __KERNEL_RCSID(0, "$NetBSD: systemsw.c,v 1.2 2017/07/24 09:56:45 mrg Exp $");
     37 
     38 #include <sys/param.h>
     39 #include <sys/cpu.h>
     40 #include <sys/intr.h>
     41 #include <sys/kernel.h>
     42 #include <sys/systm.h>
     43 
     44 #include <mips/locore.h>
     45 #include <mips/mips3_clock.h>
     46 
     47 #include <evbmips/sbmips/systemsw.h>
     48 
     49 
     50 /* trivial functions for function switch */
     51 static void	clock_init_triv(void *);
     52 static void	cpu_intr_triv(int, vaddr_t, uint32_t);
     53 
     54 /* system function switch */
     55 struct systemsw systemsw = {
     56 	cpu_intr_triv,
     57 
     58 	NULL,			/* clock intr arg */
     59 	clock_init_triv,
     60 
     61 	NULL,			/* statclock arg */
     62 	NULL,			/* s_statclock_init: dflt no-op */
     63 	NULL,			/* s_statclock_setrate: dflt no-op */
     64 
     65 	NULL,			/* intr_establish */
     66 };
     67 
     68 bool
     69 system_set_clockfns(void *arg, void (*init)(void *))
     70 {
     71 
     72 	if (systemsw.s_clock_init != clock_init_triv)
     73 		return true;
     74 	systemsw.s_clock_arg = arg;
     75 	systemsw.s_clock_init = init;
     76 	return false;
     77 }
     78 
     79 static void
     80 cpu_intr_triv(int ppl, vaddr_t pc, uint32_t status)
     81 {
     82 
     83 	panic("cpu_intr_triv");
     84 }
     85 
     86 void
     87 cpu_intr(int ppl, vaddr_t pc, uint32_t status)
     88 {
     89 
     90 	(*systemsw.s_cpu_intr)(ppl, pc, status);
     91 }
     92 
     93 static void
     94 clock_init_triv(void *arg)
     95 {
     96 
     97 	panic("clock_init_triv");
     98 }
     99 
    100 void
    101 cpu_initclocks(void)
    102 {
    103 
    104 	(*systemsw.s_clock_init)(systemsw.s_clock_arg);
    105 
    106 	if (systemsw.s_statclock_init != NULL)
    107 		(*systemsw.s_statclock_init)(systemsw.s_statclock_arg);
    108 
    109 	/*
    110 	 * ``Disable'' the compare interrupt by setting it to its largest
    111 	 * value.  Each hard clock interrupt we'll reset the CP0 compare
    112 	 * register to just bind the CP0 clock register.
    113 	 */
    114 	mips3_cp0_compare_write(~0u);
    115 	mips3_cp0_count_write(0);
    116 
    117 	mips3_init_tc();
    118 
    119 	/*
    120 	 * Now we can enable all interrupts including hardclock(9).
    121 	 */
    122 	spl0();
    123 }
    124 
    125 void
    126 setstatclockrate(int hzrate)
    127 {
    128 
    129 	if (systemsw.s_statclock_setrate != NULL)
    130 		(*systemsw.s_statclock_setrate)(systemsw.s_statclock_arg,
    131 		    hzrate);
    132 }
    133