1/* $NetBSD: gxreg.h,v 1.1 2026/01/09 22:54:30 jmcneill Exp $ */ 2 3/*- 4 * Copyright (c) 2025 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#ifndef _WII_DEV_GXREG_H 30#define _WII_DEV_GXREG_H 31 32#define LOWER_16_BITS(x) ((x) & 0xffff) 33#define UPPER_16_BITS(x) (((x) >> 16) & 0xffff) 34 35#define _REG16(x) ((x) / 2) 36#define _REG32(x) ((x) / 4) 37 38#define CP_SR _REG16(0x00) 39#define CP_SR_IDLE_CMDS 0x0008 40#define CP_SR_IDLE_READ 0x0004 41#define CP_CR _REG16(0x02) 42#define CP_CR_READ_ENABLE 0x0001 43#define CP_CR_GP_LINK_ENABLE 0x0010 44#define CP_CLEAR _REG16(0x04) 45#define CP_CLEAR_OVERFLOW 0x0001 46#define CP_CLEAR_UNDERFLOW 0x0002 47#define CP_FIFO_BASE_LO _REG16(0x20) 48#define CP_FIFO_BASE_HI _REG16(0x22) 49#define CP_FIFO_END_LO _REG16(0x24) 50#define CP_FIFO_END_HI _REG16(0x26) 51#define CP_FIFO_HIWAT_LO _REG16(0x28) 52#define CP_FIFO_HIWAT_HI _REG16(0x2a) 53#define CP_FIFO_LOWAT_LO _REG16(0x2c) 54#define CP_FIFO_LOWAT_HI _REG16(0x2e) 55#define CP_FIFO_RW_DIST_LO _REG16(0x30) 56#define CP_FIFO_RW_DIST_HI _REG16(0x32) 57#define CP_FIFO_WRITE_PTR_LO _REG16(0x34) 58#define CP_FIFO_WRITE_PTR_HI _REG16(0x36) 59#define CP_FIFO_READ_PTR_LO _REG16(0x38) 60#define CP_FIFO_READ_PTR_HI _REG16(0x3a) 61 62#define PE_ZCONF _REG16(0x00) 63#define PE_ZCONF_UPD_ENABLE 0x0010 64#define PE_ZCONF_FUNC_ALWAYS 0x000e 65#define PE_ZCONF_COMP_ENABLE 0x0001 66#define PE_ALPHA_CONF _REG16(0x02) 67#define PE_ALPHA_CONF_OP_SET 0xf000 68#define PE_ALPHA_CONF_SRC_1 0x0100 69#define PE_ALPHA_CONF_DST_0 0x0000 70#define PE_ALPHA_CONF_UPD_A 0x0010 71#define PE_ALPHA_CONF_UPD_C 0x0008 72#define PE_ALPHA_DEST _REG16(0x04) 73#define PE_ALPHA_DEST_ENABLE 0x0100 74#define PE_ALPHA_MODE _REG16(0x06) 75#define PE_ALPHA_MODE_ALWAYS 0x0700 76#define PE_ALPHA_READ _REG16(0x08) 77#define PE_ALPHA_READ_UNK 0x0004 78#define PE_ALPHA_READ_FF 0x0001 79#define PE_ISR _REG16(0x0a) 80#define PE_ISR_FINISH 0x0008 81#define PE_ISR_TOKEN 0x0004 82#define PE_ISR_FINISH_ENABLE 0x0002 83#define PE_IST_TOKEN_ENABLE 0x0001 84#define PE_TOKEN _REG16(0x0e) 85 86#define PI_FIFO_BASE_START _REG32(0x0c) 87#define PI_FIFO_BASE_END _REG32(0x10) 88#define PI_FIFO_WRITE_PTR _REG32(0x14) 89 90#define GX_XF_VIEWPORT_X0 0x101a 91#define GX_XF_VIEWPORT_Y0 0x101b 92#define GX_XF_VIEWPORT_Z 0x101c 93#define GX_XF_VIEWPORT_X1 0x101d 94#define GX_XF_VIEWPORT_Y1 0x101e 95#define GX_XF_VIEWPORT_FP 0x101f 96#define GX_XF_PROJ_0 0x1020 97#define GX_XF_PROJ_1 0x1021 98#define GX_XF_PROJ_2 0x1022 99#define GX_XF_PROJ_3 0x1023 100#define GX_XF_PROJ_4 0x1024 101#define GX_XF_PROJ_5 0x1025 102#define GX_XF_PROJ_MODE 0x1026 103 104#define GX_FIFO_ALIGN 32 105#define GX_FIFO_HIWAT(_size) ((_size) - (16 * 1024)) 106#define GX_FIFO_LOWAT(_size) (((_size) >> 1) & ~0x1f) 107#define GX_XY(x, y) (((uint32_t)(y) << 10) | (x)) 108 109#define GX_STRICT_ORDER(x) \ 110 do { \ 111 x; \ 112 asm volatile("" ::: "memory"); \ 113 } while (0) 114 115typedef union gx_wgpipe { 116 volatile int8_t s8; 117 volatile uint8_t u8; 118 volatile int16_t s16; 119 volatile uint16_t u16; 120 volatile int16_t s32; 121 volatile uint32_t u32; 122} gx_wgpipe_t; 123 124#endif /* _WII_DEV_GXREG_H */ 125