1/* $NetBSD: hwgpio.c,v 1.1 2026/01/09 22:54:30 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2024 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: hwgpio.c,v 1.1 2026/01/09 22:54:30 jmcneill Exp $");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/cpu.h>
35#include <sys/device.h>
36#include <sys/kmem.h>
37#include <sys/bitops.h>
38#include <sys/gpio.h>
39#include <sys/mutex.h>
40
41#include <dev/gpio/gpiovar.h>
42
43#include <machine/wii.h>
44#include <machine/wiiu.h>
45
46#define PIN(_num, _name, _caps)		\
47	{ .pin_num = (_num), 		\
48	  .pin_caps = (_caps),		\
49	  .pin_defname = (_name),	\
50	}
51static gpio_pin_t hwgpio_pins[] = {
52	PIN( 0, "POWER",	GPIO_PIN_INPUT),
53	PIN( 1, "SHUTDOWN",	GPIO_PIN_OUTPUT),
54	PIN( 2, "FAN",		GPIO_PIN_OUTPUT),
55	PIN( 3, "DC_DC",	GPIO_PIN_OUTPUT),
56	PIN( 4, "DI_SPIN",	GPIO_PIN_OUTPUT),
57	PIN( 5, "SLOT_LED",	GPIO_PIN_OUTPUT),
58	PIN( 6, "EJECT_BTN",	GPIO_PIN_INPUT),
59	PIN( 7, "SLOT_IN",	GPIO_PIN_INPUT),
60	PIN( 8, "SENSOR_BAR",	GPIO_PIN_OUTPUT),
61	PIN( 9, "DO_EJECT",	GPIO_PIN_OUTPUT),
62	PIN(10, "EEP_CS",	GPIO_PIN_OUTPUT),
63	PIN(11, "EEP_CLK",	GPIO_PIN_OUTPUT),
64	PIN(12, "EEP_MOSI",	GPIO_PIN_OUTPUT),
65	PIN(13, "EEP_MISO",	GPIO_PIN_INPUT),
66	PIN(14, "AVE_SCL",	GPIO_PIN_OUTPUT),
67	PIN(15, "AVE_SDA",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
68	PIN(16, "DEBUG0",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
69	PIN(17, "DEBUG1",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
70	PIN(18, "DEBUG2",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
71	PIN(19, "DEBUG3",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
72	PIN(20, "DEBUG4",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
73	PIN(21, "DEBUG5",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
74	PIN(22, "DEBUG6",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
75	PIN(23, "DEBUG7",	GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
76};
77#undef PIN
78
79struct hwgpio_softc {
80	struct gpio_chipset_tag	sc_gp;
81	kmutex_t sc_lock;
82};
83
84#define	RD4(reg)		in32(reg)
85#define	WR4(reg, val)		out32((reg), (val))
86
87static int
88hwgpio_pin_read(void *priv, int pin)
89{
90	return (RD4(HW_GPIOB_IN) & __BIT(pin)) != 0;
91}
92
93static void
94hwgpio_pin_write(void *priv, int pin, int value)
95{
96	struct hwgpio_softc * const sc = priv;
97	uint32_t out;
98
99	mutex_enter(&sc->sc_lock);
100	out = RD4(HW_GPIOB_OUT);
101	if (value) {
102		out |= __BIT(pin);
103	} else {
104		out &= ~__BIT(pin);
105	}
106	WR4(HW_GPIOB_OUT, out);
107	mutex_exit(&sc->sc_lock);
108}
109
110static void
111hwgpio_pin_ctl(void *priv, int pin, int flags)
112{
113	struct hwgpio_softc * const sc = priv;
114	uint32_t dir;
115
116	mutex_enter(&sc->sc_lock);
117	dir = RD4(HW_GPIOB_DIR);
118	if (flags & GPIO_PIN_OUTPUT) {
119		dir |= __BIT(pin);
120	} else {
121		dir &= ~__BIT(pin);
122	}
123	WR4(HW_GPIOB_DIR, dir);
124	mutex_exit(&sc->sc_lock);
125}
126
127static int
128hwgpio_match(device_t parent, cfdata_t cf, void *aux)
129{
130	return !wiiu_plat;
131}
132
133static void
134hwgpio_attach(device_t parent, device_t self, void *aux)
135{
136	struct hwgpio_softc * const sc = device_private(self);
137	struct gpio_chipset_tag *gp = &sc->sc_gp;
138	struct gpiobus_attach_args gba = {};
139	uint32_t in, out, dir;
140	u_int n;
141
142	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
143
144	gp->gp_cookie = sc;
145	gp->gp_pin_read = hwgpio_pin_read;
146	gp->gp_pin_write = hwgpio_pin_write;
147	gp->gp_pin_ctl = hwgpio_pin_ctl;
148
149	aprint_naive("\n");
150	aprint_normal(": GPIO\n");
151
152	in = RD4(HW_GPIOB_IN);
153	out = RD4(HW_GPIOB_OUT);
154	dir = RD4(HW_GPIOB_DIR);
155	for (n = 0; n < __arraycount(hwgpio_pins); n++) {
156		const uint32_t mask = __BIT(hwgpio_pins[n].pin_num);
157		if (dir & mask) {
158			hwgpio_pins[n].pin_state = (out & mask) != 0;
159		} else {
160			hwgpio_pins[n].pin_state = (in & mask) != 0;
161		}
162	}
163
164	gba.gba_gc = &sc->sc_gp;
165	gba.gba_pins = hwgpio_pins;
166	gba.gba_npins = __arraycount(hwgpio_pins);
167	config_found(self, &gba, NULL, CFARGS_NONE);
168}
169
170CFATTACH_DECL_NEW(hwgpio, sizeof(struct hwgpio_softc),
171    hwgpio_match, hwgpio_attach, NULL, NULL);
172