1/* $NetBSD: cache.h,v 1.1 2025/11/16 20:11:47 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2025 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifndef _WII_CACHE_H
30#define _WII_CACHE_H
31
32#if CACHE_LINE_SIZE != 32
33#error Incorrect CACHE_LINE_SIZE!
34#endif
35
36static inline void
37cache_dcbf(void *addr, size_t size)
38{
39	uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
40	uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
41
42	asm volatile("eieio");
43	while (start < end) {
44		asm volatile("dcbf 0, %0" : : "r"(start) : "memory");
45		start += CACHE_LINE_SIZE;
46	}
47	asm volatile("sync");
48}
49
50static inline void
51cache_dcbi(void *addr, size_t size)
52{
53	uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
54	uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
55
56	asm volatile("eieio");
57	while (start < end) {
58		asm volatile("dcbi 0, %0" : : "r"(start) : "memory");
59		start += CACHE_LINE_SIZE;
60	}
61	asm volatile("sync");
62}
63
64static inline void
65cache_icbi(void *addr, size_t size)
66{
67	uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
68	uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
69
70	asm volatile("eieio");
71	while (start < end) {
72		asm volatile("icbi 0, %0" : : "r"(start) : "memory");
73		start += CACHE_LINE_SIZE;
74	}
75	asm volatile("sync");
76}
77
78#endif /* !_WII_CACHE_H */
79