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pmap_bootstrap.c revision 1.34
      1 /*	$NetBSD: pmap_bootstrap.c,v 1.34 2007/12/29 16:48:03 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1991, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  *	@(#)pmap_bootstrap.c	8.1 (Berkeley) 6/10/93
     36  */
     37 
     38 #include <sys/cdefs.h>
     39 __KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.34 2007/12/29 16:48:03 tsutsui Exp $");
     40 
     41 #include <sys/param.h>
     42 #include <sys/proc.h>
     43 
     44 #include <machine/frame.h>
     45 #include <machine/cpu.h>
     46 #include <machine/hp300spu.h>
     47 #include <machine/vmparam.h>
     48 #include <machine/pte.h>
     49 
     50 #include <hp300/hp300/clockreg.h>
     51 
     52 #include <uvm/uvm_extern.h>
     53 
     54 #define RELOC(v, t)	*((t*)((u_int)&(v) + firstpa))
     55 
     56 extern char *etext;
     57 extern int Sysptsize;
     58 extern char *proc0paddr;
     59 extern st_entry_t *Sysseg;
     60 extern pt_entry_t *Sysptmap, *Sysmap;
     61 extern vaddr_t CLKbase, MMUbase;
     62 extern paddr_t bootinfo_pa;
     63 extern vaddr_t bootinfo_va;
     64 
     65 extern int maxmem, physmem;
     66 extern paddr_t avail_start, avail_end;
     67 extern vaddr_t virtual_avail, virtual_end;
     68 extern vsize_t mem_size;
     69 extern int protection_codes[];
     70 #ifdef M68K_MMU_HP
     71 extern int pmap_aliasmask;
     72 #endif
     73 
     74 void	pmap_bootstrap(paddr_t, paddr_t);
     75 
     76 /*
     77  * Special purpose kernel virtual addresses, used for mapping
     78  * physical pages for a variety of temporary or permanent purposes:
     79  *
     80  *	CADDR1, CADDR2:	pmap zero/copy operations
     81  *	vmmap:		/dev/mem, crash dumps, parity error checking
     82  *	ledbase:	SPU LEDs
     83  *	msgbufaddr:	kernel message buffer
     84  */
     85 void *CADDR1, *CADDR2, *ledbase;
     86 char *vmmap;
     87 void *msgbufaddr;
     88 
     89 /*
     90  * Bootstrap the VM system.
     91  *
     92  * Called with MMU off so we must relocate all global references by `firstpa'
     93  * (don't call any functions here!)  `nextpa' is the first available physical
     94  * memory address.  Returns an updated first PA reflecting the memory we
     95  * have allocated.  MMU is still off when we return.
     96  *
     97  * XXX assumes sizeof(u_int) == sizeof(pt_entry_t)
     98  * XXX a PIC compiler would make this much easier.
     99  */
    100 void
    101 pmap_bootstrap(paddr_t nextpa, paddr_t firstpa)
    102 {
    103 	paddr_t kstpa, kptpa, kptmpa, lkptpa, p0upa;
    104 	u_int nptpages, kstsize;
    105 	st_entry_t protoste, *ste;
    106 	pt_entry_t protopte, *pte, *epte;
    107 
    108 	/*
    109 	 * Calculate important physical addresses:
    110 	 *
    111 	 *	kstpa		kernel segment table	1 page (!040)
    112 	 *						N pages (040)
    113 	 *
    114 	 *	kptpa		statically allocated
    115 	 *			kernel PT pages		Sysptsize+ pages
    116 	 *
    117 	 * [ Sysptsize is the number of pages of PT, IIOMAPSIZE and
    118 	 *   EIOMAPSIZE are the number of PTEs, hence we need to round
    119 	 *   the total to a page boundary with IO maps at the end. ]
    120 	 *
    121 	 *	kptmpa		kernel PT map		1 page
    122 	 *
    123 	 *	lkptpa		last kernel PT page	1 page
    124 	 *
    125 	 *	p0upa		proc 0 u-area		UPAGES pages
    126 	 *
    127 	 * The KVA corresponding to any of these PAs is:
    128 	 *	(PA - firstpa + KERNBASE).
    129 	 */
    130 	if (RELOC(mmutype, int) == MMU_68040)
    131 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
    132 	else
    133 		kstsize = 1;
    134 	kstpa = nextpa;
    135 	nextpa += kstsize * PAGE_SIZE;
    136 	kptmpa = nextpa;
    137 	nextpa += PAGE_SIZE;
    138 	lkptpa = nextpa;
    139 	nextpa += PAGE_SIZE;
    140 	p0upa = nextpa;
    141 	nextpa += USPACE;
    142 	kptpa = nextpa;
    143 	nptpages = RELOC(Sysptsize, int) +
    144 		(IIOMAPSIZE + EIOMAPSIZE + NPTEPG - 1) / NPTEPG;
    145 	nextpa += nptpages * PAGE_SIZE;
    146 
    147 	/*
    148 	 * Initialize segment table and kernel page table map.
    149 	 *
    150 	 * On 68030s and earlier MMUs the two are identical except for
    151 	 * the valid bits so both are initialized with essentially the
    152 	 * same values.  On the 68040, which has a mandatory 3-level
    153 	 * structure, the segment table holds the level 1 table and part
    154 	 * (or all) of the level 2 table and hence is considerably
    155 	 * different.  Here the first level consists of 128 descriptors
    156 	 * (512 bytes) each mapping 32mb of address space.  Each of these
    157 	 * points to blocks of 128 second level descriptors (512 bytes)
    158 	 * each mapping 256kb.  Note that there may be additional "segment
    159 	 * table" pages depending on how large MAXKL2SIZE is.
    160 	 *
    161 	 * Portions of the last segment of KVA space (0xFFF00000 -
    162 	 * 0xFFFFFFFF) are mapped for a couple of purposes.  0xFFF00000
    163 	 * for UPAGES is used for mapping the current process u-area
    164 	 * (u + kernel stack).  The very last page (0xFFFFF000) is mapped
    165 	 * to the last physical page of RAM to give us a region in which
    166 	 * PA == VA.  We use the first part of this page for enabling
    167 	 * and disabling mapping.  The last part of this page also contains
    168 	 * info left by the boot ROM.
    169 	 *
    170 	 * XXX cramming two levels of mapping into the single "segment"
    171 	 * table on the 68040 is intended as a temporary hack to get things
    172 	 * working.  The 224mb of address space that this allows will most
    173 	 * likely be insufficient in the future (at least for the kernel).
    174 	 */
    175 	if (RELOC(mmutype, int) == MMU_68040) {
    176 		int num;
    177 
    178 		/*
    179 		 * First invalidate the entire "segment table" pages
    180 		 * (levels 1 and 2 have the same "invalid" value).
    181 		 */
    182 		pte = (u_int *)kstpa;
    183 		epte = &pte[kstsize * NPTEPG];
    184 		while (pte < epte)
    185 			*pte++ = SG_NV;
    186 		/*
    187 		 * Initialize level 2 descriptors (which immediately
    188 		 * follow the level 1 table).  We need:
    189 		 *	NPTEPG / SG4_LEV3SIZE
    190 		 * level 2 descriptors to map each of the nptpages
    191 		 * pages of PTEs.  Note that we set the "used" bit
    192 		 * now to save the HW the expense of doing it.
    193 		 */
    194 		num = nptpages * (NPTEPG / SG4_LEV3SIZE);
    195 		pte = &((u_int *)kstpa)[SG4_LEV1SIZE];
    196 		epte = &pte[num];
    197 		protoste = kptpa | SG_U | SG_RW | SG_V;
    198 		while (pte < epte) {
    199 			*pte++ = protoste;
    200 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    201 		}
    202 		/*
    203 		 * Initialize level 1 descriptors.  We need:
    204 		 *	roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE
    205 		 * level 1 descriptors to map the `num' level 2's.
    206 		 */
    207 		pte = (u_int *)kstpa;
    208 		epte = &pte[roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE];
    209 		protoste = (u_int)&pte[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V;
    210 		while (pte < epte) {
    211 			*pte++ = protoste;
    212 			protoste += (SG4_LEV2SIZE * sizeof(st_entry_t));
    213 		}
    214 		/*
    215 		 * Initialize the final level 1 descriptor to map the last
    216 		 * block of level 2 descriptors.
    217 		 */
    218 		ste = &((u_int *)kstpa)[SG4_LEV1SIZE-1];
    219 		pte = &((u_int *)kstpa)[kstsize*NPTEPG - SG4_LEV2SIZE];
    220 		*ste = (u_int)pte | SG_U | SG_RW | SG_V;
    221 		/*
    222 		 * Now initialize the final portion of that block of
    223 		 * descriptors to map kptmpa and the "last PT page".
    224 		 */
    225 		pte = &((u_int *)kstpa)[kstsize*NPTEPG - NPTEPG/SG4_LEV3SIZE*2];
    226 		epte = &pte[NPTEPG/SG4_LEV3SIZE];
    227 		protoste = kptmpa | SG_U | SG_RW | SG_V;
    228 		while (pte < epte) {
    229 			*pte++ = protoste;
    230 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    231 		}
    232 		epte = &pte[NPTEPG/SG4_LEV3SIZE];
    233 		protoste = lkptpa | SG_U | SG_RW | SG_V;
    234 		while (pte < epte) {
    235 			*pte++ = protoste;
    236 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    237 		}
    238 		/*
    239 		 * Initialize Sysptmap
    240 		 */
    241 		pte = (u_int *)kptmpa;
    242 		epte = &pte[nptpages];
    243 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    244 		while (pte < epte) {
    245 			*pte++ = protopte;
    246 			protopte += PAGE_SIZE;
    247 		}
    248 		/*
    249 		 * Invalidate all but the last remaining entry.
    250 		 */
    251 		epte = &((u_int *)kptmpa)[NPTEPG-2];
    252 		while (pte < epte) {
    253 			*pte++ = PG_NV;
    254 		}
    255 		/*
    256 		 * Initialize the last ones to point to kptmpa and the page
    257 		 * table page allocated earlier.
    258 		 */
    259 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    260 		pte++;
    261 		*pte = lkptpa | PG_RW | PG_CI | PG_V;
    262 	} else {
    263 		/*
    264 		 * Map the page table pages in both the HW segment table
    265 		 * and the software Sysptmap.
    266 		 */
    267 		ste = (u_int *)kstpa;
    268 		pte = (u_int *)kptmpa;
    269 		epte = &pte[nptpages];
    270 		protoste = kptpa | SG_RW | SG_V;
    271 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    272 		while (pte < epte) {
    273 			*ste++ = protoste;
    274 			*pte++ = protopte;
    275 			protoste += PAGE_SIZE;
    276 			protopte += PAGE_SIZE;
    277 		}
    278 		/*
    279 		 * Invalidate all but the last remaining entries in both.
    280 		 */
    281 		epte = &((u_int *)kptmpa)[NPTEPG-2];
    282 		while (pte < epte) {
    283 			*ste++ = SG_NV;
    284 			*pte++ = PG_NV;
    285 		}
    286 		/*
    287 		 * Initialize the last ones to point to kptmpa and the page
    288 		 * table page allocated earlier.
    289 		 */
    290 		*ste = kptmpa | SG_RW | SG_V;
    291 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    292 		ste++;
    293 		pte++;
    294 		*ste = lkptpa | SG_RW | SG_V;
    295 		*pte = lkptpa | PG_RW | PG_CI | PG_V;
    296 	}
    297 	/*
    298 	 * Invalidate all but the final entry in the last kernel PT page
    299 	 * (u-area PTEs will be validated later).  The final entry maps
    300 	 * the last page of physical memory.
    301 	 */
    302 	pte = (u_int *)lkptpa;
    303 	epte = &pte[NPTEPG-1];
    304 	while (pte < epte)
    305 		*pte++ = PG_NV;
    306 	*pte = MAXADDR | PG_RW | PG_CI | PG_V;
    307 	/*
    308 	 * Initialize kernel page table.
    309 	 * Start by invalidating the `nptpages' that we have allocated.
    310 	 */
    311 	pte = (u_int *)kptpa;
    312 	epte = &pte[nptpages * NPTEPG];
    313 	while (pte < epte)
    314 		*pte++ = PG_NV;
    315 
    316 	/*
    317 	 * The page of kernel text is zero-filled in locore.s,
    318 	 * and not mapped (at VA 0).  The boot loader places the
    319 	 * bootinfo here after the kernel is loaded.  Remember
    320 	 * the physical address; we'll map it to a virtual address
    321 	 * later.
    322 	 */
    323 	RELOC(bootinfo_pa, paddr_t) = firstpa;
    324 
    325 	/*
    326 	 * Validate PTEs for kernel text (RO).  The first page
    327 	 * of kernel text remains invalid; see locore.s
    328 	 */
    329 	pte = &((u_int *)kptpa)[m68k_btop(KERNBASE + PAGE_SIZE)];
    330 	epte = &pte[m68k_btop(m68k_trunc_page(&etext))];
    331 	protopte = (firstpa + PAGE_SIZE) | PG_RO | PG_V;
    332 	while (pte < epte) {
    333 		*pte++ = protopte;
    334 		protopte += PAGE_SIZE;
    335 	}
    336 	/*
    337 	 * Validate PTEs for kernel data/bss, dynamic data allocated
    338 	 * by us so far (nextpa - firstpa bytes), and pages for proc0
    339 	 * u-area and page table allocated below (RW).
    340 	 */
    341 	epte = &((u_int *)kptpa)[m68k_btop(nextpa - firstpa)];
    342 	protopte = (protopte & ~PG_PROT) | PG_RW;
    343 	/*
    344 	 * Enable copy-back caching of data pages
    345 	 */
    346 	if (RELOC(mmutype, int) == MMU_68040)
    347 		protopte |= PG_CCB;
    348 	while (pte < epte) {
    349 		*pte++ = protopte;
    350 		protopte += PAGE_SIZE;
    351 	}
    352 	/*
    353 	 * Finally, validate the internal IO space PTEs (RW+CI).
    354 	 * We do this here since the 320/350 MMU registers (also
    355 	 * used, but to a lesser extent, on other models) are mapped
    356 	 * in this range and it would be nice to be able to access
    357 	 * them after the MMU is turned on.
    358 	 */
    359 
    360 #define	PTE2VA(pte)	m68k_ptob(pte - ((pt_entry_t *)kptpa))
    361 
    362 	protopte = INTIOBASE | PG_RW | PG_CI | PG_V;
    363 	epte = &pte[IIOMAPSIZE];
    364 	RELOC(intiobase, char *) = (char *)PTE2VA(pte);
    365 	RELOC(intiolimit, char *) = (char *)PTE2VA(epte);
    366 	while (pte < epte) {
    367 		*pte++ = protopte;
    368 		protopte += PAGE_SIZE;
    369 	}
    370 	RELOC(extiobase, char *) = (char *)PTE2VA(pte);
    371 	pte += EIOMAPSIZE;
    372 	RELOC(virtual_avail, vaddr_t) = PTE2VA(pte);
    373 
    374 	/*
    375 	 * Calculate important exported kernel virtual addresses
    376 	 */
    377 	/*
    378 	 * Sysseg: base of kernel segment table
    379 	 */
    380 	RELOC(Sysseg, st_entry_t *) =
    381 		(st_entry_t *)(kstpa - firstpa);
    382 	/*
    383 	 * Sysptmap: base of kernel page table map
    384 	 */
    385 	RELOC(Sysptmap, pt_entry_t *) =
    386 		(pt_entry_t *)(kptmpa - firstpa);
    387 	/*
    388 	 * Sysmap: kernel page table (as mapped through Sysptmap)
    389 	 * Allocated at the end of KVA space.
    390 	 */
    391 	RELOC(Sysmap, pt_entry_t *) =
    392 	    (pt_entry_t *)m68k_ptob((NPTEPG - 2) * NPTEPG);
    393 	/*
    394 	 * CLKbase, MMUbase: important registers in internal IO space
    395 	 * accessed from assembly language.
    396 	 */
    397 	RELOC(CLKbase, vaddr_t) =
    398 		(vaddr_t)RELOC(intiobase, char *) + CLKBASE;
    399 	RELOC(MMUbase, vaddr_t) =
    400 		(vaddr_t)RELOC(intiobase, char *) + MMUBASE;
    401 
    402 	/*
    403 	 * Setup u-area for process 0.
    404 	 */
    405 	/*
    406 	 * Zero the u-area.
    407 	 * NOTE: `pte' and `epte' aren't PTEs here.
    408 	 */
    409 	pte = (u_int *)p0upa;
    410 	epte = (u_int *)(p0upa + USPACE);
    411 	while (pte < epte)
    412 		*pte++ = 0;
    413 	/*
    414 	 * Remember the u-area address so it can be loaded in the
    415 	 * proc struct p_addr field later.
    416 	 */
    417 	RELOC(proc0paddr, char *) = (char *)(p0upa - firstpa);
    418 
    419 	/*
    420 	 * VM data structures are now initialized, set up data for
    421 	 * the pmap module.
    422 	 *
    423 	 * Note about avail_end: msgbuf is initialized just after
    424 	 * avail_end in machdep.c.  Since the last page is used
    425 	 * for rebooting the system (code is copied there and
    426 	 * excution continues from copied code before the MMU
    427 	 * is disabled), the msgbuf will get trounced between
    428 	 * reboots if it's placed in the last physical page.
    429 	 * To work around this, we move avail_end back one more
    430 	 * page so the msgbuf can be preserved.
    431 	 */
    432 	RELOC(avail_start, paddr_t) = nextpa;
    433 	RELOC(avail_end, paddr_t) = m68k_ptob(RELOC(maxmem, int)) -
    434 	    (m68k_round_page(MSGBUFSIZE) + m68k_ptob(1));
    435 	RELOC(mem_size, vsize_t) = m68k_ptob(RELOC(physmem, int));
    436 	RELOC(virtual_end, vaddr_t) = VM_MAX_KERNEL_ADDRESS;
    437 
    438 #ifdef M68K_MMU_HP
    439 	/*
    440 	 * Determine VA aliasing distance if any
    441 	 */
    442 	if (RELOC(ectype, int) == EC_VIRT) {
    443 		if (RELOC(machineid, int) == HP_320)
    444 			RELOC(pmap_aliasmask, int) = 0x3fff;	/* 16k */
    445 		else if (RELOC(machineid, int) == HP_350)
    446 			RELOC(pmap_aliasmask, int) = 0x7fff;	/* 32k */
    447 	}
    448 #endif
    449 
    450 	/*
    451 	 * Initialize protection array.
    452 	 * XXX don't use a switch statement, it might produce an
    453 	 * absolute "jmp" table.
    454 	 */
    455 	{
    456 		int *kp;
    457 
    458 		kp = &RELOC(protection_codes, int);
    459 		kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_NONE] = 0;
    460 		kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_NONE] = PG_RO;
    461 		kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO;
    462 		kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO;
    463 		kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW;
    464 		kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW;
    465 		kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW;
    466 		kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW;
    467 	}
    468 
    469 	/*
    470 	 * Kernel page/segment table allocated above,
    471 	 * just initialize pointers.
    472 	 */
    473 	{
    474 		struct pmap *kpm = &RELOC(kernel_pmap_store, struct pmap);
    475 
    476 		kpm->pm_stab = RELOC(Sysseg, st_entry_t *);
    477 		kpm->pm_ptab = RELOC(Sysmap, pt_entry_t *);
    478 		simple_lock_init(&kpm->pm_lock);
    479 		kpm->pm_count = 1;
    480 		kpm->pm_stpa = (st_entry_t *)kstpa;
    481 		/*
    482 		 * For the 040 we also initialize the free level 2
    483 		 * descriptor mask noting that we have used:
    484 		 *	0:		level 1 table
    485 		 *	1 to `num':	map page tables
    486 		 *	MAXKL2SIZE-1:	maps kptmpa and last-page page table
    487 		 */
    488 		if (RELOC(mmutype, int) == MMU_68040) {
    489 			int num;
    490 
    491 			kpm->pm_stfree = ~l2tobm(0);
    492 			num = roundup(nptpages * (NPTEPG / SG4_LEV3SIZE),
    493 				      SG4_LEV2SIZE) / SG4_LEV2SIZE;
    494 			while (num)
    495 				kpm->pm_stfree &= ~l2tobm(num--);
    496 			kpm->pm_stfree &= ~l2tobm(MAXKL2SIZE-1);
    497 			for (num = MAXKL2SIZE;
    498 			     num < sizeof(kpm->pm_stfree)*NBBY;
    499 			     num++)
    500 				kpm->pm_stfree &= ~l2tobm(num);
    501 		}
    502 	}
    503 
    504 	/*
    505 	 * Allocate some fixed, special purpose kernel virtual addresses
    506 	 */
    507 	{
    508 		vaddr_t va = RELOC(virtual_avail, vaddr_t);
    509 
    510 		RELOC(bootinfo_va, vaddr_t) = (vaddr_t)va;
    511 		va += PAGE_SIZE;
    512 		RELOC(CADDR1, void *) = (void *)va;
    513 		va += PAGE_SIZE;
    514 		RELOC(CADDR2, void *) = (void *)va;
    515 		va += PAGE_SIZE;
    516 		RELOC(vmmap, void *) = (void *)va;
    517 		va += PAGE_SIZE;
    518 		RELOC(ledbase, void *) = (void *)va;
    519 		va += PAGE_SIZE;
    520 		RELOC(msgbufaddr, void *) = (void *)va;
    521 		va += m68k_round_page(MSGBUFSIZE);
    522 		RELOC(virtual_avail, vaddr_t) = va;
    523 	}
    524 }
    525