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pmap_bootstrap.c revision 1.37
      1 /*	$NetBSD: pmap_bootstrap.c,v 1.37 2009/01/17 07:17:35 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1991, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  *	@(#)pmap_bootstrap.c	8.1 (Berkeley) 6/10/93
     36  */
     37 
     38 #include <sys/cdefs.h>
     39 __KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.37 2009/01/17 07:17:35 tsutsui Exp $");
     40 
     41 #include <sys/param.h>
     42 #include <sys/proc.h>
     43 
     44 #include <machine/frame.h>
     45 #include <machine/cpu.h>
     46 #include <machine/hp300spu.h>
     47 #include <machine/vmparam.h>
     48 #include <machine/pte.h>
     49 
     50 #include <hp300/hp300/clockreg.h>
     51 
     52 #include <uvm/uvm_extern.h>
     53 
     54 #define RELOC(v, t)	*((t*)((uintptr_t)&(v) + firstpa))
     55 #define RELOCPTR(v, t)	((t)((uintptr_t)RELOC((v), t) + firstpa))
     56 
     57 extern char *etext;
     58 extern char *proc0paddr;
     59 extern vaddr_t CLKbase, MMUbase;
     60 extern paddr_t bootinfo_pa;
     61 extern vaddr_t bootinfo_va;
     62 
     63 extern int maxmem, physmem;
     64 extern paddr_t avail_start, avail_end;
     65 #ifdef M68K_MMU_HP
     66 extern int pmap_aliasmask;
     67 #endif
     68 
     69 void	pmap_bootstrap(paddr_t, paddr_t);
     70 
     71 /*
     72  * Special purpose kernel virtual addresses, used for mapping
     73  * physical pages for a variety of temporary or permanent purposes:
     74  *
     75  *	CADDR1, CADDR2:	pmap zero/copy operations
     76  *	vmmap:		/dev/mem, crash dumps, parity error checking
     77  *	ledbase:	SPU LEDs
     78  *	msgbufaddr:	kernel message buffer
     79  */
     80 void *CADDR1, *CADDR2, *ledbase;
     81 char *vmmap;
     82 void *msgbufaddr;
     83 
     84 /*
     85  * Bootstrap the VM system.
     86  *
     87  * Called with MMU off so we must relocate all global references by `firstpa'
     88  * (don't call any functions here!)  `nextpa' is the first available physical
     89  * memory address.  Returns an updated first PA reflecting the memory we
     90  * have allocated.  MMU is still off when we return.
     91  *
     92  * XXX assumes sizeof(u_int) == sizeof(pt_entry_t)
     93  * XXX a PIC compiler would make this much easier.
     94  */
     95 void
     96 pmap_bootstrap(paddr_t nextpa, paddr_t firstpa)
     97 {
     98 	paddr_t kstpa, kptpa, kptmpa, lkptpa, p0upa;
     99 	u_int nptpages, kstsize;
    100 	st_entry_t protoste, *ste;
    101 	pt_entry_t protopte, *pte, *epte;
    102 
    103 	/*
    104 	 * Calculate important physical addresses:
    105 	 *
    106 	 *	kstpa		kernel segment table	1 page (!040)
    107 	 *						N pages (040)
    108 	 *
    109 	 *	kptpa		statically allocated
    110 	 *			kernel PT pages		Sysptsize+ pages
    111 	 *
    112 	 * [ Sysptsize is the number of pages of PT, IIOMAPSIZE and
    113 	 *   EIOMAPSIZE are the number of PTEs, hence we need to round
    114 	 *   the total to a page boundary with IO maps at the end. ]
    115 	 *
    116 	 *	kptmpa		kernel PT map		1 page
    117 	 *
    118 	 *	lkptpa		last kernel PT page	1 page
    119 	 *
    120 	 *	p0upa		proc 0 u-area		UPAGES pages
    121 	 *
    122 	 * The KVA corresponding to any of these PAs is:
    123 	 *	(PA - firstpa + KERNBASE).
    124 	 */
    125 	if (RELOC(mmutype, int) == MMU_68040)
    126 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
    127 	else
    128 		kstsize = 1;
    129 	kstpa = nextpa;
    130 	nextpa += kstsize * PAGE_SIZE;
    131 	kptmpa = nextpa;
    132 	nextpa += PAGE_SIZE;
    133 	lkptpa = nextpa;
    134 	nextpa += PAGE_SIZE;
    135 	p0upa = nextpa;
    136 	nextpa += USPACE;
    137 	kptpa = nextpa;
    138 	nptpages = RELOC(Sysptsize, int) +
    139 		(IIOMAPSIZE + EIOMAPSIZE + NPTEPG - 1) / NPTEPG;
    140 	nextpa += nptpages * PAGE_SIZE;
    141 
    142 	/*
    143 	 * Initialize segment table and kernel page table map.
    144 	 *
    145 	 * On 68030s and earlier MMUs the two are identical except for
    146 	 * the valid bits so both are initialized with essentially the
    147 	 * same values.  On the 68040, which has a mandatory 3-level
    148 	 * structure, the segment table holds the level 1 table and part
    149 	 * (or all) of the level 2 table and hence is considerably
    150 	 * different.  Here the first level consists of 128 descriptors
    151 	 * (512 bytes) each mapping 32mb of address space.  Each of these
    152 	 * points to blocks of 128 second level descriptors (512 bytes)
    153 	 * each mapping 256kb.  Note that there may be additional "segment
    154 	 * table" pages depending on how large MAXKL2SIZE is.
    155 	 *
    156 	 * Portions of the last two segment of KVA space (0xFF800000 -
    157 	 * 0xFFFFFFFF) are mapped for a couple of purposes.
    158 	 * The first segment (0xFF800000 - 0xFFBFFFFF) is mapped
    159 	 * for the kernel page tables.
    160 	 * The very last page (0xFFFFF000) in the second segment is mapped
    161 	 * to the last physical page of RAM to give us a region in which
    162 	 * PA == VA.  We use the first part of this page for enabling
    163 	 * and disabling mapping.  The last part of this page also contains
    164 	 * info left by the boot ROM.
    165 	 *
    166 	 * XXX cramming two levels of mapping into the single "segment"
    167 	 * table on the 68040 is intended as a temporary hack to get things
    168 	 * working.  The 224mb of address space that this allows will most
    169 	 * likely be insufficient in the future (at least for the kernel).
    170 	 */
    171 	if (RELOC(mmutype, int) == MMU_68040) {
    172 		int num;
    173 
    174 		/*
    175 		 * First invalidate the entire "segment table" pages
    176 		 * (levels 1 and 2 have the same "invalid" value).
    177 		 */
    178 		pte = (u_int *)kstpa;
    179 		epte = &pte[kstsize * NPTEPG];
    180 		while (pte < epte)
    181 			*pte++ = SG_NV;
    182 		/*
    183 		 * Initialize level 2 descriptors (which immediately
    184 		 * follow the level 1 table).  We need:
    185 		 *	NPTEPG / SG4_LEV3SIZE
    186 		 * level 2 descriptors to map each of the nptpages
    187 		 * pages of PTEs.  Note that we set the "used" bit
    188 		 * now to save the HW the expense of doing it.
    189 		 */
    190 		num = nptpages * (NPTEPG / SG4_LEV3SIZE);
    191 		pte = &((u_int *)kstpa)[SG4_LEV1SIZE];
    192 		epte = &pte[num];
    193 		protoste = kptpa | SG_U | SG_RW | SG_V;
    194 		while (pte < epte) {
    195 			*pte++ = protoste;
    196 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    197 		}
    198 		/*
    199 		 * Initialize level 1 descriptors.  We need:
    200 		 *	roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE
    201 		 * level 1 descriptors to map the `num' level 2's.
    202 		 */
    203 		pte = (u_int *)kstpa;
    204 		epte = &pte[roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE];
    205 		protoste = (u_int)&pte[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V;
    206 		while (pte < epte) {
    207 			*pte++ = protoste;
    208 			protoste += (SG4_LEV2SIZE * sizeof(st_entry_t));
    209 		}
    210 		/*
    211 		 * Initialize the final level 1 descriptor to map the last
    212 		 * block of level 2 descriptors.
    213 		 */
    214 		ste = &((u_int *)kstpa)[SG4_LEV1SIZE-1];
    215 		pte = &((u_int *)kstpa)[kstsize*NPTEPG - SG4_LEV2SIZE];
    216 		*ste = (u_int)pte | SG_U | SG_RW | SG_V;
    217 		/*
    218 		 * Now initialize the final portion of that block of
    219 		 * descriptors to map kptmpa and the "last PT page".
    220 		 */
    221 		pte = &((u_int *)kstpa)[kstsize*NPTEPG - NPTEPG/SG4_LEV3SIZE*2];
    222 		epte = &pte[NPTEPG/SG4_LEV3SIZE];
    223 		protoste = kptmpa | SG_U | SG_RW | SG_V;
    224 		while (pte < epte) {
    225 			*pte++ = protoste;
    226 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    227 		}
    228 		epte = &pte[NPTEPG/SG4_LEV3SIZE];
    229 		protoste = lkptpa | SG_U | SG_RW | SG_V;
    230 		while (pte < epte) {
    231 			*pte++ = protoste;
    232 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    233 		}
    234 		/*
    235 		 * Initialize Sysptmap
    236 		 */
    237 		pte = (u_int *)kptmpa;
    238 		epte = &pte[nptpages];
    239 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    240 		while (pte < epte) {
    241 			*pte++ = protopte;
    242 			protopte += PAGE_SIZE;
    243 		}
    244 		/*
    245 		 * Invalidate all but the last remaining entry.
    246 		 */
    247 		epte = &((u_int *)kptmpa)[NPTEPG-2];
    248 		while (pte < epte) {
    249 			*pte++ = PG_NV;
    250 		}
    251 		/*
    252 		 * Initialize the last ones to point to kptmpa and the page
    253 		 * table page allocated earlier.
    254 		 */
    255 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    256 		pte++;
    257 		*pte = lkptpa | PG_RW | PG_CI | PG_V;
    258 	} else {
    259 		/*
    260 		 * Map the page table pages in both the HW segment table
    261 		 * and the software Sysptmap.
    262 		 */
    263 		ste = (u_int *)kstpa;
    264 		pte = (u_int *)kptmpa;
    265 		epte = &pte[nptpages];
    266 		protoste = kptpa | SG_RW | SG_V;
    267 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    268 		while (pte < epte) {
    269 			*ste++ = protoste;
    270 			*pte++ = protopte;
    271 			protoste += PAGE_SIZE;
    272 			protopte += PAGE_SIZE;
    273 		}
    274 		/*
    275 		 * Invalidate all but the last remaining entries in both.
    276 		 */
    277 		epte = &((u_int *)kptmpa)[NPTEPG-2];
    278 		while (pte < epte) {
    279 			*ste++ = SG_NV;
    280 			*pte++ = PG_NV;
    281 		}
    282 		/*
    283 		 * Initialize the last ones to point to kptmpa and the page
    284 		 * table page allocated earlier.
    285 		 */
    286 		*ste = kptmpa | SG_RW | SG_V;
    287 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    288 		ste++;
    289 		pte++;
    290 		*ste = lkptpa | SG_RW | SG_V;
    291 		*pte = lkptpa | PG_RW | PG_CI | PG_V;
    292 	}
    293 	/*
    294 	 * Invalidate all but the final entry in the last kernel PT page
    295 	 * (u-area PTEs will be validated later).  The final entry maps
    296 	 * the last page of physical memory.
    297 	 */
    298 	pte = (u_int *)lkptpa;
    299 	epte = &pte[NPTEPG-1];
    300 	while (pte < epte)
    301 		*pte++ = PG_NV;
    302 	*pte = MAXADDR | PG_RW | PG_CI | PG_V;
    303 	/*
    304 	 * Initialize kernel page table.
    305 	 * Start by invalidating the `nptpages' that we have allocated.
    306 	 */
    307 	pte = (u_int *)kptpa;
    308 	epte = &pte[nptpages * NPTEPG];
    309 	while (pte < epte)
    310 		*pte++ = PG_NV;
    311 
    312 	/*
    313 	 * The page of kernel text is zero-filled in locore.s,
    314 	 * and not mapped (at VA 0).  The boot loader places the
    315 	 * bootinfo here after the kernel is loaded.  Remember
    316 	 * the physical address; we'll map it to a virtual address
    317 	 * later.
    318 	 */
    319 	RELOC(bootinfo_pa, paddr_t) = firstpa;
    320 
    321 	/*
    322 	 * Validate PTEs for kernel text (RO).  The first page
    323 	 * of kernel text remains invalid; see locore.s
    324 	 */
    325 	pte = &((u_int *)kptpa)[m68k_btop(KERNBASE + PAGE_SIZE)];
    326 	epte = &pte[m68k_btop(m68k_trunc_page(&etext))];
    327 	protopte = (firstpa + PAGE_SIZE) | PG_RO | PG_V;
    328 	while (pte < epte) {
    329 		*pte++ = protopte;
    330 		protopte += PAGE_SIZE;
    331 	}
    332 	/*
    333 	 * Validate PTEs for kernel data/bss, dynamic data allocated
    334 	 * by us so far (nextpa - firstpa bytes), and pages for proc0
    335 	 * u-area and page table allocated below (RW).
    336 	 */
    337 	epte = &((u_int *)kptpa)[m68k_btop(nextpa - firstpa)];
    338 	protopte = (protopte & ~PG_PROT) | PG_RW;
    339 	/*
    340 	 * Enable copy-back caching of data pages
    341 	 */
    342 	if (RELOC(mmutype, int) == MMU_68040)
    343 		protopte |= PG_CCB;
    344 	while (pte < epte) {
    345 		*pte++ = protopte;
    346 		protopte += PAGE_SIZE;
    347 	}
    348 	/*
    349 	 * Finally, validate the internal IO space PTEs (RW+CI).
    350 	 * We do this here since the 320/350 MMU registers (also
    351 	 * used, but to a lesser extent, on other models) are mapped
    352 	 * in this range and it would be nice to be able to access
    353 	 * them after the MMU is turned on.
    354 	 */
    355 
    356 #define	PTE2VA(pte)	m68k_ptob(pte - ((pt_entry_t *)kptpa))
    357 
    358 	protopte = INTIOBASE | PG_RW | PG_CI | PG_V;
    359 	epte = &pte[IIOMAPSIZE];
    360 	RELOC(intiobase, char *) = (char *)PTE2VA(pte);
    361 	RELOC(intiolimit, char *) = (char *)PTE2VA(epte);
    362 	while (pte < epte) {
    363 		*pte++ = protopte;
    364 		protopte += PAGE_SIZE;
    365 	}
    366 	RELOC(extiobase, char *) = (char *)PTE2VA(pte);
    367 	pte += EIOMAPSIZE;
    368 	RELOC(virtual_avail, vaddr_t) = PTE2VA(pte);
    369 
    370 	/*
    371 	 * Calculate important exported kernel virtual addresses
    372 	 */
    373 	/*
    374 	 * Sysseg: base of kernel segment table
    375 	 */
    376 	RELOC(Sysseg, st_entry_t *) =
    377 		(st_entry_t *)(kstpa - firstpa);
    378 	/*
    379 	 * Sysptmap: base of kernel page table map
    380 	 */
    381 	RELOC(Sysptmap, pt_entry_t *) =
    382 		(pt_entry_t *)(kptmpa - firstpa);
    383 	/*
    384 	 * Sysmap: kernel page table (as mapped through Sysptmap)
    385 	 * Allocated at the end of KVA space.
    386 	 */
    387 	RELOC(Sysmap, pt_entry_t *) =
    388 	    (pt_entry_t *)m68k_ptob((NPTEPG - 2) * NPTEPG);
    389 	/*
    390 	 * CLKbase, MMUbase: important registers in internal IO space
    391 	 * accessed from assembly language.
    392 	 */
    393 	RELOC(CLKbase, vaddr_t) =
    394 		(vaddr_t)RELOC(intiobase, char *) + CLKBASE;
    395 	RELOC(MMUbase, vaddr_t) =
    396 		(vaddr_t)RELOC(intiobase, char *) + MMUBASE;
    397 
    398 	/*
    399 	 * Setup u-area for process 0.
    400 	 */
    401 	/*
    402 	 * Zero the u-area.
    403 	 * NOTE: `pte' and `epte' aren't PTEs here.
    404 	 */
    405 	pte = (u_int *)p0upa;
    406 	epte = (u_int *)(p0upa + USPACE);
    407 	while (pte < epte)
    408 		*pte++ = 0;
    409 	/*
    410 	 * Remember the u-area address so it can be loaded in the
    411 	 * proc struct p_addr field later.
    412 	 */
    413 	RELOC(proc0paddr, char *) = (char *)(p0upa - firstpa);
    414 
    415 	/*
    416 	 * VM data structures are now initialized, set up data for
    417 	 * the pmap module.
    418 	 *
    419 	 * Note about avail_end: msgbuf is initialized just after
    420 	 * avail_end in machdep.c.  Since the last page is used
    421 	 * for rebooting the system (code is copied there and
    422 	 * excution continues from copied code before the MMU
    423 	 * is disabled), the msgbuf will get trounced between
    424 	 * reboots if it's placed in the last physical page.
    425 	 * To work around this, we move avail_end back one more
    426 	 * page so the msgbuf can be preserved.
    427 	 */
    428 	RELOC(avail_start, paddr_t) = nextpa;
    429 	RELOC(avail_end, paddr_t) = m68k_ptob(RELOC(maxmem, int)) -
    430 	    (m68k_round_page(MSGBUFSIZE) + m68k_ptob(1));
    431 	RELOC(mem_size, vsize_t) = m68k_ptob(RELOC(physmem, int));
    432 	RELOC(virtual_end, vaddr_t) = VM_MAX_KERNEL_ADDRESS;
    433 
    434 #ifdef M68K_MMU_HP
    435 	/*
    436 	 * Determine VA aliasing distance if any
    437 	 */
    438 	if (RELOC(ectype, int) == EC_VIRT) {
    439 		if (RELOC(machineid, int) == HP_320)
    440 			RELOC(pmap_aliasmask, int) = 0x3fff;	/* 16k */
    441 		else if (RELOC(machineid, int) == HP_350)
    442 			RELOC(pmap_aliasmask, int) = 0x7fff;	/* 32k */
    443 	}
    444 #endif
    445 
    446 	/*
    447 	 * Initialize protection array.
    448 	 * XXX don't use a switch statement, it might produce an
    449 	 * absolute "jmp" table.
    450 	 */
    451 	{
    452 		u_int *kp;
    453 
    454 		kp = &RELOC(protection_codes, u_int);
    455 		kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_NONE] = 0;
    456 		kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_NONE] = PG_RO;
    457 		kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO;
    458 		kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO;
    459 		kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW;
    460 		kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW;
    461 		kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW;
    462 		kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW;
    463 	}
    464 
    465 	/*
    466 	 * Kernel page/segment table allocated above,
    467 	 * just initialize pointers.
    468 	 */
    469 	{
    470 		struct pmap *kpm;
    471 
    472 		kpm = RELOCPTR(kernel_pmap_ptr, struct pmap *);
    473 
    474 		kpm->pm_stab = RELOC(Sysseg, st_entry_t *);
    475 		kpm->pm_ptab = RELOC(Sysmap, pt_entry_t *);
    476 		simple_lock_init(&kpm->pm_lock);
    477 		kpm->pm_count = 1;
    478 		kpm->pm_stpa = (st_entry_t *)kstpa;
    479 		/*
    480 		 * For the 040 we also initialize the free level 2
    481 		 * descriptor mask noting that we have used:
    482 		 *	0:		level 1 table
    483 		 *	1 to `num':	map page tables
    484 		 *	MAXKL2SIZE-1:	maps kptmpa and last-page page table
    485 		 */
    486 		if (RELOC(mmutype, int) == MMU_68040) {
    487 			int num;
    488 
    489 			kpm->pm_stfree = ~l2tobm(0);
    490 			num = roundup(nptpages * (NPTEPG / SG4_LEV3SIZE),
    491 				      SG4_LEV2SIZE) / SG4_LEV2SIZE;
    492 			while (num)
    493 				kpm->pm_stfree &= ~l2tobm(num--);
    494 			kpm->pm_stfree &= ~l2tobm(MAXKL2SIZE-1);
    495 			for (num = MAXKL2SIZE;
    496 			     num < sizeof(kpm->pm_stfree)*NBBY;
    497 			     num++)
    498 				kpm->pm_stfree &= ~l2tobm(num);
    499 		}
    500 	}
    501 
    502 	/*
    503 	 * Allocate some fixed, special purpose kernel virtual addresses
    504 	 */
    505 	{
    506 		vaddr_t va = RELOC(virtual_avail, vaddr_t);
    507 
    508 		RELOC(bootinfo_va, vaddr_t) = (vaddr_t)va;
    509 		va += PAGE_SIZE;
    510 		RELOC(CADDR1, void *) = (void *)va;
    511 		va += PAGE_SIZE;
    512 		RELOC(CADDR2, void *) = (void *)va;
    513 		va += PAGE_SIZE;
    514 		RELOC(vmmap, void *) = (void *)va;
    515 		va += PAGE_SIZE;
    516 		RELOC(ledbase, void *) = (void *)va;
    517 		va += PAGE_SIZE;
    518 		RELOC(msgbufaddr, void *) = (void *)va;
    519 		va += m68k_round_page(MSGBUFSIZE);
    520 		RELOC(virtual_avail, vaddr_t) = va;
    521 	}
    522 }
    523