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      1 /*	$NetBSD: 7750.h,v 1.5 2008/04/28 20:23:20 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _HPCBOOT_SH_CPU_7750_H_
     33 #define	_HPCBOOT_SH_CPU_7750_H_
     34 
     35 #define	SH7750_CACHE_FLUSH()						\
     36 __BEGIN_MACRO								\
     37 	uint32_t __e, __a;						\
     38 									\
     39 	/* D-cache */							\
     40 	for (__e = 0; __e < (SH4_DCACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
     41 		__a = SH4REG_CCDA | (__e << CCDA_ENTRY_SHIFT);		\
     42 		VOLATILE_REF(__a) &= ~(CCDA_U | CCDA_V);		\
     43 	}								\
     44 	/* I-cache  */							\
     45 	for (__e = 0; __e < (SH4_ICACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
     46 		__a = SH4REG_CCIA | (__e << CCIA_ENTRY_SHIFT);		\
     47 		VOLATILE_REF(__a) &= ~(CCIA_V);				\
     48 	}								\
     49 __END_MACRO
     50 
     51 #define	SH7750_MMU_DISABLE	SH4_MMU_DISABLE
     52 
     53 #endif // _HPCBOOT_SH_CPU_7750_H_
     54