7750.h revision 1.5 1 1.5 martin /* $NetBSD: 7750.h,v 1.5 2008/04/28 20:23:20 martin Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.1 uch * by UCHIYAMA Yasushi.
9 1.1 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 uch * notice, this list of conditions and the following disclaimer in the
17 1.1 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.1 uch
32 1.1 uch #ifndef _HPCBOOT_SH_CPU_7750_H_
33 1.2 uch #define _HPCBOOT_SH_CPU_7750_H_
34 1.1 uch
35 1.2 uch #define SH7750_CACHE_FLUSH() \
36 1.1 uch __BEGIN_MACRO \
37 1.4 uwe uint32_t __e, __a; \
38 1.1 uch \
39 1.1 uch /* D-cache */ \
40 1.1 uch for (__e = 0; __e < (SH4_DCACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
41 1.1 uch __a = SH4REG_CCDA | (__e << CCDA_ENTRY_SHIFT); \
42 1.1 uch VOLATILE_REF(__a) &= ~(CCDA_U | CCDA_V); \
43 1.1 uch } \
44 1.1 uch /* I-cache */ \
45 1.1 uch for (__e = 0; __e < (SH4_ICACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
46 1.1 uch __a = SH4REG_CCIA | (__e << CCIA_ENTRY_SHIFT); \
47 1.1 uch VOLATILE_REF(__a) &= ~(CCIA_V); \
48 1.1 uch } \
49 1.1 uch __END_MACRO
50 1.1 uch
51 1.2 uch #define SH7750_MMU_DISABLE SH4_MMU_DISABLE
52 1.1 uch
53 1.1 uch #endif // _HPCBOOT_SH_CPU_7750_H_
54