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      1  1.5  martin /* -*-C++-*-	$NetBSD: sh_dev.cpp,v 1.5 2008/04/28 20:23:20 martin Exp $	*/
      2  1.1     uch 
      3  1.1     uch /*-
      4  1.1     uch  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5  1.1     uch  * All rights reserved.
      6  1.1     uch  *
      7  1.1     uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     uch  * by UCHIYAMA Yasushi.
      9  1.1     uch  *
     10  1.1     uch  * Redistribution and use in source and binary forms, with or without
     11  1.1     uch  * modification, are permitted provided that the following conditions
     12  1.1     uch  * are met:
     13  1.1     uch  * 1. Redistributions of source code must retain the above copyright
     14  1.1     uch  *    notice, this list of conditions and the following disclaimer.
     15  1.1     uch  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1     uch  *    notice, this list of conditions and the following disclaimer in the
     17  1.1     uch  *    documentation and/or other materials provided with the distribution.
     18  1.1     uch  *
     19  1.1     uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1     uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1     uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1     uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1     uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1     uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1     uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1     uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1     uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1     uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1     uch  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1     uch  */
     31  1.1     uch 
     32  1.1     uch #include <hpcboot.h>
     33  1.1     uch #include <hpcmenu.h>
     34  1.1     uch #include <console.h>
     35  1.1     uch 
     36  1.1     uch #include <sh3/sh_mmu.h>
     37  1.1     uch #include <sh3/dev/sh_dev.h>
     38  1.1     uch 
     39  1.1     uch #include <sh3/dev/sh.h>
     40  1.1     uch 
     41  1.1     uch SHdev::SHdev()
     42  1.1     uch {
     43  1.1     uch 
     44  1.2     uch 	_menu = &HpcMenuInterface::Instance();
     45  1.1     uch 	_cons = Console::Instance();
     46  1.1     uch }
     47  1.1     uch 
     48  1.1     uch void
     49  1.4     uwe SHdev::dump(uint8_t bit)
     50  1.1     uch {
     51  1.4     uwe 	uint32_t reg = 0;
     52  1.1     uch 	int kmode;
     53  1.1     uch 
     54  1.1     uch 	DPRINTF((TEXT("DEBUG BIT: ")));
     55  1.1     uch 	bitdisp(bit);
     56  1.1     uch 
     57  1.1     uch 	if (bit & DUMP_CPU) {
     58  1.1     uch 		// Cache
     59  1.1     uch 		MemoryManager_SHMMU::CacheDump();
     60  1.1     uch 		// MMU
     61  1.1     uch 		MemoryManager_SHMMU::MMUDump();
     62  1.1     uch 		// Status register
     63  1.1     uch 		kmode = SetKMode(1);
     64  1.1     uch 		__asm(
     65  1.1     uch 			"stc	sr, r0\n"
     66  1.1     uch 			"mov.l	r0, @r4", &reg);
     67  1.1     uch 		SetKMode(kmode);
     68  1.1     uch 		DPRINTF((TEXT("SR: ")));
     69  1.1     uch 		bitdisp(reg);
     70  1.1     uch 	}
     71  1.1     uch 
     72  1.1     uch 	if (bit & DUMP_DEV) {
     73  1.1     uch 		kmode = SetKMode(1);
     74  1.1     uch 		print_stack_pointer();
     75  1.1     uch 		// SCIF
     76  1.1     uch 		scif_dump(HPC_PREFERENCE.serial_speed);
     77  1.1     uch 		SetKMode(kmode);
     78  1.1     uch 	}
     79  1.1     uch }
     80  1.1     uch 
     81  1.1     uch void
     82  1.1     uch SHdev::print_stack_pointer(void)
     83  1.1     uch {
     84  1.1     uch 	int sp;
     85  1.1     uch 
     86  1.1     uch 	__asm("mov.l	r15, @r4", &sp);
     87  1.1     uch 	DPRINTF((TEXT("SP 0x%08x\n"), sp));
     88  1.1     uch }
     89  1.1     uch 
     90  1.1     uch //
     91  1.1     uch // SH3/SH4 common functions.
     92  1.1     uch //
     93  1.1     uch // SCIF
     94  1.1     uch void
     95  1.1     uch SHdev::scif_dump(int bps)
     96  1.1     uch {
     97  1.4     uwe 	uint16_t r16;
     98  1.4     uwe 	uint32_t r;
     99  1.1     uch 	int n;
    100  1.1     uch 
    101  1.1     uch 	print_stack_pointer();
    102  1.1     uch 	DPRINTF((TEXT("<<<SCIF>>>\n")));
    103  1.1     uch 	/* mode */
    104  1.1     uch 	r = _scif_reg_read(SH3_SCSMR2);
    105  1.1     uch 	n = 1 << ((r & SCSMR2_CKS) << 1);
    106  1.1     uch 	DPRINTF((TEXT("mode: %dbit %S-parity %d stop bit clock PCLOCK/%d\n"),
    107  1.1     uch 	    r & SCSMR2_CHR ? 7 : 8,
    108  1.1     uch 	    r & SCSMR2_PE  ? r & SCSMR2_OE ? "odd" : "even" : "non",
    109  1.1     uch 	    r & SCSMR2_STOP ? 2 : 1,
    110  1.1     uch 	    n));
    111  1.1     uch 	/* bit rate */
    112  1.1     uch 	r = _scif_reg_read(SH3_SCBRR2);
    113  1.1     uch 	DPRINTF((TEXT("SCBRR=%d(%dbps) estimated PCLOCK %dHz\n"), r, bps,
    114  1.1     uch 	    32 * bps *(r + 1) * n));
    115  1.1     uch 
    116  1.1     uch 	/* control */
    117  1.2     uch #define	DBG_BIT_PRINT(r, m)	_dbg_bit_print(r, SCSCR2_##m, #m)
    118  1.1     uch 	DPRINTF((TEXT("SCSCR2: ")));
    119  1.1     uch 	r = _scif_reg_read(SH3_SCSCR2);
    120  1.1     uch 	DBG_BIT_PRINT(r, TIE);
    121  1.1     uch 	DBG_BIT_PRINT(r, RIE);
    122  1.1     uch 	DBG_BIT_PRINT(r, TE);
    123  1.1     uch 	DBG_BIT_PRINT(r, RE);
    124  1.1     uch 	DPRINTF((TEXT("CKE=%d\n"), r & SCSCR2_CKE));
    125  1.1     uch #undef	DBG_BIT_PRINT
    126  1.1     uch 
    127  1.1     uch 	/* status */
    128  1.2     uch #define	DBG_BIT_PRINT(r, m)	_dbg_bit_print(r, SCSSR2_##m, #m)
    129  1.1     uch 	r16 = _reg_read_2(SH3_SCSSR2);
    130  1.1     uch 	DPRINTF((TEXT("SCSSR2: ")));
    131  1.1     uch 	DBG_BIT_PRINT(r16, ER);
    132  1.1     uch 	DBG_BIT_PRINT(r16, TEND);
    133  1.1     uch 	DBG_BIT_PRINT(r16, TDFE);
    134  1.1     uch 	DBG_BIT_PRINT(r16, BRK);
    135  1.1     uch 	DBG_BIT_PRINT(r16, FER);
    136  1.1     uch 	DBG_BIT_PRINT(r16, PER);
    137  1.1     uch 	DBG_BIT_PRINT(r16, RDF);
    138  1.1     uch 	DBG_BIT_PRINT(r16, DR);
    139  1.1     uch #undef	DBG_BIT_PRINT
    140  1.1     uch 
    141  1.1     uch 	/* FIFO control */
    142  1.2     uch #define	DBG_BIT_PRINT(r, m)	_dbg_bit_print(r, SCFCR2_##m, #m)
    143  1.1     uch 	r = _scif_reg_read(SH3_SCFCR2);
    144  1.1     uch 	DPRINTF((TEXT("SCFCR2: ")));
    145  1.1     uch 	DBG_BIT_PRINT(r, RTRG1);
    146  1.1     uch 	DBG_BIT_PRINT(r, RTRG0);
    147  1.1     uch 	DBG_BIT_PRINT(r, TTRG1);
    148  1.1     uch 	DBG_BIT_PRINT(r, TTRG0);
    149  1.1     uch 	DBG_BIT_PRINT(r, MCE);
    150  1.1     uch 	DBG_BIT_PRINT(r, TFRST);
    151  1.1     uch 	DBG_BIT_PRINT(r, RFRST);
    152  1.1     uch 	DBG_BIT_PRINT(r, LOOP);
    153  1.1     uch 	DPRINTF((TEXT("\n")));
    154  1.1     uch #undef	DBG_BIT_PRINT
    155  1.1     uch }
    156  1.1     uch 
    157  1.1     uch // INTC
    158  1.1     uch void
    159  1.1     uch SHdev::icu_dump_priority(struct intr_priority *tab)
    160  1.1     uch {
    161  1.2     uch 
    162  1.1     uch 	DPRINTF((TEXT("<<<INTC>>>\n")));
    163  1.1     uch 
    164  1.1     uch 	DPRINTF((TEXT("----interrupt priority----\n")));
    165  1.1     uch 	for (; tab->name; tab++) {
    166  1.1     uch 		DPRINTF((TEXT("%-10S %d\n"), tab->name,
    167  1.1     uch 		    (_reg_read_2(tab->reg) >> tab->shift) & SH_IPR_MASK));
    168  1.1     uch 	}
    169  1.1     uch 	DPRINTF((TEXT("--------------------------\n")));
    170  1.1     uch }
    171  1.1     uch 
    172