sh_dev.cpp revision 1.1.18.2
1 /* -*-C++-*- $NetBSD: sh_dev.cpp,v 1.1.18.2 2004/09/18 14:34:46 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <hpcboot.h> 40 #include <hpcmenu.h> 41 #include <console.h> 42 43 #include <sh3/sh_mmu.h> 44 #include <sh3/dev/sh_dev.h> 45 46 #include <sh3/dev/sh.h> 47 48 SHdev::SHdev() 49 { 50 51 _menu = &HpcMenuInterface::Instance(); 52 _cons = Console::Instance(); 53 } 54 55 void 56 SHdev::dump(u_int8_t bit) 57 { 58 u_int32_t reg = 0; 59 int kmode; 60 61 DPRINTF((TEXT("DEBUG BIT: "))); 62 bitdisp(bit); 63 64 if (bit & DUMP_CPU) { 65 // Cache 66 MemoryManager_SHMMU::CacheDump(); 67 // MMU 68 MemoryManager_SHMMU::MMUDump(); 69 // Status register 70 kmode = SetKMode(1); 71 __asm( 72 "stc sr, r0\n" 73 "mov.l r0, @r4", ®); 74 SetKMode(kmode); 75 DPRINTF((TEXT("SR: "))); 76 bitdisp(reg); 77 } 78 79 if (bit & DUMP_DEV) { 80 kmode = SetKMode(1); 81 print_stack_pointer(); 82 // SCIF 83 scif_dump(HPC_PREFERENCE.serial_speed); 84 SetKMode(kmode); 85 } 86 } 87 88 void 89 SHdev::print_stack_pointer(void) 90 { 91 int sp; 92 93 __asm("mov.l r15, @r4", &sp); 94 DPRINTF((TEXT("SP 0x%08x\n"), sp)); 95 } 96 97 // 98 // SH3/SH4 common functions. 99 // 100 // SCIF 101 void 102 SHdev::scif_dump(int bps) 103 { 104 u_int16_t r16; 105 u_int32_t r; 106 int n; 107 108 print_stack_pointer(); 109 DPRINTF((TEXT("<<<SCIF>>>\n"))); 110 /* mode */ 111 r = _scif_reg_read(SH3_SCSMR2); 112 n = 1 << ((r & SCSMR2_CKS) << 1); 113 DPRINTF((TEXT("mode: %dbit %S-parity %d stop bit clock PCLOCK/%d\n"), 114 r & SCSMR2_CHR ? 7 : 8, 115 r & SCSMR2_PE ? r & SCSMR2_OE ? "odd" : "even" : "non", 116 r & SCSMR2_STOP ? 2 : 1, 117 n)); 118 /* bit rate */ 119 r = _scif_reg_read(SH3_SCBRR2); 120 DPRINTF((TEXT("SCBRR=%d(%dbps) estimated PCLOCK %dHz\n"), r, bps, 121 32 * bps *(r + 1) * n)); 122 123 /* control */ 124 #define DBG_BIT_PRINT(r, m) _dbg_bit_print(r, SCSCR2_##m, #m) 125 DPRINTF((TEXT("SCSCR2: "))); 126 r = _scif_reg_read(SH3_SCSCR2); 127 DBG_BIT_PRINT(r, TIE); 128 DBG_BIT_PRINT(r, RIE); 129 DBG_BIT_PRINT(r, TE); 130 DBG_BIT_PRINT(r, RE); 131 DPRINTF((TEXT("CKE=%d\n"), r & SCSCR2_CKE)); 132 #undef DBG_BIT_PRINT 133 134 /* status */ 135 #define DBG_BIT_PRINT(r, m) _dbg_bit_print(r, SCSSR2_##m, #m) 136 r16 = _reg_read_2(SH3_SCSSR2); 137 DPRINTF((TEXT("SCSSR2: "))); 138 DBG_BIT_PRINT(r16, ER); 139 DBG_BIT_PRINT(r16, TEND); 140 DBG_BIT_PRINT(r16, TDFE); 141 DBG_BIT_PRINT(r16, BRK); 142 DBG_BIT_PRINT(r16, FER); 143 DBG_BIT_PRINT(r16, PER); 144 DBG_BIT_PRINT(r16, RDF); 145 DBG_BIT_PRINT(r16, DR); 146 #undef DBG_BIT_PRINT 147 148 /* FIFO control */ 149 #define DBG_BIT_PRINT(r, m) _dbg_bit_print(r, SCFCR2_##m, #m) 150 r = _scif_reg_read(SH3_SCFCR2); 151 DPRINTF((TEXT("SCFCR2: "))); 152 DBG_BIT_PRINT(r, RTRG1); 153 DBG_BIT_PRINT(r, RTRG0); 154 DBG_BIT_PRINT(r, TTRG1); 155 DBG_BIT_PRINT(r, TTRG0); 156 DBG_BIT_PRINT(r, MCE); 157 DBG_BIT_PRINT(r, TFRST); 158 DBG_BIT_PRINT(r, RFRST); 159 DBG_BIT_PRINT(r, LOOP); 160 DPRINTF((TEXT("\n"))); 161 #undef DBG_BIT_PRINT 162 } 163 164 // INTC 165 void 166 SHdev::icu_dump_priority(struct intr_priority *tab) 167 { 168 169 DPRINTF((TEXT("<<<INTC>>>\n"))); 170 171 DPRINTF((TEXT("----interrupt priority----\n"))); 172 for (; tab->name; tab++) { 173 DPRINTF((TEXT("%-10S %d\n"), tab->name, 174 (_reg_read_2(tab->reg) >> tab->shift) & SH_IPR_MASK)); 175 } 176 DPRINTF((TEXT("--------------------------\n"))); 177 } 178 179
Indexes created Sat Sep 20 22:09:52 GMT 2025