1 1.3 martin /* $NetBSD: hd64461intcreg.h,v 1.3 2008/04/28 20:23:22 martin Exp $ */ 2 1.1 uch 3 1.1 uch /*- 4 1.1 uch * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 1.1 uch * All rights reserved. 6 1.1 uch * 7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation 8 1.1 uch * by UCHIYAMA Yasushi. 9 1.1 uch * 10 1.1 uch * Redistribution and use in source and binary forms, with or without 11 1.1 uch * modification, are permitted provided that the following conditions 12 1.1 uch * are met: 13 1.1 uch * 1. Redistributions of source code must retain the above copyright 14 1.1 uch * notice, this list of conditions and the following disclaimer. 15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 uch * notice, this list of conditions and the following disclaimer in the 17 1.1 uch * documentation and/or other materials provided with the distribution. 18 1.1 uch * 19 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 uch * POSSIBILITY OF SUCH DAMAGE. 30 1.1 uch */ 31 1.1 uch 32 1.2 uwe #ifndef _HPCSH_DEV_HD64461INTCREG_H_ 33 1.2 uwe #define _HPCSH_DEV_HD64461INTCREG_H_ 34 1.2 uwe 35 1.1 uch /* Interrupt Request Register */ 36 1.1 uch #define HD64461_INTCNIRR_REG16 0xb0005000 37 1.1 uch #define HD64461_INTCNIRR_PCC0R HD64461_INTC_PCC0 38 1.1 uch #define HD64461_INTCNIRR_PCC1R HD64461_INTC_PCC1 39 1.1 uch #define HD64461_INTCNIRR_AFER HD64461_INTC_AFE 40 1.1 uch #define HD64461_INTCNIRR_GPIOR HD64461_INTC_GPIO 41 1.1 uch #define HD64461_INTCNIRR_TMU0R HD64461_INTC_TMU0 42 1.1 uch #define HD64461_INTCNIRR_TMU1R HD64461_INTC_TMU1 43 1.1 uch #define HD64461_INTCNIRR_IRDAR HD64461_INTC_IRDA 44 1.1 uch #define HD64461_INTCNIRR_UARTR HD64461_INTC_UART 45 1.1 uch 46 1.1 uch /* Interrupt Mask Register */ 47 1.1 uch #define HD64461_INTCNIMR_REG16 0xb0005002 48 1.1 uch #define HD64461_INTCNIMR_PCC0M HD64461_INTC_PCC0 49 1.1 uch #define HD64461_INTCNIMR_PCC1M HD64461_INTC_PCC1 50 1.1 uch #define HD64461_INTCNIMR_AFEM HD64461_INTC_AFE 51 1.1 uch #define HD64461_INTCNIMR_GPIOM HD64461_INTC_GPIO 52 1.1 uch #define HD64461_INTCNIMR_TMU0M HD64461_INTC_TMU0 53 1.1 uch #define HD64461_INTCNIMR_TMU1M HD64461_INTC_TMU1 54 1.1 uch #define HD64461_INTCNIMR_IRDAM HD64461_INTC_IRDA 55 1.1 uch #define HD64461_INTCNIMR_UARTM HD64461_INTC_UART 56 1.1 uch 57 1.1 uch /* common defines. */ 58 1.1 uch #define HD64461_INTC_PCC0 0x4000 59 1.1 uch #define HD64461_INTC_PCC1 0x2000 60 1.1 uch #define HD64461_INTC_AFE 0x1000 61 1.1 uch #define HD64461_INTC_GPIO 0x0800 62 1.1 uch #define HD64461_INTC_TMU0 0x0400 63 1.1 uch #define HD64461_INTC_TMU1 0x0200 64 1.1 uch #define HD64461_INTC_IRDA 0x0040 65 1.1 uch #define HD64461_INTC_UART 0x0020 66 1.1 uch 67 1.2 uwe #endif /* !_HPCSH_DEV_HD64461INTCREG_H_ */ 68
Indexes created Fri Sep 26 20:09:58 GMT 2025