1 /* $NetBSD: siop_sgc.c,v 1.1 2014/02/24 07:23:42 skrll Exp $ */ 2 3 /* $OpenBSD: siop_sgc.c,v 1.1 2007/08/05 19:09:52 kettenis Exp $ */ 4 5 /* 6 * Copyright (c) 2007 Mark Kettenis 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: siop_sgc.c,v 1.1 2014/02/24 07:23:42 skrll Exp $"); 23 24 #include <sys/param.h> 25 #include <sys/device.h> 26 #include <sys/systm.h> 27 28 #include <uvm/uvm_extern.h> 29 30 #include <machine/autoconf.h> 31 #include <sys/bus.h> 32 #include <machine/iomod.h> 33 34 #include <dev/scsipi/scsi_all.h> 35 #include <dev/scsipi/scsipi_all.h> 36 #include <dev/scsipi/scsiconf.h> 37 38 #include <dev/ic/siopreg.h> 39 #include <dev/ic/siopvar_common.h> 40 #include <dev/ic/siopvar.h> 41 42 #include <hppa/dev/cpudevs.h> 43 44 #define IO_II_INTEN 0x20000000 45 #define IO_II_PACKEN 0x10000000 46 #define IO_II_PREFETCHEN 0x08000000 47 48 int siop_sgc_match(device_t, cfdata_t, void *); 49 void siop_sgc_attach(device_t, device_t, void *); 50 int siop_sgc_intr(void *); 51 void siop_sgc_reset(struct siop_common_softc *); 52 53 uint8_t siop_sgc_r1(void *, bus_space_handle_t, bus_size_t); 54 uint16_t siop_sgc_r2(void *, bus_space_handle_t, bus_size_t); 55 void siop_sgc_w1(void *, bus_space_handle_t, bus_size_t, uint8_t); 56 void siop_sgc_w2(void *, bus_space_handle_t, bus_size_t, uint16_t); 57 58 struct siop_sgc_softc { 59 struct siop_softc sc_siop; 60 bus_space_tag_t sc_iot; 61 bus_space_handle_t sc_ioh; 62 struct hppa_bus_space_tag sc_bustag; 63 }; 64 65 CFATTACH_DECL_NEW(siop_gedoens, sizeof(struct siop_sgc_softc), 66 siop_sgc_match, siop_sgc_attach, NULL, NULL); 67 68 int 69 siop_sgc_match(device_t parent, cfdata_t match, void *aux) 70 { 71 struct confargs *ca = aux; 72 73 if (ca->ca_type.iodc_type != HPPA_TYPE_ADMA || 74 ca->ca_type.iodc_sv_model != HPPA_ADMA_FWSCSI) 75 return 0; 76 77 return 1; 78 } 79 80 void 81 siop_sgc_attach(device_t parent, device_t self, void *aux) 82 { 83 struct siop_sgc_softc *sgc = device_private(self); 84 struct siop_softc *sc = &sgc->sc_siop; 85 struct confargs *ca = aux; 86 struct cpu_info *ci = &cpus[0]; 87 volatile struct iomod *regs; 88 89 sc->sc_c.sc_dev = self; 90 sgc->sc_iot = ca->ca_iot; 91 if (bus_space_map(sgc->sc_iot, ca->ca_hpa, 92 IOMOD_HPASIZE, 0, &sgc->sc_ioh)) { 93 aprint_error(": can't map io space\n"); 94 return; 95 } 96 97 ca->ca_irq = hppa_intr_allocate_bit(&ci->ci_ir, ca->ca_irq); 98 if (ca->ca_irq == HPPACF_IRQ_UNDEF) { 99 aprint_error(": can't allocate interrupt\n"); 100 return; 101 } 102 103 sgc->sc_bustag = *sgc->sc_iot; 104 sgc->sc_bustag.hbt_r1 = siop_sgc_r1; 105 sgc->sc_bustag.hbt_r2 = siop_sgc_r2; 106 sgc->sc_bustag.hbt_w1 = siop_sgc_w1; 107 sgc->sc_bustag.hbt_w2 = siop_sgc_w2; 108 109 sc->sc_c.features = SF_CHIP_PF | SF_CHIP_BE | SF_BUS_WIDE; 110 sc->sc_c.maxburst = 4; 111 sc->sc_c.maxoff = 8; 112 sc->sc_c.clock_div = 3; 113 sc->sc_c.clock_period = 250; 114 sc->sc_c.ram_size = 0; 115 116 sc->sc_c.sc_reset = siop_sgc_reset; 117 sc->sc_c.sc_dmat = ca->ca_dmatag; 118 119 sc->sc_c.sc_rt = &sgc->sc_bustag; 120 bus_space_subregion(sgc->sc_iot, sgc->sc_ioh, IOMOD_DEVOFFSET, 121 IOMOD_HPASIZE - IOMOD_DEVOFFSET, &sc->sc_c.sc_rh); 122 123 regs = bus_space_vaddr(sgc->sc_iot, sgc->sc_ioh); 124 regs->io_command = CMD_RESET; 125 while ((regs->io_status & IO_ERR_MEM_RY) == 0) 126 delay(100); 127 regs->io_ii_rw = IO_II_PACKEN | IO_II_PREFETCHEN; 128 129 siop_sgc_reset(&sc->sc_c); 130 131 regs->io_eim = ci->ci_hpa | (31 - ca->ca_irq); 132 regs->io_ii_rw |= IO_II_INTEN; 133 134 aprint_normal(": NCR53C720 rev %d\n", bus_space_read_1(sc->sc_c.sc_rt, 135 sc->sc_c.sc_rh, SIOP_CTEST3) >> 4); 136 137 siop_attach(&sgc->sc_siop); 138 139 (void)hppa_intr_establish(IPL_BIO, siop_intr, sc, &ci->ci_ir, 140 ca->ca_irq); 141 } 142 143 void 144 siop_sgc_reset(struct siop_common_softc *sc) 145 { 146 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA); 147 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP); 148 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX); 149 150 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0, 151 (0xc << STIME0_SEL_SHIFT)); 152 } 153 154 uint8_t 155 siop_sgc_r1(void *v, bus_space_handle_t h, bus_size_t o) 156 { 157 return *(volatile uint8_t *)(h + (o ^ 3)); 158 } 159 160 uint16_t 161 siop_sgc_r2(void *v, bus_space_handle_t h, bus_size_t o) 162 { 163 if (o == SIOP_SIST0) { 164 uint16_t reg; 165 166 reg = siop_sgc_r1(v, h, SIOP_SIST0); 167 reg |= siop_sgc_r1(v, h, SIOP_SIST1) << 8; 168 return reg; 169 } 170 return *(volatile uint16_t *)(h + (o ^ 2)); 171 } 172 173 void 174 siop_sgc_w1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv) 175 { 176 *(volatile uint8_t *)(h + (o ^ 3)) = vv; 177 } 178 179 void 180 siop_sgc_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv) 181 { 182 *(volatile uint16_t *)(h + (o ^ 2)) = vv; 183 } 184
Indexes created Thu Sep 25 16:09:42 GMT 2025