1 /* $NetBSD: gcscehci.c,v 1.15 2021/08/07 16:18:55 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) 9 * and Jared D. McNeill (jmcneill (at) invisible.ca) 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: gcscehci.c,v 1.15 2021/08/07 16:18:55 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/proc.h> 41 #include <sys/queue.h> 42 43 #include <sys/bus.h> 44 #include <machine/cpufunc.h> 45 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/usb_pci.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 #include <dev/usb/usbdivar.h> 53 #include <dev/usb/usb_mem.h> 54 55 #include <dev/usb/ehcireg.h> 56 #include <dev/usb/ehcivar.h> 57 58 #ifdef EHCI_DEBUG 59 #define DPRINTF(x) if (ehcidebug) printf x 60 extern int ehcidebug; 61 #else 62 #define DPRINTF(x) 63 #endif 64 65 #define GCSCUSB_MSR_BASE 0x51200000 66 #define GCSCUSB_MSR_EHCB (GCSCUSB_MSR_BASE + 0x09) 67 68 struct gcscehci_softc { 69 ehci_softc_t sc; 70 pci_chipset_tag_t sc_pc; 71 pcitag_t sc_tag; 72 void *sc_ih; /* interrupt vectoring */ 73 }; 74 75 static int 76 gcscehci_match(device_t parent, cfdata_t match, void *aux) 77 { 78 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 79 80 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 81 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 82 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI && 83 PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD && 84 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_CS5536_EHCI) 85 return 10; /* beat ehci_pci */ 86 87 return 0; 88 } 89 90 static void 91 gcscehci_attach(device_t parent, device_t self, void *aux) 92 { 93 struct gcscehci_softc *sc = device_private(self); 94 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 95 pci_chipset_tag_t pc = pa->pa_pc; 96 pcitag_t tag = pa->pa_tag; 97 char const *intrstr; 98 pci_intr_handle_t ih; 99 const char *devname = device_xname(self); 100 char devinfo[256]; 101 bus_addr_t ehcibase; 102 int ncomp; 103 struct usb_pci *up; 104 char buf[PCI_INTRSTR_LEN]; 105 106 sc->sc.sc_dev = self; 107 sc->sc.sc_bus.ub_hcpriv = sc; 108 109 aprint_naive(": USB controller\n"); 110 111 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 112 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 113 PCI_REVISION(pa->pa_class)); 114 115 /* Map I/O registers */ 116 ehcibase = rdmsr(GCSCUSB_MSR_EHCB) & 0xffffff00; 117 sc->sc.iot = pa->pa_memt; 118 sc->sc.sc_size = 256; 119 if (bus_space_map(sc->sc.iot, ehcibase, 256, 0, &sc->sc.ioh)) { 120 aprint_error("%s: can't map memory space\n", devname); 121 return; 122 } 123 124 sc->sc_pc = pc; 125 sc->sc_tag = tag; 126 sc->sc.sc_bus.ub_dmatag = pa->pa_dmat; 127 128 /* Disable interrupts, so we don't get any spurious ones. */ 129 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 130 DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs)); 131 EOWRITE2(&sc->sc, EHCI_USBINTR, 0); 132 133 /* Map and establish the interrupt. */ 134 if (pci_intr_map(pa, &ih)) { 135 aprint_error("%s: couldn't map interrupt\n", devname); 136 return; 137 } 138 intrstr = pci_intr_string(pc, ih, buf, sizeof(buf)); 139 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc); 140 if (sc->sc_ih == NULL) { 141 aprint_error("%s: couldn't establish interrupt", devname); 142 if (intrstr != NULL) 143 aprint_error(" at %s", intrstr); 144 aprint_error("\n"); 145 return; 146 } 147 aprint_normal("%s: interrupting at %s\n", devname, intrstr); 148 149 sc->sc.sc_bus.ub_revision = USBREV_2_0; 150 151 /* 152 * Find companion controllers. According to the spec they always 153 * have lower function numbers so they should be enumerated already. 154 */ 155 ncomp = 0; 156 TAILQ_FOREACH(up, &ehci_pci_alldevs, next) { 157 if (up->bus == pa->pa_bus && up->device == pa->pa_device) { 158 DPRINTF(("gcscehci_attach: companion %s\n", 159 device_xname(up->usb))); 160 sc->sc.sc_comps[ncomp++] = up->usb; 161 if (ncomp >= EHCI_COMPANION_MAX) 162 break; 163 } 164 } 165 sc->sc.sc_ncomp = ncomp; 166 167 int err = ehci_init(&sc->sc); 168 if (err) { 169 aprint_error("%s: init failed, error=%d\n", devname, err); 170 return; 171 } 172 173 /* Attach usb device. */ 174 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint, 175 CFARGS_NONE); 176 } 177 178 CFATTACH_DECL_NEW(gcscehci, sizeof(struct gcscehci_softc), 179 gcscehci_match, gcscehci_attach, NULL, ehci_activate); 180
Indexes created Sat Sep 20 22:09:52 GMT 2025