gcscehci.c revision 1.14 1 1.14 thorpej /* $NetBSD: gcscehci.c,v 1.14 2021/04/24 23:36:39 thorpej Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*
4 1.1 jmcneill * Copyright (c) 2001, 2002, 2007 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Lennart Augustsson (lennart (at) augustsson.net)
9 1.1 jmcneill * and Jared D. McNeill (jmcneill (at) invisible.ca)
10 1.1 jmcneill *
11 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
12 1.1 jmcneill * modification, are permitted provided that the following conditions
13 1.1 jmcneill * are met:
14 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
15 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
16 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
18 1.1 jmcneill * documentation and/or other materials provided with the distribution.
19 1.1 jmcneill *
20 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
31 1.1 jmcneill */
32 1.1 jmcneill
33 1.1 jmcneill #include <sys/cdefs.h>
34 1.14 thorpej __KERNEL_RCSID(0, "$NetBSD: gcscehci.c,v 1.14 2021/04/24 23:36:39 thorpej Exp $");
35 1.1 jmcneill
36 1.1 jmcneill #include <sys/param.h>
37 1.1 jmcneill #include <sys/systm.h>
38 1.1 jmcneill #include <sys/kernel.h>
39 1.1 jmcneill #include <sys/device.h>
40 1.1 jmcneill #include <sys/proc.h>
41 1.1 jmcneill #include <sys/queue.h>
42 1.1 jmcneill
43 1.9 dyoung #include <sys/bus.h>
44 1.1 jmcneill #include <machine/cpufunc.h>
45 1.1 jmcneill
46 1.1 jmcneill #include <dev/pci/pcidevs.h>
47 1.1 jmcneill #include <dev/pci/pcivar.h>
48 1.1 jmcneill #include <dev/pci/usb_pci.h>
49 1.1 jmcneill
50 1.1 jmcneill #include <dev/usb/usb.h>
51 1.1 jmcneill #include <dev/usb/usbdi.h>
52 1.1 jmcneill #include <dev/usb/usbdivar.h>
53 1.1 jmcneill #include <dev/usb/usb_mem.h>
54 1.1 jmcneill
55 1.1 jmcneill #include <dev/usb/ehcireg.h>
56 1.1 jmcneill #include <dev/usb/ehcivar.h>
57 1.1 jmcneill
58 1.1 jmcneill #ifdef EHCI_DEBUG
59 1.1 jmcneill #define DPRINTF(x) if (ehcidebug) printf x
60 1.1 jmcneill extern int ehcidebug;
61 1.1 jmcneill #else
62 1.1 jmcneill #define DPRINTF(x)
63 1.1 jmcneill #endif
64 1.1 jmcneill
65 1.1 jmcneill #define GCSCUSB_MSR_BASE 0x51200000
66 1.1 jmcneill #define GCSCUSB_MSR_EHCB (GCSCUSB_MSR_BASE + 0x09)
67 1.1 jmcneill
68 1.1 jmcneill struct gcscehci_softc {
69 1.1 jmcneill ehci_softc_t sc;
70 1.1 jmcneill pci_chipset_tag_t sc_pc;
71 1.1 jmcneill pcitag_t sc_tag;
72 1.1 jmcneill void *sc_ih; /* interrupt vectoring */
73 1.1 jmcneill };
74 1.1 jmcneill
75 1.1 jmcneill static int
76 1.5 cegger gcscehci_match(device_t parent, cfdata_t match, void *aux)
77 1.1 jmcneill {
78 1.1 jmcneill struct pci_attach_args *pa = (struct pci_attach_args *) aux;
79 1.1 jmcneill
80 1.1 jmcneill if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
81 1.1 jmcneill PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
82 1.1 jmcneill PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_EHCI &&
83 1.1 jmcneill PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD &&
84 1.1 jmcneill PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_CS5536_EHCI)
85 1.12 skrll return 10; /* beat ehci_pci */
86 1.1 jmcneill
87 1.12 skrll return 0;
88 1.1 jmcneill }
89 1.1 jmcneill
90 1.1 jmcneill static void
91 1.5 cegger gcscehci_attach(device_t parent, device_t self, void *aux)
92 1.1 jmcneill {
93 1.2 drochner struct gcscehci_softc *sc = device_private(self);
94 1.1 jmcneill struct pci_attach_args *pa = (struct pci_attach_args *)aux;
95 1.1 jmcneill pci_chipset_tag_t pc = pa->pa_pc;
96 1.1 jmcneill pcitag_t tag = pa->pa_tag;
97 1.1 jmcneill char const *intrstr;
98 1.1 jmcneill pci_intr_handle_t ih;
99 1.2 drochner const char *devname = device_xname(self);
100 1.1 jmcneill char devinfo[256];
101 1.1 jmcneill bus_addr_t ehcibase;
102 1.1 jmcneill int ncomp;
103 1.1 jmcneill struct usb_pci *up;
104 1.10 christos char buf[PCI_INTRSTR_LEN];
105 1.1 jmcneill
106 1.2 drochner sc->sc.sc_dev = self;
107 1.12 skrll sc->sc.sc_bus.ub_hcpriv = sc;
108 1.2 drochner
109 1.1 jmcneill aprint_naive(": USB controller\n");
110 1.1 jmcneill
111 1.1 jmcneill pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
112 1.1 jmcneill aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
113 1.1 jmcneill PCI_REVISION(pa->pa_class));
114 1.1 jmcneill
115 1.1 jmcneill /* Map I/O registers */
116 1.1 jmcneill ehcibase = rdmsr(GCSCUSB_MSR_EHCB) & 0xffffff00;
117 1.1 jmcneill sc->sc.iot = pa->pa_memt;
118 1.1 jmcneill sc->sc.sc_size = 256;
119 1.1 jmcneill if (bus_space_map(sc->sc.iot, ehcibase, 256, 0, &sc->sc.ioh)) {
120 1.1 jmcneill aprint_error("%s: can't map memory space\n", devname);
121 1.1 jmcneill return;
122 1.1 jmcneill }
123 1.1 jmcneill
124 1.1 jmcneill sc->sc_pc = pc;
125 1.1 jmcneill sc->sc_tag = tag;
126 1.12 skrll sc->sc.sc_bus.ub_dmatag = pa->pa_dmat;
127 1.1 jmcneill
128 1.1 jmcneill /* Disable interrupts, so we don't get any spurious ones. */
129 1.1 jmcneill sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
130 1.1 jmcneill DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
131 1.1 jmcneill EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
132 1.1 jmcneill
133 1.1 jmcneill /* Map and establish the interrupt. */
134 1.1 jmcneill if (pci_intr_map(pa, &ih)) {
135 1.1 jmcneill aprint_error("%s: couldn't map interrupt\n", devname);
136 1.1 jmcneill return;
137 1.1 jmcneill }
138 1.10 christos intrstr = pci_intr_string(pc, ih, buf, sizeof(buf));
139 1.1 jmcneill sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc);
140 1.1 jmcneill if (sc->sc_ih == NULL) {
141 1.1 jmcneill aprint_error("%s: couldn't establish interrupt", devname);
142 1.1 jmcneill if (intrstr != NULL)
143 1.6 njoly aprint_error(" at %s", intrstr);
144 1.6 njoly aprint_error("\n");
145 1.1 jmcneill return;
146 1.1 jmcneill }
147 1.1 jmcneill aprint_normal("%s: interrupting at %s\n", devname, intrstr);
148 1.1 jmcneill
149 1.12 skrll sc->sc.sc_bus.ub_revision = USBREV_2_0;
150 1.1 jmcneill
151 1.1 jmcneill /*
152 1.1 jmcneill * Find companion controllers. According to the spec they always
153 1.1 jmcneill * have lower function numbers so they should be enumerated already.
154 1.1 jmcneill */
155 1.1 jmcneill ncomp = 0;
156 1.1 jmcneill TAILQ_FOREACH(up, &ehci_pci_alldevs, next) {
157 1.1 jmcneill if (up->bus == pa->pa_bus && up->device == pa->pa_device) {
158 1.1 jmcneill DPRINTF(("gcscehci_attach: companion %s\n",
159 1.2 drochner device_xname(up->usb)));
160 1.1 jmcneill sc->sc.sc_comps[ncomp++] = up->usb;
161 1.1 jmcneill if (ncomp >= EHCI_COMPANION_MAX)
162 1.1 jmcneill break;
163 1.1 jmcneill }
164 1.1 jmcneill }
165 1.1 jmcneill sc->sc.sc_ncomp = ncomp;
166 1.1 jmcneill
167 1.12 skrll int err = ehci_init(&sc->sc);
168 1.12 skrll if (err) {
169 1.12 skrll aprint_error("%s: init failed, error=%d\n", devname, err);
170 1.1 jmcneill return;
171 1.1 jmcneill }
172 1.1 jmcneill
173 1.1 jmcneill /* Attach usb device. */
174 1.14 thorpej sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint,
175 1.14 thorpej CFARG_EOL);
176 1.1 jmcneill }
177 1.1 jmcneill
178 1.2 drochner CFATTACH_DECL_NEW(gcscehci, sizeof(struct gcscehci_softc),
179 1.1 jmcneill gcscehci_match, gcscehci_attach, NULL, ehci_activate);
180