gscpcib.c revision 1.5.18.4
1 1.5.18.4 yamt /* $NetBSD: gscpcib.c,v 1.5.18.4 2008/01/21 09:37:13 yamt Exp $ */ 2 1.5.18.2 yamt /* $OpenBSD: gscpcib.c,v 1.3 2004/10/05 19:02:33 grange Exp $ */ 3 1.5.18.2 yamt /* 4 1.5.18.2 yamt * Copyright (c) 2004 Alexander Yurchenko <grange (at) openbsd.org> 5 1.5.18.2 yamt * 6 1.5.18.2 yamt * Permission to use, copy, modify, and distribute this software for any 7 1.5.18.2 yamt * purpose with or without fee is hereby granted, provided that the above 8 1.5.18.2 yamt * copyright notice and this permission notice appear in all copies. 9 1.5.18.2 yamt * 10 1.5.18.2 yamt * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 1.5.18.2 yamt * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 1.5.18.2 yamt * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 1.5.18.2 yamt * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 1.5.18.2 yamt * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 1.5.18.2 yamt * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 1.5.18.2 yamt * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 1.5.18.2 yamt */ 18 1.5.18.2 yamt 19 1.5.18.2 yamt /* 20 1.5.18.2 yamt * Special driver for the National Semiconductor Geode SC1100 PCI-ISA bridge 21 1.5.18.2 yamt * that attaches instead of pcib(4). In addition to the core pcib(4) 22 1.5.18.2 yamt * functionality this driver provides support for the GPIO interface. 23 1.5.18.2 yamt */ 24 1.5.18.2 yamt 25 1.5.18.4 yamt #include <sys/cdefs.h> 26 1.5.18.4 yamt __KERNEL_RCSID(0, "$NetBSD: gscpcib.c,v 1.5.18.4 2008/01/21 09:37:13 yamt Exp $"); 27 1.5.18.4 yamt 28 1.5.18.2 yamt #include <sys/param.h> 29 1.5.18.2 yamt #include <sys/systm.h> 30 1.5.18.2 yamt #include <sys/device.h> 31 1.5.18.2 yamt #include <sys/gpio.h> 32 1.5.18.2 yamt #include <sys/kernel.h> 33 1.5.18.2 yamt 34 1.5.18.2 yamt #include <machine/bus.h> 35 1.5.18.2 yamt 36 1.5.18.2 yamt #include <dev/pci/pcireg.h> 37 1.5.18.2 yamt #include <dev/pci/pcivar.h> 38 1.5.18.2 yamt #include <dev/pci/pcidevs.h> 39 1.5.18.2 yamt 40 1.5.18.2 yamt #include <dev/gpio/gpiovar.h> 41 1.5.18.2 yamt 42 1.5.18.2 yamt #include <i386/pci/gscpcibreg.h> 43 1.5.18.2 yamt 44 1.5.18.2 yamt struct gscpcib_softc { 45 1.5.18.2 yamt struct device sc_dev; 46 1.5.18.2 yamt 47 1.5.18.4 yamt bool sc_gpio_present; 48 1.5.18.4 yamt 49 1.5.18.2 yamt /* GPIO interface */ 50 1.5.18.2 yamt bus_space_tag_t sc_gpio_iot; 51 1.5.18.2 yamt bus_space_handle_t sc_gpio_ioh; 52 1.5.18.2 yamt struct gpio_chipset_tag sc_gpio_gc; 53 1.5.18.2 yamt gpio_pin_t sc_gpio_pins[GSCGPIO_NPINS]; 54 1.5.18.2 yamt }; 55 1.5.18.2 yamt 56 1.5.18.4 yamt int gscpcib_match(device_t, struct cfdata *, void *); 57 1.5.18.4 yamt void gscpcib_attach(device_t, device_t, void *); 58 1.5.18.4 yamt int gscpcib_detach(device_t, int); 59 1.5.18.4 yamt void gscpcib_childdetached(device_t, device_t); 60 1.5.18.2 yamt 61 1.5.18.2 yamt int gscpcib_gpio_pin_read(void *, int); 62 1.5.18.2 yamt void gscpcib_gpio_pin_write(void *, int, int); 63 1.5.18.2 yamt void gscpcib_gpio_pin_ctl(void *, int, int); 64 1.5.18.2 yamt 65 1.5.18.2 yamt /* arch/i386/pci/pcib.c */ 66 1.5.18.4 yamt void pcibattach(device_t, device_t, void *); 67 1.5.18.2 yamt 68 1.5.18.4 yamt CFATTACH_DECL2(gscpcib, sizeof(struct gscpcib_softc), 69 1.5.18.4 yamt gscpcib_match, gscpcib_attach, gscpcib_detach, NULL, NULL, 70 1.5.18.4 yamt gscpcib_childdetached); 71 1.5.18.2 yamt 72 1.5.18.2 yamt extern struct cfdriver gscpcib_cd; 73 1.5.18.2 yamt 74 1.5.18.4 yamt void 75 1.5.18.4 yamt gscpcib_childdetached(device_t self, device_t child) 76 1.5.18.4 yamt { 77 1.5.18.4 yamt /* We hold no pointers to child devices, so there is nothing 78 1.5.18.4 yamt * to do here. 79 1.5.18.4 yamt */ 80 1.5.18.4 yamt } 81 1.5.18.4 yamt 82 1.5.18.2 yamt int 83 1.5.18.4 yamt gscpcib_match(device_t parent, struct cfdata *match, void *aux) 84 1.5.18.2 yamt { 85 1.5.18.2 yamt struct pci_attach_args *pa = aux; 86 1.5.18.2 yamt 87 1.5.18.2 yamt if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 88 1.5.18.2 yamt PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 89 1.5.18.2 yamt return (0); 90 1.5.18.2 yamt 91 1.5.18.2 yamt if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS && 92 1.5.18.2 yamt PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_ISA) 93 1.5.18.2 yamt return (2); /* supersede pcib(4) */ 94 1.5.18.2 yamt 95 1.5.18.2 yamt return (0); 96 1.5.18.2 yamt } 97 1.5.18.2 yamt 98 1.5.18.2 yamt void 99 1.5.18.4 yamt gscpcib_attach(device_t parent, device_t self, void *aux) 100 1.5.18.2 yamt { 101 1.5.18.4 yamt struct gscpcib_softc *sc = device_private(self); 102 1.5.18.2 yamt struct pci_attach_args *pa = aux; 103 1.5.18.2 yamt struct gpiobus_attach_args gba; 104 1.5.18.2 yamt pcireg_t gpiobase; 105 1.5.18.2 yamt int i; 106 1.5.18.2 yamt 107 1.5.18.2 yamt /* Map GPIO I/O space */ 108 1.5.18.2 yamt gpiobase = pci_conf_read(pa->pa_pc, pa->pa_tag, GSCGPIO_BASE); 109 1.5.18.2 yamt sc->sc_gpio_iot = pa->pa_iot; 110 1.5.18.2 yamt if (bus_space_map(sc->sc_gpio_iot, PCI_MAPREG_IO_ADDR(gpiobase), 111 1.5.18.2 yamt GSCGPIO_SIZE, 0, &sc->sc_gpio_ioh)) { 112 1.5.18.2 yamt printf(": failed to map GPIO I/O space"); 113 1.5.18.2 yamt goto corepcib; 114 1.5.18.2 yamt } 115 1.5.18.2 yamt 116 1.5.18.2 yamt /* Initialize pins array */ 117 1.5.18.2 yamt for (i = 0; i < GSCGPIO_NPINS; i++) { 118 1.5.18.2 yamt sc->sc_gpio_pins[i].pin_num = i; 119 1.5.18.2 yamt sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | 120 1.5.18.2 yamt GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | 121 1.5.18.2 yamt GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE | 122 1.5.18.2 yamt GPIO_PIN_PULLUP; 123 1.5.18.2 yamt 124 1.5.18.2 yamt /* safe defaults */ 125 1.5.18.2 yamt sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_TRISTATE; 126 1.5.18.2 yamt sc->sc_gpio_pins[i].pin_state = GPIO_PIN_LOW; 127 1.5.18.2 yamt gscpcib_gpio_pin_ctl(sc, i, sc->sc_gpio_pins[i].pin_flags); 128 1.5.18.2 yamt gscpcib_gpio_pin_write(sc, i, sc->sc_gpio_pins[i].pin_state); 129 1.5.18.2 yamt } 130 1.5.18.2 yamt 131 1.5.18.2 yamt /* Create controller tag */ 132 1.5.18.2 yamt sc->sc_gpio_gc.gp_cookie = sc; 133 1.5.18.2 yamt sc->sc_gpio_gc.gp_pin_read = gscpcib_gpio_pin_read; 134 1.5.18.2 yamt sc->sc_gpio_gc.gp_pin_write = gscpcib_gpio_pin_write; 135 1.5.18.2 yamt sc->sc_gpio_gc.gp_pin_ctl = gscpcib_gpio_pin_ctl; 136 1.5.18.2 yamt 137 1.5.18.2 yamt gba.gba_gc = &sc->sc_gpio_gc; 138 1.5.18.2 yamt gba.gba_pins = sc->sc_gpio_pins; 139 1.5.18.2 yamt gba.gba_npins = GSCGPIO_NPINS; 140 1.5.18.2 yamt 141 1.5.18.4 yamt sc->sc_gpio_present = true; 142 1.5.18.2 yamt 143 1.5.18.2 yamt corepcib: 144 1.5.18.2 yamt /* Provide core pcib(4) functionality */ 145 1.5.18.2 yamt pcibattach(parent, self, aux); 146 1.5.18.2 yamt 147 1.5.18.2 yamt /* Attach GPIO framework */ 148 1.5.18.4 yamt if (sc->sc_gpio_present) 149 1.5.18.4 yamt config_found_ia(self, "gpiobus", &gba, gpiobus_print); 150 1.5.18.4 yamt } 151 1.5.18.4 yamt 152 1.5.18.4 yamt int 153 1.5.18.4 yamt gscpcib_detach(device_t self, int flags) 154 1.5.18.4 yamt { 155 1.5.18.4 yamt int rc; 156 1.5.18.4 yamt struct gscpcib_softc *sc = device_private(self); 157 1.5.18.4 yamt 158 1.5.18.4 yamt if ((rc = config_detach_children(self, flags)) != 0) 159 1.5.18.4 yamt return rc; 160 1.5.18.4 yamt 161 1.5.18.4 yamt if (sc->sc_gpio_present) 162 1.5.18.4 yamt bus_space_unmap(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SIZE); 163 1.5.18.4 yamt 164 1.5.18.4 yamt return rc; 165 1.5.18.2 yamt } 166 1.5.18.2 yamt 167 1.5.18.2 yamt static inline void 168 1.5.18.2 yamt gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin) 169 1.5.18.2 yamt { 170 1.5.18.2 yamt bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin); 171 1.5.18.2 yamt } 172 1.5.18.2 yamt 173 1.5.18.2 yamt int 174 1.5.18.2 yamt gscpcib_gpio_pin_read(void *arg, int pin) 175 1.5.18.2 yamt { 176 1.5.18.2 yamt struct gscpcib_softc *sc = arg; 177 1.5.18.2 yamt int reg, shift; 178 1.5.18.2 yamt uint32_t data; 179 1.5.18.2 yamt 180 1.5.18.2 yamt reg = (pin < 32 ? GSCGPIO_GPDI0 : GSCGPIO_GPDI1); 181 1.5.18.2 yamt shift = pin % 32; 182 1.5.18.2 yamt data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 183 1.5.18.2 yamt 184 1.5.18.2 yamt return ((data >> shift) & 0x1); 185 1.5.18.2 yamt } 186 1.5.18.2 yamt 187 1.5.18.2 yamt void 188 1.5.18.2 yamt gscpcib_gpio_pin_write(void *arg, int pin, int value) 189 1.5.18.2 yamt { 190 1.5.18.2 yamt struct gscpcib_softc *sc = arg; 191 1.5.18.2 yamt int reg, shift; 192 1.5.18.2 yamt uint32_t data; 193 1.5.18.2 yamt 194 1.5.18.2 yamt reg = (pin < 32 ? GSCGPIO_GPDO0 : GSCGPIO_GPDO1); 195 1.5.18.2 yamt shift = pin % 32; 196 1.5.18.2 yamt data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 197 1.5.18.2 yamt if (value == 0) 198 1.5.18.2 yamt data &= ~(1 << shift); 199 1.5.18.2 yamt else if (value == 1) 200 1.5.18.2 yamt data |= (1 << shift); 201 1.5.18.2 yamt 202 1.5.18.2 yamt bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg, data); 203 1.5.18.2 yamt } 204 1.5.18.2 yamt 205 1.5.18.2 yamt void 206 1.5.18.2 yamt gscpcib_gpio_pin_ctl(void *arg, int pin, int flags) 207 1.5.18.2 yamt { 208 1.5.18.2 yamt struct gscpcib_softc *sc = arg; 209 1.5.18.2 yamt uint32_t conf; 210 1.5.18.2 yamt 211 1.5.18.2 yamt gscpcib_gpio_pin_select(sc, pin); 212 1.5.18.2 yamt conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 213 1.5.18.2 yamt GSCGPIO_CONF); 214 1.5.18.2 yamt 215 1.5.18.2 yamt conf &= ~(GSCGPIO_CONF_OUTPUTEN | GSCGPIO_CONF_PUSHPULL | 216 1.5.18.2 yamt GSCGPIO_CONF_PULLUP); 217 1.5.18.2 yamt if ((flags & GPIO_PIN_TRISTATE) == 0) 218 1.5.18.2 yamt conf |= GSCGPIO_CONF_OUTPUTEN; 219 1.5.18.2 yamt if (flags & GPIO_PIN_PUSHPULL) 220 1.5.18.2 yamt conf |= GSCGPIO_CONF_PUSHPULL; 221 1.5.18.2 yamt if (flags & GPIO_PIN_PULLUP) 222 1.5.18.2 yamt conf |= GSCGPIO_CONF_PULLUP; 223 1.5.18.2 yamt bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 224 1.5.18.2 yamt GSCGPIO_CONF, conf); 225 1.5.18.2 yamt } 226
Indexes created Wed Oct 15 07:09:58 GMT 2025