gscpcib.c revision 1.12
1 /* $NetBSD: gscpcib.c,v 1.12 2009/05/04 12:41:09 cegger Exp $ */ 2 /* $OpenBSD: gscpcib.c,v 1.3 2004/10/05 19:02:33 grange Exp $ */ 3 /* 4 * Copyright (c) 2004 Alexander Yurchenko <grange (at) openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * Special driver for the National Semiconductor Geode SC1100 PCI-ISA bridge 21 * that attaches instead of pcib(4). In addition to the core pcib(4) 22 * functionality this driver provides support for the GPIO interface. 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: gscpcib.c,v 1.12 2009/05/04 12:41:09 cegger Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/device.h> 31 #include <sys/gpio.h> 32 #include <sys/kernel.h> 33 34 #include <machine/bus.h> 35 36 #include <dev/pci/pcireg.h> 37 #include <dev/pci/pcivar.h> 38 #include <dev/pci/pcidevs.h> 39 40 #include <dev/gpio/gpiovar.h> 41 42 #include <i386/pci/gscpcibreg.h> 43 44 struct gscpcib_softc { 45 bool sc_gpio_present; 46 47 /* GPIO interface */ 48 bus_space_tag_t sc_gpio_iot; 49 bus_space_handle_t sc_gpio_ioh; 50 struct gpio_chipset_tag sc_gpio_gc; 51 gpio_pin_t sc_gpio_pins[GSCGPIO_NPINS]; 52 }; 53 54 int gscpcib_match(device_t, cfdata_t, void *); 55 void gscpcib_attach(device_t, device_t, void *); 56 int gscpcib_detach(device_t, int); 57 void gscpcib_childdetached(device_t, device_t); 58 59 int gscpcib_gpio_pin_read(void *, int); 60 void gscpcib_gpio_pin_write(void *, int, int); 61 void gscpcib_gpio_pin_ctl(void *, int, int); 62 63 /* arch/i386/pci/pcib.c */ 64 void pcibattach(device_t, device_t, void *); 65 66 CFATTACH_DECL2_NEW(gscpcib, sizeof(struct gscpcib_softc), 67 gscpcib_match, gscpcib_attach, gscpcib_detach, NULL, NULL, 68 gscpcib_childdetached); 69 70 extern struct cfdriver gscpcib_cd; 71 72 void 73 gscpcib_childdetached(device_t self, device_t child) 74 { 75 /* We hold no pointers to child devices, so there is nothing 76 * to do here. 77 */ 78 } 79 80 int 81 gscpcib_match(device_t parent, cfdata_t match, void *aux) 82 { 83 struct pci_attach_args *pa = aux; 84 85 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 86 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 87 return (0); 88 89 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS && 90 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_ISA) 91 return (2); /* supersede pcib(4) */ 92 93 return (0); 94 } 95 96 void 97 gscpcib_attach(device_t parent, device_t self, void *aux) 98 { 99 struct gscpcib_softc *sc = device_private(self); 100 struct pci_attach_args *pa = aux; 101 struct gpiobus_attach_args gba; 102 pcireg_t gpiobase; 103 int i; 104 105 /* Map GPIO I/O space */ 106 gpiobase = pci_conf_read(pa->pa_pc, pa->pa_tag, GSCGPIO_BASE); 107 sc->sc_gpio_iot = pa->pa_iot; 108 if (bus_space_map(sc->sc_gpio_iot, PCI_MAPREG_IO_ADDR(gpiobase), 109 GSCGPIO_SIZE, 0, &sc->sc_gpio_ioh)) { 110 printf(": failed to map GPIO I/O space"); 111 goto corepcib; 112 } 113 114 /* Initialize pins array */ 115 for (i = 0; i < GSCGPIO_NPINS; i++) { 116 sc->sc_gpio_pins[i].pin_num = i; 117 sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | 118 GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | 119 GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE | 120 GPIO_PIN_PULLUP; 121 122 /* safe defaults */ 123 sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_TRISTATE; 124 sc->sc_gpio_pins[i].pin_state = GPIO_PIN_LOW; 125 gscpcib_gpio_pin_ctl(sc, i, sc->sc_gpio_pins[i].pin_flags); 126 gscpcib_gpio_pin_write(sc, i, sc->sc_gpio_pins[i].pin_state); 127 } 128 129 /* Create controller tag */ 130 sc->sc_gpio_gc.gp_cookie = sc; 131 sc->sc_gpio_gc.gp_pin_read = gscpcib_gpio_pin_read; 132 sc->sc_gpio_gc.gp_pin_write = gscpcib_gpio_pin_write; 133 sc->sc_gpio_gc.gp_pin_ctl = gscpcib_gpio_pin_ctl; 134 135 gba.gba_gc = &sc->sc_gpio_gc; 136 gba.gba_pins = sc->sc_gpio_pins; 137 gba.gba_npins = GSCGPIO_NPINS; 138 139 sc->sc_gpio_present = true; 140 141 corepcib: 142 /* Provide core pcib(4) functionality */ 143 pcibattach(parent, self, aux); 144 145 /* Attach GPIO framework */ 146 if (sc->sc_gpio_present) 147 config_found_ia(self, "gpiobus", &gba, gpiobus_print); 148 } 149 150 int 151 gscpcib_detach(device_t self, int flags) 152 { 153 int rc; 154 struct gscpcib_softc *sc = device_private(self); 155 156 if ((rc = config_detach_children(self, flags)) != 0) 157 return rc; 158 159 if (sc->sc_gpio_present) 160 bus_space_unmap(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SIZE); 161 162 return rc; 163 } 164 165 static inline void 166 gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin) 167 { 168 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin); 169 } 170 171 int 172 gscpcib_gpio_pin_read(void *arg, int pin) 173 { 174 struct gscpcib_softc *sc = arg; 175 int reg, shift; 176 uint32_t data; 177 178 reg = (pin < 32 ? GSCGPIO_GPDI0 : GSCGPIO_GPDI1); 179 shift = pin % 32; 180 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 181 182 return ((data >> shift) & 0x1); 183 } 184 185 void 186 gscpcib_gpio_pin_write(void *arg, int pin, int value) 187 { 188 struct gscpcib_softc *sc = arg; 189 int reg, shift; 190 uint32_t data; 191 192 reg = (pin < 32 ? GSCGPIO_GPDO0 : GSCGPIO_GPDO1); 193 shift = pin % 32; 194 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 195 if (value == 0) 196 data &= ~(1 << shift); 197 else if (value == 1) 198 data |= (1 << shift); 199 200 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg, data); 201 } 202 203 void 204 gscpcib_gpio_pin_ctl(void *arg, int pin, int flags) 205 { 206 struct gscpcib_softc *sc = arg; 207 uint32_t conf; 208 209 gscpcib_gpio_pin_select(sc, pin); 210 conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 211 GSCGPIO_CONF); 212 213 conf &= ~(GSCGPIO_CONF_OUTPUTEN | GSCGPIO_CONF_PUSHPULL | 214 GSCGPIO_CONF_PULLUP); 215 if ((flags & GPIO_PIN_TRISTATE) == 0) 216 conf |= GSCGPIO_CONF_OUTPUTEN; 217 if (flags & GPIO_PIN_PUSHPULL) 218 conf |= GSCGPIO_CONF_PUSHPULL; 219 if (flags & GPIO_PIN_PULLUP) 220 conf |= GSCGPIO_CONF_PULLUP; 221 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 222 GSCGPIO_CONF, conf); 223 } 224
Indexes created Tue Sep 23 23:09:58 GMT 2025