gscpcib.c revision 1.8.34.1
1 /* $NetBSD: gscpcib.c,v 1.8.34.1 2008/02/18 21:04:41 mjf Exp $ */ 2 /* $OpenBSD: gscpcib.c,v 1.3 2004/10/05 19:02:33 grange Exp $ */ 3 /* 4 * Copyright (c) 2004 Alexander Yurchenko <grange (at) openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * Special driver for the National Semiconductor Geode SC1100 PCI-ISA bridge 21 * that attaches instead of pcib(4). In addition to the core pcib(4) 22 * functionality this driver provides support for the GPIO interface. 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: gscpcib.c,v 1.8.34.1 2008/02/18 21:04:41 mjf Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/device.h> 31 #include <sys/gpio.h> 32 #include <sys/kernel.h> 33 34 #include <machine/bus.h> 35 36 #include <dev/pci/pcireg.h> 37 #include <dev/pci/pcivar.h> 38 #include <dev/pci/pcidevs.h> 39 40 #include <dev/gpio/gpiovar.h> 41 42 #include <i386/pci/gscpcibreg.h> 43 44 struct gscpcib_softc { 45 struct device sc_dev; 46 47 bool sc_gpio_present; 48 49 /* GPIO interface */ 50 bus_space_tag_t sc_gpio_iot; 51 bus_space_handle_t sc_gpio_ioh; 52 struct gpio_chipset_tag sc_gpio_gc; 53 gpio_pin_t sc_gpio_pins[GSCGPIO_NPINS]; 54 }; 55 56 int gscpcib_match(device_t, struct cfdata *, void *); 57 void gscpcib_attach(device_t, device_t, void *); 58 int gscpcib_detach(device_t, int); 59 void gscpcib_childdetached(device_t, device_t); 60 61 int gscpcib_gpio_pin_read(void *, int); 62 void gscpcib_gpio_pin_write(void *, int, int); 63 void gscpcib_gpio_pin_ctl(void *, int, int); 64 65 /* arch/i386/pci/pcib.c */ 66 void pcibattach(device_t, device_t, void *); 67 68 CFATTACH_DECL2(gscpcib, sizeof(struct gscpcib_softc), 69 gscpcib_match, gscpcib_attach, gscpcib_detach, NULL, NULL, 70 gscpcib_childdetached); 71 72 extern struct cfdriver gscpcib_cd; 73 74 void 75 gscpcib_childdetached(device_t self, device_t child) 76 { 77 /* We hold no pointers to child devices, so there is nothing 78 * to do here. 79 */ 80 } 81 82 int 83 gscpcib_match(device_t parent, struct cfdata *match, void *aux) 84 { 85 struct pci_attach_args *pa = aux; 86 87 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 88 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 89 return (0); 90 91 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS && 92 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_ISA) 93 return (2); /* supersede pcib(4) */ 94 95 return (0); 96 } 97 98 void 99 gscpcib_attach(device_t parent, device_t self, void *aux) 100 { 101 struct gscpcib_softc *sc = device_private(self); 102 struct pci_attach_args *pa = aux; 103 struct gpiobus_attach_args gba; 104 pcireg_t gpiobase; 105 int i; 106 107 /* Map GPIO I/O space */ 108 gpiobase = pci_conf_read(pa->pa_pc, pa->pa_tag, GSCGPIO_BASE); 109 sc->sc_gpio_iot = pa->pa_iot; 110 if (bus_space_map(sc->sc_gpio_iot, PCI_MAPREG_IO_ADDR(gpiobase), 111 GSCGPIO_SIZE, 0, &sc->sc_gpio_ioh)) { 112 printf(": failed to map GPIO I/O space"); 113 goto corepcib; 114 } 115 116 /* Initialize pins array */ 117 for (i = 0; i < GSCGPIO_NPINS; i++) { 118 sc->sc_gpio_pins[i].pin_num = i; 119 sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | 120 GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | 121 GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE | 122 GPIO_PIN_PULLUP; 123 124 /* safe defaults */ 125 sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_TRISTATE; 126 sc->sc_gpio_pins[i].pin_state = GPIO_PIN_LOW; 127 gscpcib_gpio_pin_ctl(sc, i, sc->sc_gpio_pins[i].pin_flags); 128 gscpcib_gpio_pin_write(sc, i, sc->sc_gpio_pins[i].pin_state); 129 } 130 131 /* Create controller tag */ 132 sc->sc_gpio_gc.gp_cookie = sc; 133 sc->sc_gpio_gc.gp_pin_read = gscpcib_gpio_pin_read; 134 sc->sc_gpio_gc.gp_pin_write = gscpcib_gpio_pin_write; 135 sc->sc_gpio_gc.gp_pin_ctl = gscpcib_gpio_pin_ctl; 136 137 gba.gba_gc = &sc->sc_gpio_gc; 138 gba.gba_pins = sc->sc_gpio_pins; 139 gba.gba_npins = GSCGPIO_NPINS; 140 141 sc->sc_gpio_present = true; 142 143 corepcib: 144 /* Provide core pcib(4) functionality */ 145 pcibattach(parent, self, aux); 146 147 /* Attach GPIO framework */ 148 if (sc->sc_gpio_present) 149 config_found_ia(self, "gpiobus", &gba, gpiobus_print); 150 } 151 152 int 153 gscpcib_detach(device_t self, int flags) 154 { 155 int rc; 156 struct gscpcib_softc *sc = device_private(self); 157 158 if ((rc = config_detach_children(self, flags)) != 0) 159 return rc; 160 161 if (sc->sc_gpio_present) 162 bus_space_unmap(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SIZE); 163 164 return rc; 165 } 166 167 static inline void 168 gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin) 169 { 170 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin); 171 } 172 173 int 174 gscpcib_gpio_pin_read(void *arg, int pin) 175 { 176 struct gscpcib_softc *sc = arg; 177 int reg, shift; 178 uint32_t data; 179 180 reg = (pin < 32 ? GSCGPIO_GPDI0 : GSCGPIO_GPDI1); 181 shift = pin % 32; 182 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 183 184 return ((data >> shift) & 0x1); 185 } 186 187 void 188 gscpcib_gpio_pin_write(void *arg, int pin, int value) 189 { 190 struct gscpcib_softc *sc = arg; 191 int reg, shift; 192 uint32_t data; 193 194 reg = (pin < 32 ? GSCGPIO_GPDO0 : GSCGPIO_GPDO1); 195 shift = pin % 32; 196 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 197 if (value == 0) 198 data &= ~(1 << shift); 199 else if (value == 1) 200 data |= (1 << shift); 201 202 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg, data); 203 } 204 205 void 206 gscpcib_gpio_pin_ctl(void *arg, int pin, int flags) 207 { 208 struct gscpcib_softc *sc = arg; 209 uint32_t conf; 210 211 gscpcib_gpio_pin_select(sc, pin); 212 conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 213 GSCGPIO_CONF); 214 215 conf &= ~(GSCGPIO_CONF_OUTPUTEN | GSCGPIO_CONF_PUSHPULL | 216 GSCGPIO_CONF_PULLUP); 217 if ((flags & GPIO_PIN_TRISTATE) == 0) 218 conf |= GSCGPIO_CONF_OUTPUTEN; 219 if (flags & GPIO_PIN_PUSHPULL) 220 conf |= GSCGPIO_CONF_PUSHPULL; 221 if (flags & GPIO_PIN_PULLUP) 222 conf |= GSCGPIO_CONF_PULLUP; 223 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 224 GSCGPIO_CONF, conf); 225 } 226
Indexes created Mon Oct 13 16:09:52 GMT 2025