opti82c558.c revision 1.1
1 /* $NetBSD: opti82c558.c,v 1.1 1999/11/17 01:21:20 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * Support for the Opti 82c558 PCI-ISA bridge interrupt controller. 67 */ 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/device.h> 72 #include <sys/malloc.h> 73 74 #include <machine/intr.h> 75 #include <machine/bus.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 #include <i386/pci/pci_intr_fixup.h> 82 #include <i386/pci/opti82c558reg.h> 83 84 int opti82c558_getclink __P((pciintr_icu_handle_t, int, int *)); 85 int opti82c558_get_intr __P((pciintr_icu_handle_t, int, int *)); 86 int opti82c558_set_intr __P((pciintr_icu_handle_t, int, int)); 87 int opti82c558_get_trigger __P((pciintr_icu_handle_t, int, int *)); 88 int opti82c558_set_trigger __P((pciintr_icu_handle_t, int, int)); 89 90 const struct pciintr_icu opti82c558_pci_icu = { 91 opti82c558_getclink, 92 opti82c558_get_intr, 93 opti82c558_set_intr, 94 opti82c558_get_trigger, 95 opti82c558_set_trigger, 96 }; 97 98 struct opti82c558_handle { 99 pci_chipset_tag_t ph_pc; 100 pcitag_t ph_tag; 101 }; 102 103 static const int viper_pirq_decode[] = { 104 -1, 5, 9, 10, 11, 12, 14, 15 105 }; 106 107 static const int viper_pirq_encode[] = { 108 -1, /* 0 */ 109 -1, /* 1 */ 110 -1, /* 2 */ 111 -1, /* 3 */ 112 -1, /* 4 */ 113 VIPER_PIRQ_5, /* 5 */ 114 -1, /* 6 */ 115 -1, /* 7 */ 116 -1, /* 8 */ 117 VIPER_PIRQ_9, /* 9 */ 118 VIPER_PIRQ_10, /* 10 */ 119 VIPER_PIRQ_11, /* 11 */ 120 VIPER_PIRQ_12, /* 12 */ 121 -1, /* 13 */ 122 VIPER_PIRQ_14, /* 14 */ 123 VIPER_PIRQ_15, /* 15 */ 124 }; 125 126 int 127 opti82c558_init(pc, iot, tag, ptagp, phandp) 128 pci_chipset_tag_t pc; 129 bus_space_tag_t iot; 130 pcitag_t tag; 131 pciintr_icu_tag_t *ptagp; 132 pciintr_icu_handle_t *phandp; 133 { 134 struct opti82c558_handle *ph; 135 136 ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT); 137 if (ph == NULL) 138 return (1); 139 140 ph->ph_pc = pc; 141 ph->ph_tag = tag; 142 143 *ptagp = &opti82c558_pci_icu; 144 *phandp = ph; 145 return (0); 146 } 147 148 int 149 opti82c558_getclink(v, link, clinkp) 150 pciintr_icu_handle_t v; 151 int link, *clinkp; 152 { 153 154 if (VIPER_LEGAL_LINK(link - 1)) { 155 *clinkp = link - 1; 156 return (0); 157 } 158 159 return (1); 160 } 161 162 int 163 opti82c558_get_intr(v, clink, irqp) 164 pciintr_icu_handle_t v; 165 int clink, *irqp; 166 { 167 struct opti82c558_handle *ph = v; 168 pcireg_t reg; 169 int val; 170 171 if (VIPER_LEGAL_LINK(clink) == 0) 172 return (1); 173 174 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 175 val = VIPER_PIRQ(reg, clink); 176 *irqp = (val == VIPER_PIRQ_NONE) ? 0xff : viper_pirq_decode[val]; 177 178 return (0); 179 } 180 181 int 182 opti82c558_set_intr(v, clink, irq) 183 pciintr_icu_handle_t v; 184 int clink, irq; 185 { 186 struct opti82c558_handle *ph = v; 187 int shift; 188 pcireg_t reg; 189 190 if (VIPER_LEGAL_LINK(clink) == 0 || VIPER_LEGAL_IRQ(irq) == 0) 191 return (1); 192 193 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 194 shift = VIPER_PIRQ_SELECT_SHIFT * clink; 195 reg &= ~(VIPER_PIRQ_SELECT_MASK << shift); 196 reg |= (viper_pirq_encode[irq] << shift); 197 pci_conf_write(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ, reg); 198 199 return (0); 200 } 201 202 int 203 opti82c558_get_trigger(v, irq, triggerp) 204 pciintr_icu_handle_t v; 205 int irq, *triggerp; 206 { 207 struct opti82c558_handle *ph = v; 208 pcireg_t reg; 209 210 if (VIPER_LEGAL_IRQ(irq) == 0) { 211 /* ISA IRQ? */ 212 *triggerp = IST_EDGE; 213 return (0); 214 } 215 216 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 217 if ((reg >> (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq])) & 1) 218 *triggerp = IST_LEVEL; 219 else 220 *triggerp = IST_EDGE; 221 222 return (0); 223 } 224 225 int 226 opti82c558_set_trigger(v, irq, trigger) 227 pciintr_icu_handle_t v; 228 int irq, trigger; 229 { 230 struct opti82c558_handle *ph = v; 231 int shift; 232 pcireg_t reg; 233 234 if (VIPER_LEGAL_IRQ(irq) == 0) { 235 /* ISA IRQ? */ 236 return ((trigger != IST_LEVEL) ? 0 : 1); 237 } 238 239 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ); 240 shift = (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq]); 241 if (trigger == IST_LEVEL) 242 reg |= (1 << shift); 243 else 244 reg &= ~(1 << shift); 245 pci_conf_write(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ, reg); 246 247 return (0); 248 } 249
Indexes created Sun Sep 28 16:09:52 GMT 2025