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opti82c558.c revision 1.8
      1 /*	$NetBSD: opti82c558.c,v 1.8 2006/11/16 01:32:39 christos Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1999, by UCHIYAMA Yasushi
     42  * All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. The name of the developer may NOT be used to endorse or promote products
     50  *    derived from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     62  * SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * Support for the Opti 82c558 PCI-ISA bridge interrupt controller.
     67  */
     68 
     69 #include <sys/cdefs.h>
     70 __KERNEL_RCSID(0, "$NetBSD: opti82c558.c,v 1.8 2006/11/16 01:32:39 christos Exp $");
     71 
     72 #include <sys/param.h>
     73 #include <sys/systm.h>
     74 #include <sys/device.h>
     75 #include <sys/malloc.h>
     76 
     77 #include <machine/intr.h>
     78 #include <machine/bus.h>
     79 
     80 #include <dev/pci/pcivar.h>
     81 #include <dev/pci/pcireg.h>
     82 #include <dev/pci/pcidevs.h>
     83 
     84 #include <i386/pci/pci_intr_fixup.h>
     85 #include <i386/pci/opti82c558reg.h>
     86 
     87 int	opti82c558_getclink(pciintr_icu_handle_t, int, int *);
     88 int	opti82c558_get_intr(pciintr_icu_handle_t, int, int *);
     89 int	opti82c558_set_intr(pciintr_icu_handle_t, int, int);
     90 int	opti82c558_get_trigger(pciintr_icu_handle_t, int, int *);
     91 int	opti82c558_set_trigger(pciintr_icu_handle_t, int, int);
     92 
     93 const struct pciintr_icu opti82c558_pci_icu = {
     94 	opti82c558_getclink,
     95 	opti82c558_get_intr,
     96 	opti82c558_set_intr,
     97 	opti82c558_get_trigger,
     98 	opti82c558_set_trigger,
     99 };
    100 
    101 struct opti82c558_handle {
    102 	pci_chipset_tag_t ph_pc;
    103 	pcitag_t ph_tag;
    104 };
    105 
    106 static const int viper_pirq_decode[] = {
    107 	-1, 5, 9, 10, 11, 12, 14, 15
    108 };
    109 
    110 static const int viper_pirq_encode[] = {
    111 	-1,		/* 0 */
    112 	-1,		/* 1 */
    113 	-1,		/* 2 */
    114 	-1,		/* 3 */
    115 	-1,		/* 4 */
    116 	VIPER_PIRQ_5,	/* 5 */
    117 	-1,		/* 6 */
    118 	-1,		/* 7 */
    119 	-1,		/* 8 */
    120 	VIPER_PIRQ_9,	/* 9 */
    121 	VIPER_PIRQ_10,	/* 10 */
    122 	VIPER_PIRQ_11,	/* 11 */
    123 	VIPER_PIRQ_12,	/* 12 */
    124 	-1,		/* 13 */
    125 	VIPER_PIRQ_14,	/* 14 */
    126 	VIPER_PIRQ_15,	/* 15 */
    127 };
    128 
    129 int
    130 opti82c558_init(pci_chipset_tag_t pc, bus_space_tag_t iot,
    131     pcitag_t tag, pciintr_icu_tag_t *ptagp, pciintr_icu_handle_t *phandp)
    132 {
    133 	struct opti82c558_handle *ph;
    134 
    135 	ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT);
    136 	if (ph == NULL)
    137 		return (1);
    138 
    139 	ph->ph_pc = pc;
    140 	ph->ph_tag = tag;
    141 
    142 	*ptagp = &opti82c558_pci_icu;
    143 	*phandp = ph;
    144 	return (0);
    145 }
    146 
    147 int
    148 opti82c558_getclink(pciintr_icu_handle_t v, int link, int *clinkp)
    149 {
    150 
    151 	if (VIPER_LEGAL_LINK(link - 1)) {
    152 		*clinkp = link - 1;
    153 		return (0);
    154 	}
    155 
    156 	return (1);
    157 }
    158 
    159 int
    160 opti82c558_get_intr(pciintr_icu_handle_t v, int clink, int *irqp)
    161 {
    162 	struct opti82c558_handle *ph = v;
    163 	pcireg_t reg;
    164 	int val;
    165 
    166 	if (VIPER_LEGAL_LINK(clink) == 0)
    167 		return (1);
    168 
    169 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
    170 	val = VIPER_PIRQ(reg, clink);
    171 	*irqp = (val == VIPER_PIRQ_NONE) ?
    172 	    X86_PCI_INTERRUPT_LINE_NO_CONNECTION : viper_pirq_decode[val];
    173 
    174 	return (0);
    175 }
    176 
    177 int
    178 opti82c558_set_intr(pciintr_icu_handle_t v, int clink, int irq)
    179 {
    180 	struct opti82c558_handle *ph = v;
    181 	int shift;
    182 	pcireg_t reg;
    183 
    184 	if (VIPER_LEGAL_LINK(clink) == 0 || VIPER_LEGAL_IRQ(irq) == 0)
    185 		return (1);
    186 
    187 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
    188 	shift = VIPER_PIRQ_SELECT_SHIFT * clink;
    189 	reg &= ~(VIPER_PIRQ_SELECT_MASK << shift);
    190 	reg |= (viper_pirq_encode[irq] << shift);
    191 	pci_conf_write(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ, reg);
    192 
    193 	return (0);
    194 }
    195 
    196 int
    197 opti82c558_get_trigger(pciintr_icu_handle_t v, int irq, int *triggerp)
    198 {
    199 	struct opti82c558_handle *ph = v;
    200 	pcireg_t reg;
    201 
    202 	if (VIPER_LEGAL_IRQ(irq) == 0) {
    203 		/* ISA IRQ? */
    204 		*triggerp = IST_EDGE;
    205 		return (0);
    206 	}
    207 
    208 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
    209 	if ((reg >> (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq])) & 1)
    210 		*triggerp = IST_LEVEL;
    211 	else
    212 		*triggerp = IST_EDGE;
    213 
    214 	return (0);
    215 }
    216 
    217 int
    218 opti82c558_set_trigger(pciintr_icu_handle_t v, int irq, int trigger)
    219 {
    220 	struct opti82c558_handle *ph = v;
    221 	int shift;
    222 	pcireg_t reg;
    223 
    224 	if (VIPER_LEGAL_IRQ(irq) == 0) {
    225 		/* ISA IRQ? */
    226 		return ((trigger != IST_LEVEL) ? 0 : 1);
    227 	}
    228 
    229 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
    230 	shift = (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq]);
    231 	if (trigger == IST_LEVEL)
    232 		reg |= (1 << shift);
    233 	else
    234 		reg &= ~(1 << shift);
    235 	pci_conf_write(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ, reg);
    236 
    237 	return (0);
    238 }
    239