piixpcib.c revision 1.1
1 /* $NetBSD: piixpcib.c,v 1.1 2006/05/06 15:46:48 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Minoura Makoto, Matthew R. Green, and Jared D. McNeill. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Intel PIIX4 PCI-ISA bridge device driver with CPU frequency scaling support 41 * 42 * Based on the FreeBSD 'smist' cpufreq driver by Bruno Ducrot 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: piixpcib.c,v 1.1 2006/05/06 15:46:48 jmcneill Exp $"); 47 48 #include <sys/types.h> 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/sysctl.h> 53 #include <machine/bus.h> 54 55 #include <machine/frame.h> 56 #include <machine/bioscall.h> 57 58 #include <dev/pci/pcivar.h> 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcidevs.h> 61 62 struct piixpcib_softc { 63 struct device sc_dev; 64 65 int sc_smi_cmd; 66 int sc_smi_data; 67 int sc_command; 68 int sc_flags; 69 }; 70 71 static int piixpcibmatch(struct device *, struct cfdata *, void *); 72 static void piixpcibattach(struct device *, struct device *, void *); 73 74 static void speedstep_configure(struct piixpcib_softc *, 75 struct pci_attach_args *); 76 static int speedstep_sysctl_helper(SYSCTLFN_ARGS); 77 78 struct piixpcib_softc *speedstep_cookie; /* XXX */ 79 80 /* Defined in arch/i386/pci/pcib.c. */ 81 extern void pcibattach(struct device *, struct device *, void *); 82 83 CFATTACH_DECL(piixpcib, sizeof(struct piixpcib_softc), 84 piixpcibmatch, piixpcibattach, NULL, NULL); 85 86 /* 87 * Autoconf callbacks. 88 */ 89 static int 90 piixpcibmatch(struct device *parent, struct cfdata *match, void *aux) 91 { 92 struct pci_attach_args *pa; 93 94 pa = (struct pci_attach_args *)aux; 95 96 /* We are ISA bridge, of course */ 97 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 98 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) { 99 return 0; 100 } 101 102 /* Matches only Intel PIIX4 */ 103 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { 104 switch (PCI_PRODUCT(pa->pa_id)) { 105 case PCI_PRODUCT_INTEL_82371AB_ISA: /* PIIX4 */ 106 case PCI_PRODUCT_INTEL_82440MX_PMC: /* PIIX4 in MX440 */ 107 return 10; 108 } 109 } 110 111 return 0; 112 } 113 114 static void 115 piixpcibattach(struct device *parent, struct device *self, void *aux) 116 { 117 struct pci_attach_args *pa; 118 struct piixpcib_softc *sc; 119 120 pa = (struct pci_attach_args *)aux; 121 sc = (struct piixpcib_softc *)self; 122 123 pcibattach(parent, self, aux); 124 125 /* Set up SpeedStep. */ 126 speedstep_configure(sc, pa); 127 128 return; 129 } 130 131 /* 132 * Intel PIIX4 (SMI) SpeedStep support. 133 */ 134 135 #define PIIXPCIB_GSIC 0x47534943 136 #define PIIXPCIB_GETOWNER 0 137 #define PIIXPCIB_GETSTATE 1 138 #define PIIXPCIB_SETSTATE 2 139 #define PIIXPCIB_GETFREQS 4 140 141 #define PIIXPCIB_SPEEDSTEP_HIGH 0 142 #define PIIXPCIB_SPEEDSTEP_LOW 1 143 144 static void 145 piixpcib_int15_gsic_call(int *sig, int *smicmd, int *cmd, int *smidata, int *flags) 146 { 147 struct bioscallregs regs; 148 149 memset(®s, 0, sizeof(struct bioscallregs)); 150 regs.EAX = 0x0000e980; /* IST support */ 151 regs.EDX = PIIXPCIB_GSIC; 152 bioscall(0x15, ®s); 153 154 if (regs.EAX == PIIXPCIB_GSIC) { 155 *sig = regs.EAX; 156 *smicmd = regs.EBX & 0xff; 157 *cmd = (regs.EBX >> 16) & 0xff; 158 *smidata = regs.ECX; 159 *flags = regs.EDX; 160 } else 161 *sig = *smicmd = *cmd = *smidata = *flags = -1; 162 163 return; 164 } 165 166 static int 167 piixpcib_set_ownership(struct piixpcib_softc *sc) 168 { 169 int rv; 170 paddr_t pmagic; 171 static char magic[] = "Copyright (c) 1999 Intel Corporation"; 172 173 pmagic = vtophys((vaddr_t)magic); 174 175 __asm__ __volatile__( 176 "movl $0, %%edi\n\t" 177 "out %%al, (%%dx)\n" 178 : "=D" (rv) 179 : "a" (sc->sc_command), 180 "b" (0), 181 "c" (0), 182 "d" (sc->sc_smi_cmd), 183 "S" (pmagic) 184 ); 185 186 return (rv ? ENXIO : 0); 187 } 188 189 static int 190 piixpcib_getset_state(struct piixpcib_softc *sc, int *state, int function) 191 { 192 int new; 193 int rv; 194 int eax; 195 196 #ifdef DIAGNOSTIC 197 if (function != PIIXPCIB_GETSTATE && 198 function != PIIXPCIB_SETSTATE) { 199 aprint_error("%s: GSI called with invalid function %d\n", 200 sc->sc_dev.dv_xname, function); 201 return EINVAL; 202 } 203 #endif 204 205 __asm__ __volatile__( 206 "movl $0, %%edi\n\t" 207 "out %%al, (%%dx)\n" 208 : "=a" (eax), 209 "=b" (new), 210 "=D" (rv) 211 : "a" (sc->sc_command), 212 "b" (function), 213 "c" (*state), 214 "d" (sc->sc_smi_cmd), 215 "S" (0) 216 ); 217 218 *state = new & 1; 219 220 switch (function) { 221 case PIIXPCIB_GETSTATE: 222 if (eax) 223 return ENXIO; 224 break; 225 case PIIXPCIB_SETSTATE: 226 if (rv) 227 return ENXIO; 228 break; 229 } 230 231 return 0; 232 } 233 234 static int 235 piixpcib_get(struct piixpcib_softc *sc) 236 { 237 int rv; 238 int state; 239 240 rv = piixpcib_getset_state(sc, &state, PIIXPCIB_GETSTATE); 241 if (rv) 242 return rv; 243 244 return state & 1; 245 } 246 247 static int 248 piixpcib_set(struct piixpcib_softc *sc, int state) 249 { 250 int rv, s; 251 int try; 252 253 if (state != PIIXPCIB_SPEEDSTEP_HIGH && 254 state != PIIXPCIB_SPEEDSTEP_LOW) 255 return ENXIO; 256 if (piixpcib_get(sc) == state) 257 return 0; 258 259 try = 5; 260 261 s = splhigh(); 262 263 do { 264 rv = piixpcib_getset_state(sc, &state, PIIXPCIB_SETSTATE); 265 if (rv) 266 delay(200); 267 } while (rv && --try); 268 269 splx(s); 270 271 return rv; 272 } 273 274 static void 275 speedstep_configure(struct piixpcib_softc *sc, struct pci_attach_args *pa) 276 { 277 const struct sysctlnode *node, *ssnode; 278 int sig, smicmd, cmd, smidata, flags; 279 int rv; 280 281 piixpcib_int15_gsic_call(&sig, &smicmd, &cmd, &smidata, &flags); 282 283 if (sig != -1) { 284 sc->sc_smi_cmd = smicmd; 285 sc->sc_smi_data = smidata; 286 if (cmd == 0x80) { 287 aprint_debug("%s: GSIC returned cmd 0x80, should be 0x82\n", 288 sc->sc_dev.dv_xname); 289 cmd = 0x82; 290 } 291 sc->sc_command = (sig & 0xffffff00) | (cmd & 0xff); 292 sc->sc_flags = flags; 293 } else { 294 /* setup some defaults */ 295 sc->sc_smi_cmd = 0xb2; 296 sc->sc_smi_data = 0xb3; 297 sc->sc_command = 0x47534982; 298 sc->sc_flags = 0; 299 } 300 301 if (piixpcib_set_ownership(sc) != 0) { 302 aprint_error("%s: unable to claim ownership from the BIOS\n", 303 sc->sc_dev.dv_xname); 304 return; /* If we can't claim ownership from the BIOS, bail */ 305 } 306 307 /* Put in machdep.speedstep_state (0 for low, 1 for high). */ 308 if ((rv = sysctl_createv(NULL, 0, NULL, &node, 309 CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 310 NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL)) != 0) 311 goto err; 312 313 /* CTLFLAG_ANYWRITE? kernel option like EST? */ 314 if ((rv = sysctl_createv(NULL, 0, &node, &ssnode, 315 CTLFLAG_READWRITE, CTLTYPE_INT, "speedstep_state", NULL, 316 speedstep_sysctl_helper, 0, NULL, 0, CTL_CREATE, 317 CTL_EOL)) != 0) 318 goto err; 319 320 /* XXX save the sc for IO tag/handle */ 321 speedstep_cookie = sc; 322 323 aprint_verbose("%s: SpeedStep SMI enabled\n", sc->sc_dev.dv_xname); 324 325 return; 326 327 err: 328 aprint_normal("%s: sysctl_createv failed (rv = %d)\n", __func__, rv); 329 330 return; 331 } 332 333 /* 334 * get/set the SpeedStep state: 0 == low power, 1 == high power. 335 */ 336 static int 337 speedstep_sysctl_helper(SYSCTLFN_ARGS) 338 { 339 struct sysctlnode node; 340 struct piixpcib_softc *sc; 341 uint8_t state, state2; 342 int ostate, nstate, error; 343 344 sc = speedstep_cookie; 345 error = 0; 346 347 state = piixpcib_get(sc); 348 if (state == PIIXPCIB_SPEEDSTEP_HIGH) 349 ostate = 1; 350 else 351 ostate = 0; 352 nstate = ostate; 353 354 node = *rnode; 355 node.sysctl_data = &nstate; 356 357 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 358 if (error || newp == NULL) 359 goto out; 360 361 /* Only two states are available */ 362 if (nstate != 0 && nstate != 1) { 363 error = EINVAL; 364 goto out; 365 } 366 367 state2 = piixpcib_get(sc); 368 if (state2 == PIIXPCIB_SPEEDSTEP_HIGH) 369 ostate = 1; 370 else 371 ostate = 0; 372 373 if (ostate != nstate) 374 { 375 if (nstate == 0) 376 state2 = PIIXPCIB_SPEEDSTEP_LOW; 377 else 378 state2 = PIIXPCIB_SPEEDSTEP_HIGH; 379 380 error = piixpcib_set(sc, state2); 381 } 382 out: 383 return (error); 384 } 385
Indexes created Wed Sep 24 22:09:59 GMT 2025