piixpcib.c revision 1.2
1 /* $NetBSD: piixpcib.c,v 1.2 2006/05/06 20:44:29 jdc Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Minoura Makoto, Matthew R. Green, and Jared D. McNeill. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Intel PIIX4 PCI-ISA bridge device driver with CPU frequency scaling support 41 * 42 * Based on the FreeBSD 'smist' cpufreq driver by Bruno Ducrot 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: piixpcib.c,v 1.2 2006/05/06 20:44:29 jdc Exp $"); 47 48 #include <sys/types.h> 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/sysctl.h> 53 #include <machine/bus.h> 54 55 #include <machine/frame.h> 56 #include <machine/bioscall.h> 57 58 #include <dev/pci/pcivar.h> 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcidevs.h> 61 62 struct piixpcib_softc { 63 struct device sc_dev; 64 65 int sc_smi_cmd; 66 int sc_smi_data; 67 int sc_command; 68 int sc_flags; 69 }; 70 71 static int piixpcibmatch(struct device *, struct cfdata *, void *); 72 static void piixpcibattach(struct device *, struct device *, void *); 73 74 static void speedstep_configure(struct piixpcib_softc *, 75 struct pci_attach_args *); 76 static int speedstep_sysctl_helper(SYSCTLFN_ARGS); 77 78 struct piixpcib_softc *speedstep_cookie; /* XXX */ 79 80 /* Defined in arch/i386/pci/pcib.c. */ 81 extern void pcibattach(struct device *, struct device *, void *); 82 83 CFATTACH_DECL(piixpcib, sizeof(struct piixpcib_softc), 84 piixpcibmatch, piixpcibattach, NULL, NULL); 85 86 /* 87 * Autoconf callbacks. 88 */ 89 static int 90 piixpcibmatch(struct device *parent, struct cfdata *match, void *aux) 91 { 92 struct pci_attach_args *pa; 93 94 pa = (struct pci_attach_args *)aux; 95 96 /* We are ISA bridge, of course */ 97 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 98 (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA && 99 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_MISC)) { 100 return 0; 101 } 102 103 /* Matches only Intel PIIX4 */ 104 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { 105 switch (PCI_PRODUCT(pa->pa_id)) { 106 case PCI_PRODUCT_INTEL_82371AB_ISA: /* PIIX4 */ 107 case PCI_PRODUCT_INTEL_82440MX_PMC: /* PIIX4 in MX440 */ 108 return 10; 109 } 110 } 111 112 return 0; 113 } 114 115 static void 116 piixpcibattach(struct device *parent, struct device *self, void *aux) 117 { 118 struct pci_attach_args *pa; 119 struct piixpcib_softc *sc; 120 121 pa = (struct pci_attach_args *)aux; 122 sc = (struct piixpcib_softc *)self; 123 124 pcibattach(parent, self, aux); 125 126 /* Set up SpeedStep. */ 127 speedstep_configure(sc, pa); 128 129 return; 130 } 131 132 /* 133 * Intel PIIX4 (SMI) SpeedStep support. 134 */ 135 136 #define PIIXPCIB_GSIC 0x47534943 137 #define PIIXPCIB_GETOWNER 0 138 #define PIIXPCIB_GETSTATE 1 139 #define PIIXPCIB_SETSTATE 2 140 #define PIIXPCIB_GETFREQS 4 141 142 #define PIIXPCIB_SPEEDSTEP_HIGH 0 143 #define PIIXPCIB_SPEEDSTEP_LOW 1 144 145 static void 146 piixpcib_int15_gsic_call(int *sig, int *smicmd, int *cmd, int *smidata, int *flags) 147 { 148 struct bioscallregs regs; 149 150 memset(®s, 0, sizeof(struct bioscallregs)); 151 regs.EAX = 0x0000e980; /* IST support */ 152 regs.EDX = PIIXPCIB_GSIC; 153 bioscall(0x15, ®s); 154 155 if (regs.EAX == PIIXPCIB_GSIC) { 156 *sig = regs.EAX; 157 *smicmd = regs.EBX & 0xff; 158 *cmd = (regs.EBX >> 16) & 0xff; 159 *smidata = regs.ECX; 160 *flags = regs.EDX; 161 } else 162 *sig = *smicmd = *cmd = *smidata = *flags = -1; 163 164 return; 165 } 166 167 static int 168 piixpcib_set_ownership(struct piixpcib_softc *sc) 169 { 170 int rv; 171 paddr_t pmagic; 172 static char magic[] = "Copyright (c) 1999 Intel Corporation"; 173 174 pmagic = vtophys((vaddr_t)magic); 175 176 __asm__ __volatile__( 177 "movl $0, %%edi\n\t" 178 "out %%al, (%%dx)\n" 179 : "=D" (rv) 180 : "a" (sc->sc_command), 181 "b" (0), 182 "c" (0), 183 "d" (sc->sc_smi_cmd), 184 "S" (pmagic) 185 ); 186 187 return (rv ? ENXIO : 0); 188 } 189 190 static int 191 piixpcib_getset_state(struct piixpcib_softc *sc, int *state, int function) 192 { 193 int new; 194 int rv; 195 int eax; 196 197 #ifdef DIAGNOSTIC 198 if (function != PIIXPCIB_GETSTATE && 199 function != PIIXPCIB_SETSTATE) { 200 aprint_error("%s: GSI called with invalid function %d\n", 201 sc->sc_dev.dv_xname, function); 202 return EINVAL; 203 } 204 #endif 205 206 __asm__ __volatile__( 207 "movl $0, %%edi\n\t" 208 "out %%al, (%%dx)\n" 209 : "=a" (eax), 210 "=b" (new), 211 "=D" (rv) 212 : "a" (sc->sc_command), 213 "b" (function), 214 "c" (*state), 215 "d" (sc->sc_smi_cmd), 216 "S" (0) 217 ); 218 219 *state = new & 1; 220 221 switch (function) { 222 case PIIXPCIB_GETSTATE: 223 if (eax) 224 return ENXIO; 225 break; 226 case PIIXPCIB_SETSTATE: 227 if (rv) 228 return ENXIO; 229 break; 230 } 231 232 return 0; 233 } 234 235 static int 236 piixpcib_get(struct piixpcib_softc *sc) 237 { 238 int rv; 239 int state; 240 241 rv = piixpcib_getset_state(sc, &state, PIIXPCIB_GETSTATE); 242 if (rv) 243 return rv; 244 245 return state & 1; 246 } 247 248 static int 249 piixpcib_set(struct piixpcib_softc *sc, int state) 250 { 251 int rv, s; 252 int try; 253 254 if (state != PIIXPCIB_SPEEDSTEP_HIGH && 255 state != PIIXPCIB_SPEEDSTEP_LOW) 256 return ENXIO; 257 if (piixpcib_get(sc) == state) 258 return 0; 259 260 try = 5; 261 262 s = splhigh(); 263 264 do { 265 rv = piixpcib_getset_state(sc, &state, PIIXPCIB_SETSTATE); 266 if (rv) 267 delay(200); 268 } while (rv && --try); 269 270 splx(s); 271 272 return rv; 273 } 274 275 static void 276 speedstep_configure(struct piixpcib_softc *sc, struct pci_attach_args *pa) 277 { 278 const struct sysctlnode *node, *ssnode; 279 int sig, smicmd, cmd, smidata, flags; 280 int rv; 281 282 piixpcib_int15_gsic_call(&sig, &smicmd, &cmd, &smidata, &flags); 283 284 if (sig != -1) { 285 sc->sc_smi_cmd = smicmd; 286 sc->sc_smi_data = smidata; 287 if (cmd == 0x80) { 288 aprint_debug("%s: GSIC returned cmd 0x80, should be 0x82\n", 289 sc->sc_dev.dv_xname); 290 cmd = 0x82; 291 } 292 sc->sc_command = (sig & 0xffffff00) | (cmd & 0xff); 293 sc->sc_flags = flags; 294 } else { 295 /* setup some defaults */ 296 sc->sc_smi_cmd = 0xb2; 297 sc->sc_smi_data = 0xb3; 298 sc->sc_command = 0x47534982; 299 sc->sc_flags = 0; 300 } 301 302 if (piixpcib_set_ownership(sc) != 0) { 303 aprint_error("%s: unable to claim ownership from the BIOS\n", 304 sc->sc_dev.dv_xname); 305 return; /* If we can't claim ownership from the BIOS, bail */ 306 } 307 308 /* Put in machdep.speedstep_state (0 for low, 1 for high). */ 309 if ((rv = sysctl_createv(NULL, 0, NULL, &node, 310 CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 311 NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL)) != 0) 312 goto err; 313 314 /* CTLFLAG_ANYWRITE? kernel option like EST? */ 315 if ((rv = sysctl_createv(NULL, 0, &node, &ssnode, 316 CTLFLAG_READWRITE, CTLTYPE_INT, "speedstep_state", NULL, 317 speedstep_sysctl_helper, 0, NULL, 0, CTL_CREATE, 318 CTL_EOL)) != 0) 319 goto err; 320 321 /* XXX save the sc for IO tag/handle */ 322 speedstep_cookie = sc; 323 324 aprint_verbose("%s: SpeedStep SMI enabled\n", sc->sc_dev.dv_xname); 325 326 return; 327 328 err: 329 aprint_normal("%s: sysctl_createv failed (rv = %d)\n", __func__, rv); 330 331 return; 332 } 333 334 /* 335 * get/set the SpeedStep state: 0 == low power, 1 == high power. 336 */ 337 static int 338 speedstep_sysctl_helper(SYSCTLFN_ARGS) 339 { 340 struct sysctlnode node; 341 struct piixpcib_softc *sc; 342 uint8_t state, state2; 343 int ostate, nstate, error; 344 345 sc = speedstep_cookie; 346 error = 0; 347 348 state = piixpcib_get(sc); 349 if (state == PIIXPCIB_SPEEDSTEP_HIGH) 350 ostate = 1; 351 else 352 ostate = 0; 353 nstate = ostate; 354 355 node = *rnode; 356 node.sysctl_data = &nstate; 357 358 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 359 if (error || newp == NULL) 360 goto out; 361 362 /* Only two states are available */ 363 if (nstate != 0 && nstate != 1) { 364 error = EINVAL; 365 goto out; 366 } 367 368 state2 = piixpcib_get(sc); 369 if (state2 == PIIXPCIB_SPEEDSTEP_HIGH) 370 ostate = 1; 371 else 372 ostate = 0; 373 374 if (ostate != nstate) 375 { 376 if (nstate == 0) 377 state2 = PIIXPCIB_SPEEDSTEP_LOW; 378 else 379 state2 = PIIXPCIB_SPEEDSTEP_HIGH; 380 381 error = piixpcib_set(sc, state2); 382 } 383 out: 384 return (error); 385 } 386
Indexes created Thu Sep 25 02:09:54 GMT 2025