1 /* $NetBSD: sbc_obio.c,v 1.29 2025/05/24 10:08:35 nat Exp $ */ 2 3 /* 4 * Copyright (C) 1996,1997 Scott Reynolds. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: sbc_obio.c,v 1.29 2025/05/24 10:08:35 nat Exp $"); 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/errno.h> 37 #include <sys/device.h> 38 #include <sys/buf.h> 39 #include <sys/proc.h> 40 41 #include <dev/scsipi/scsi_all.h> 42 #include <dev/scsipi/scsipi_all.h> 43 #include <dev/scsipi/scsipi_debug.h> 44 #include <dev/scsipi/scsiconf.h> 45 46 #include <dev/ic/ncr5380reg.h> 47 #include <dev/ic/ncr5380var.h> 48 49 #include <machine/cpu.h> 50 #include <machine/bus.h> 51 #include <machine/viareg.h> 52 53 #include <mac68k/dev/sbcreg.h> 54 #include <mac68k/dev/sbcvar.h> 55 56 #include <mac68k/obio/obiovar.h> 57 58 /* 59 * From Guide to the Macintosh Family Hardware, pp. 137-143 60 * These are offsets from SCSIBase (see pmap_bootstrap.c) 61 */ 62 #define SBC_REG_OFS 0x10000 63 #define SBC_DMA_OFS 0x12000 64 #define SBC_HSK_OFS 0x06000 65 66 #define SBC_DMA_OFS_PB500 0x06000 67 68 #define SBC_REG_OFS_IIFX 0x08000 /* Just guessing... */ 69 #define SBC_DMA_OFS_IIFX 0x0c000 70 #define SBC_HSK_OFS_IIFX 0x0e000 71 72 #define SBC_REG_OFS_DUO2 0x00000 73 #define SBC_DMA_OFS_DUO2 0x02000 74 #define SBC_HSK_OFS_DUO2 0x04000 75 76 static int sbc_obio_match(device_t, cfdata_t, void *); 77 static void sbc_obio_attach(device_t, device_t, void *); 78 79 void sbc_intr_enable(struct ncr5380_softc *); 80 void sbc_intr_disable(struct ncr5380_softc *); 81 void sbc_obio_clrintr(struct ncr5380_softc *); 82 83 CFATTACH_DECL_NEW(sbc_obio, sizeof(struct sbc_softc), 84 sbc_obio_match, sbc_obio_attach, NULL, NULL); 85 86 static int 87 sbc_obio_match(device_t parent, cfdata_t cf, void *aux) 88 { 89 struct obio_attach_args *oa = aux; 90 91 switch (current_mac_model->machineid) { 92 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 93 if (oa->oa_addr == 0) 94 return 1; 95 break; 96 97 case MACH_MACPB210: 98 case MACH_MACPB230: 99 case MACH_MACPB250: 100 case MACH_MACPB270: 101 case MACH_MACPB280: 102 case MACH_MACPB280C: 103 if (oa->oa_addr == 1) 104 return 1; 105 /*FALLTHROUGH*/ 106 default: 107 if (oa->oa_addr == 0 && mac68k_machine.scsi80) 108 return 1; 109 } 110 return 0; 111 } 112 113 static void 114 sbc_obio_attach(device_t parent, device_t self, void *aux) 115 { 116 struct sbc_softc *sc = device_private(self); 117 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 118 struct obio_attach_args *oa = aux; 119 char bits[64]; 120 extern vaddr_t SCSIBase; 121 122 ncr_sc->sc_dev = self; 123 /* Pull in the options flags. */ 124 sc->sc_options = ((device_cfdata(self)->cf_flags | 125 sbc_options) & SBC_OPTIONS_MASK); 126 127 /* 128 * Set up offsets to 5380 registers and GLUE I/O space, and turn 129 * off options we know we can't support on certain models. 130 */ 131 switch (current_mac_model->machineid) { 132 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 133 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS_IIFX); 134 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS_IIFX); 135 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_IIFX); 136 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 137 break; 138 case MACH_MACPB500: 139 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 140 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); /*??*/ 141 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_PB500); 142 if (sc->sc_options & SBC_INTR) 143 sc->sc_options |= SBC_PDMA; 144 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 145 break; 146 case MACH_MACPB140: 147 case MACH_MACPB145: 148 case MACH_MACPB160: 149 case MACH_MACPB165: 150 case MACH_MACPB165C: 151 case MACH_MACPB170: 152 case MACH_MACPB180: 153 case MACH_MACPB180C: 154 if (sc->sc_options & SBC_PDMA) 155 sc->sc_options |= SBC_INTR; 156 sc->sc_options &= ~(SBC_PDMA); 157 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 158 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); 159 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS); 160 break; 161 case MACH_MACPB210: 162 case MACH_MACPB230: 163 case MACH_MACPB250: 164 case MACH_MACPB270: 165 case MACH_MACPB280: 166 case MACH_MACPB280C: 167 if (oa->oa_addr == 1) { 168 sc->sc_regs = (struct sbc_regs *)(0xfee00000 + SBC_REG_OFS_DUO2); 169 sc->sc_drq_addr = (vaddr_t)(0xfee00000 + SBC_HSK_OFS_DUO2); 170 sc->sc_nodrq_addr = (vaddr_t)(0xfee00000 + SBC_DMA_OFS_DUO2); 171 break; 172 } 173 /*FALLTHROUGH*/ 174 default: 175 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 176 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); 177 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS); 178 break; 179 } 180 181 /* 182 * Initialize fields used by the MI code 183 */ 184 ncr_sc->sci_r0 = &sc->sc_regs->sci_pr0.sci_reg; 185 ncr_sc->sci_r1 = &sc->sc_regs->sci_pr1.sci_reg; 186 ncr_sc->sci_r2 = &sc->sc_regs->sci_pr2.sci_reg; 187 ncr_sc->sci_r3 = &sc->sc_regs->sci_pr3.sci_reg; 188 ncr_sc->sci_r4 = &sc->sc_regs->sci_pr4.sci_reg; 189 ncr_sc->sci_r5 = &sc->sc_regs->sci_pr5.sci_reg; 190 ncr_sc->sci_r6 = &sc->sc_regs->sci_pr6.sci_reg; 191 ncr_sc->sci_r7 = &sc->sc_regs->sci_pr7.sci_reg; 192 193 ncr_sc->sc_rev = NCR_VARIANT_NCR5380; 194 195 /* 196 * MD function pointers used by the MI code. 197 */ 198 if (sc->sc_options & SBC_PDMA) { 199 ncr_sc->sc_pio_out = sbc_pdma_out; 200 ncr_sc->sc_pio_in = sbc_pdma_in; 201 } else { 202 ncr_sc->sc_pio_out = ncr5380_pio_out; 203 ncr_sc->sc_pio_in = ncr5380_pio_in; 204 } 205 ncr_sc->sc_dma_alloc = NULL; 206 ncr_sc->sc_dma_free = NULL; 207 ncr_sc->sc_dma_poll = NULL; 208 ncr_sc->sc_intr_on = NULL; 209 ncr_sc->sc_intr_off = NULL; 210 ncr_sc->sc_dma_setup = NULL; 211 ncr_sc->sc_dma_start = NULL; 212 ncr_sc->sc_dma_eop = NULL; 213 ncr_sc->sc_dma_stop = NULL; 214 ncr_sc->sc_flags = 0; 215 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 216 217 if (sc->sc_options & SBC_INTR) { 218 ncr_sc->sc_dma_alloc = sbc_dma_alloc; 219 ncr_sc->sc_dma_free = sbc_dma_free; 220 ncr_sc->sc_dma_poll = sbc_dma_poll; 221 ncr_sc->sc_dma_setup = sbc_dma_setup; 222 ncr_sc->sc_dma_start = sbc_dma_start; 223 ncr_sc->sc_dma_eop = sbc_dma_eop; 224 ncr_sc->sc_dma_stop = sbc_dma_stop; 225 via2_register_irq(VIA2_SCSIDRQ, sbc_drq_intr, ncr_sc); 226 } 227 228 mutex_init(&sc->sc_drq_lock, MUTEX_DEFAULT, IPL_BIO); 229 230 via2_register_irq(VIA2_SCSIIRQ, sbc_irq_intr, ncr_sc); 231 sc->sc_clrintr = sbc_obio_clrintr; 232 233 if ((sc->sc_options & SBC_RESELECT) == 0) 234 ncr_sc->sc_no_disconnect = 0xff; 235 236 if (sc->sc_options) { 237 snprintb(bits, sizeof(bits), SBC_OPTIONS_BITS, sc->sc_options); 238 aprint_normal(": options=%s", bits); 239 } 240 aprint_normal("\n"); 241 242 if (sc->sc_options & (SBC_INTR|SBC_RESELECT)) { 243 /* Enable SCSI interrupts through VIA2 */ 244 sbc_intr_enable(ncr_sc); 245 } 246 247 #ifdef SBC_DEBUG 248 if (sbc_debug) 249 aprint_debug_dev(self, "softc=%p regs=%p\n", sc, sc->sc_regs); 250 #endif 251 252 ncr_sc->sc_channel.chan_id = 7; 253 ncr_sc->sc_adapter.adapt_minphys = minphys; 254 255 /* 256 * Initialize the SCSI controller itself. 257 */ 258 ncr5380_attach(ncr_sc); 259 } 260 261 /* 262 * Interrupt support routines. 263 */ 264 void 265 sbc_intr_enable(struct ncr5380_softc *ncr_sc) 266 { 267 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 268 int s, flags; 269 270 flags = V2IF_SCSIIRQ; 271 if (sc->sc_options & SBC_INTR) 272 flags |= V2IF_SCSIDRQ; 273 274 s = splhigh(); 275 if (VIA2 == VIA2OFF) 276 via2_reg(vIER) = 0x80 | flags; 277 else 278 via2_reg(rIER) = 0x80 | flags; 279 splx(s); 280 } 281 282 void 283 sbc_intr_disable(struct ncr5380_softc *ncr_sc) 284 { 285 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 286 int s, flags; 287 288 flags = V2IF_SCSIIRQ; 289 if (sc->sc_options & SBC_INTR) 290 flags |= V2IF_SCSIDRQ; 291 292 s = splhigh(); 293 if (VIA2 == VIA2OFF) 294 via2_reg(vIER) = flags; 295 else 296 via2_reg(rIER) = flags; 297 splx(s); 298 } 299 300 void 301 sbc_obio_clrintr(struct ncr5380_softc *ncr_sc) 302 { 303 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 304 int flags; 305 306 flags = V2IF_SCSIIRQ; 307 if (sc->sc_options & SBC_INTR) 308 flags |= V2IF_SCSIDRQ; 309 310 if (VIA2 == VIA2OFF) 311 via2_reg(vIFR) = 0x80 | flags; 312 else 313 via2_reg(rIFR) = 0x80 | flags; 314 } 315
Indexes created Sat Sep 20 22:09:52 GMT 2025