sbc_obio.c revision 1.14.8.2       1  1.14.8.2  nathanw /*	$NetBSD: sbc_obio.c,v 1.14.8.2 2002/10/18 02:38:31 nathanw Exp $	*/
      2  1.14.8.2  nathanw 
      3  1.14.8.2  nathanw /*
      4  1.14.8.2  nathanw  * Copyright (C) 1996,1997 Scott Reynolds.  All rights reserved.
      5  1.14.8.2  nathanw  *
      6  1.14.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
      7  1.14.8.2  nathanw  * modification, are permitted provided that the following conditions
      8  1.14.8.2  nathanw  * are met:
      9  1.14.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     10  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     11  1.14.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     13  1.14.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     14  1.14.8.2  nathanw  * 3. The name of the author may not be used to endorse or promote products
     15  1.14.8.2  nathanw  *    derived from this software without specific prior written permission
     16  1.14.8.2  nathanw  *
     17  1.14.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  1.14.8.2  nathanw  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  1.14.8.2  nathanw  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  1.14.8.2  nathanw  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  1.14.8.2  nathanw  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  1.14.8.2  nathanw  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  1.14.8.2  nathanw  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  1.14.8.2  nathanw  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  1.14.8.2  nathanw  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     26  1.14.8.2  nathanw  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  1.14.8.2  nathanw  */
     28  1.14.8.2  nathanw 
     29  1.14.8.2  nathanw #include <sys/types.h>
     30  1.14.8.2  nathanw #include <sys/param.h>
     31  1.14.8.2  nathanw #include <sys/systm.h>
     32  1.14.8.2  nathanw #include <sys/kernel.h>
     33  1.14.8.2  nathanw #include <sys/errno.h>
     34  1.14.8.2  nathanw #include <sys/device.h>
     35  1.14.8.2  nathanw #include <sys/buf.h>
     36  1.14.8.2  nathanw #include <sys/proc.h>
     37  1.14.8.2  nathanw #include <sys/user.h>
     38  1.14.8.2  nathanw 
     39  1.14.8.2  nathanw #include <dev/scsipi/scsi_all.h>
     40  1.14.8.2  nathanw #include <dev/scsipi/scsipi_all.h>
     41  1.14.8.2  nathanw #include <dev/scsipi/scsipi_debug.h>
     42  1.14.8.2  nathanw #include <dev/scsipi/scsiconf.h>
     43  1.14.8.2  nathanw 
     44  1.14.8.2  nathanw #include <dev/ic/ncr5380reg.h>
     45  1.14.8.2  nathanw #include <dev/ic/ncr5380var.h>
     46  1.14.8.2  nathanw 
     47  1.14.8.2  nathanw #include <machine/cpu.h>
     48  1.14.8.2  nathanw #include <machine/viareg.h>
     49  1.14.8.2  nathanw 
     50  1.14.8.2  nathanw #include <mac68k/dev/sbcreg.h>
     51  1.14.8.2  nathanw #include <mac68k/dev/sbcvar.h>
     52  1.14.8.2  nathanw 
     53  1.14.8.2  nathanw /*
     54  1.14.8.2  nathanw  * From Guide to the Macintosh Family Hardware, pp. 137-143
     55  1.14.8.2  nathanw  * These are offsets from SCSIBase (see pmap_bootstrap.c)
     56  1.14.8.2  nathanw  */
     57  1.14.8.2  nathanw #define	SBC_REG_OFS		0x10000
     58  1.14.8.2  nathanw #define	SBC_DMA_OFS		0x12000
     59  1.14.8.2  nathanw #define	SBC_HSK_OFS		0x06000
     60  1.14.8.2  nathanw 
     61  1.14.8.2  nathanw #define	SBC_DMA_OFS_PB500	0x06000
     62  1.14.8.2  nathanw 
     63  1.14.8.2  nathanw #define	SBC_REG_OFS_IIFX	0x08000		/* Just guessing... */
     64  1.14.8.2  nathanw #define	SBC_DMA_OFS_IIFX	0x0c000
     65  1.14.8.2  nathanw #define	SBC_HSK_OFS_IIFX	0x0e000
     66  1.14.8.2  nathanw 
     67  1.14.8.2  nathanw #define	SBC_REG_OFS_DUO2	0x00000
     68  1.14.8.2  nathanw #define	SBC_DMA_OFS_DUO2	0x02000
     69  1.14.8.2  nathanw #define	SBC_HSK_OFS_DUO2	0x04000
     70  1.14.8.2  nathanw 
     71  1.14.8.2  nathanw static int	sbc_obio_match __P((struct device *, struct cfdata *, void *));
     72  1.14.8.2  nathanw static void	sbc_obio_attach __P((struct device *, struct device *, void *));
     73  1.14.8.2  nathanw 
     74  1.14.8.2  nathanw void	sbc_intr_enable __P((struct ncr5380_softc *));
     75  1.14.8.2  nathanw void	sbc_intr_disable __P((struct ncr5380_softc *));
     76  1.14.8.2  nathanw void	sbc_obio_clrintr __P((struct ncr5380_softc *));
     77  1.14.8.2  nathanw 
     78  1.14.8.2  nathanw CFATTACH_DECL(sbc_obio, sizeof(struct sbc_softc),
     79  1.14.8.2  nathanw     sbc_obio_match, sbc_obio_attach, NULL, NULL);
     80  1.14.8.2  nathanw 
     81  1.14.8.2  nathanw static int
     82  1.14.8.2  nathanw sbc_obio_match(parent, cf, args)
     83  1.14.8.2  nathanw 	struct device *parent;
     84  1.14.8.2  nathanw 	struct cfdata *cf;
     85  1.14.8.2  nathanw 	void *args;
     86  1.14.8.2  nathanw {
     87  1.14.8.2  nathanw 	switch (current_mac_model->machineid) {
     88  1.14.8.2  nathanw 	case MACH_MACIIFX:	/* Note: the IIfx isn't (yet) supported. */
     89  1.14.8.2  nathanw /*
     90  1.14.8.2  nathanw 		if (cf->cf_unit == 0)
     91  1.14.8.2  nathanw 			return 1;
     92  1.14.8.2  nathanw */
     93  1.14.8.2  nathanw 		break;
     94  1.14.8.2  nathanw 	case MACH_MACPB210:
     95  1.14.8.2  nathanw 	case MACH_MACPB230:
     96  1.14.8.2  nathanw 	case MACH_MACPB250:
     97  1.14.8.2  nathanw 	case MACH_MACPB270:
     98  1.14.8.2  nathanw 	case MACH_MACPB280:
     99  1.14.8.2  nathanw 	case MACH_MACPB280C:
    100  1.14.8.2  nathanw 		if (cf->cf_unit == 1)
    101  1.14.8.2  nathanw 			return 1;
    102  1.14.8.2  nathanw 		/*FALLTHROUGH*/
    103  1.14.8.2  nathanw 	default:
    104  1.14.8.2  nathanw 		if (cf->cf_unit == 0 && mac68k_machine.scsi80)
    105  1.14.8.2  nathanw 			return 1;
    106  1.14.8.2  nathanw 	}
    107  1.14.8.2  nathanw 	return 0;
    108  1.14.8.2  nathanw }
    109  1.14.8.2  nathanw 
    110  1.14.8.2  nathanw static void
    111  1.14.8.2  nathanw sbc_obio_attach(parent, self, args)
    112  1.14.8.2  nathanw 	struct device *parent, *self;
    113  1.14.8.2  nathanw 	void *args;
    114  1.14.8.2  nathanw {
    115  1.14.8.2  nathanw 	struct sbc_softc *sc = (struct sbc_softc *) self;
    116  1.14.8.2  nathanw 	struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *) sc;
    117  1.14.8.2  nathanw 	char bits[64];
    118  1.14.8.2  nathanw 	extern vaddr_t SCSIBase;
    119  1.14.8.2  nathanw 
    120  1.14.8.2  nathanw 	/* Pull in the options flags. */
    121  1.14.8.2  nathanw 	sc->sc_options = ((ncr_sc->sc_dev.dv_cfdata->cf_flags | sbc_options)
    122  1.14.8.2  nathanw 	    & SBC_OPTIONS_MASK);
    123  1.14.8.2  nathanw 
    124  1.14.8.2  nathanw 	/*
    125  1.14.8.2  nathanw 	 * Set up offsets to 5380 registers and GLUE I/O space, and turn
    126  1.14.8.2  nathanw 	 * off options we know we can't support on certain models.
    127  1.14.8.2  nathanw 	 */
    128  1.14.8.2  nathanw 	switch (current_mac_model->machineid) {
    129  1.14.8.2  nathanw 	case MACH_MACIIFX:	/* Note: the IIfx isn't (yet) supported. */
    130  1.14.8.2  nathanw 		sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS_IIFX);
    131  1.14.8.2  nathanw 		sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS_IIFX);
    132  1.14.8.2  nathanw 		sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_IIFX);
    133  1.14.8.2  nathanw 		sc->sc_options &= ~(SBC_INTR | SBC_RESELECT);
    134  1.14.8.2  nathanw 		break;
    135  1.14.8.2  nathanw 	case MACH_MACPB500:
    136  1.14.8.2  nathanw 		sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS);
    137  1.14.8.2  nathanw 		sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); /*??*/
    138  1.14.8.2  nathanw 		sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_PB500);
    139  1.14.8.2  nathanw 		sc->sc_options &= ~(SBC_INTR | SBC_RESELECT);
    140  1.14.8.2  nathanw 		break;
    141  1.14.8.2  nathanw 	case MACH_MACPB210:
    142  1.14.8.2  nathanw 	case MACH_MACPB230:
    143  1.14.8.2  nathanw 	case MACH_MACPB250:
    144  1.14.8.2  nathanw 	case MACH_MACPB270:
    145  1.14.8.2  nathanw 	case MACH_MACPB280:
    146  1.14.8.2  nathanw 	case MACH_MACPB280C:
    147  1.14.8.2  nathanw 		if (ncr_sc->sc_dev.dv_unit == 1) {
    148  1.14.8.2  nathanw 			sc->sc_regs = (struct sbc_regs *)(0xfee00000 + SBC_REG_OFS_DUO2);
    149  1.14.8.2  nathanw 			sc->sc_drq_addr = (vaddr_t)(0xfee00000 + SBC_HSK_OFS_DUO2);
    150  1.14.8.2  nathanw 			sc->sc_nodrq_addr = (vaddr_t)(0xfee00000 + SBC_DMA_OFS_DUO2);
    151  1.14.8.2  nathanw 			break;
    152  1.14.8.2  nathanw 		}
    153  1.14.8.2  nathanw 		/*FALLTHROUGH*/
    154  1.14.8.2  nathanw 	default:
    155  1.14.8.2  nathanw 		sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS);
    156  1.14.8.2  nathanw 		sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS);
    157  1.14.8.2  nathanw 		sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS);
    158  1.14.8.2  nathanw 		break;
    159  1.14.8.2  nathanw 	}
    160  1.14.8.2  nathanw 
    161  1.14.8.2  nathanw 	/*
    162  1.14.8.2  nathanw 	 * Initialize fields used by the MI code
    163  1.14.8.2  nathanw 	 */
    164  1.14.8.2  nathanw 	ncr_sc->sci_r0 = &sc->sc_regs->sci_pr0.sci_reg;
    165  1.14.8.2  nathanw 	ncr_sc->sci_r1 = &sc->sc_regs->sci_pr1.sci_reg;
    166  1.14.8.2  nathanw 	ncr_sc->sci_r2 = &sc->sc_regs->sci_pr2.sci_reg;
    167  1.14.8.2  nathanw 	ncr_sc->sci_r3 = &sc->sc_regs->sci_pr3.sci_reg;
    168  1.14.8.2  nathanw 	ncr_sc->sci_r4 = &sc->sc_regs->sci_pr4.sci_reg;
    169  1.14.8.2  nathanw 	ncr_sc->sci_r5 = &sc->sc_regs->sci_pr5.sci_reg;
    170  1.14.8.2  nathanw 	ncr_sc->sci_r6 = &sc->sc_regs->sci_pr6.sci_reg;
    171  1.14.8.2  nathanw 	ncr_sc->sci_r7 = &sc->sc_regs->sci_pr7.sci_reg;
    172  1.14.8.2  nathanw 
    173  1.14.8.2  nathanw 	ncr_sc->sc_rev = NCR_VARIANT_NCR5380;
    174  1.14.8.2  nathanw 
    175  1.14.8.2  nathanw 	/*
    176  1.14.8.2  nathanw 	 * MD function pointers used by the MI code.
    177  1.14.8.2  nathanw 	 */
    178  1.14.8.2  nathanw 	if (sc->sc_options & SBC_PDMA) {
    179  1.14.8.2  nathanw 		ncr_sc->sc_pio_out   = sbc_pdma_out;
    180  1.14.8.2  nathanw 		ncr_sc->sc_pio_in    = sbc_pdma_in;
    181  1.14.8.2  nathanw 	} else {
    182  1.14.8.2  nathanw 		ncr_sc->sc_pio_out   = ncr5380_pio_out;
    183  1.14.8.2  nathanw 		ncr_sc->sc_pio_in    = ncr5380_pio_in;
    184  1.14.8.2  nathanw 	}
    185  1.14.8.2  nathanw 	ncr_sc->sc_dma_alloc = NULL;
    186  1.14.8.2  nathanw 	ncr_sc->sc_dma_free  = NULL;
    187  1.14.8.2  nathanw 	ncr_sc->sc_dma_poll  = NULL;
    188  1.14.8.2  nathanw 	ncr_sc->sc_intr_on   = NULL;
    189  1.14.8.2  nathanw 	ncr_sc->sc_intr_off  = NULL;
    190  1.14.8.2  nathanw 	ncr_sc->sc_dma_setup = NULL;
    191  1.14.8.2  nathanw 	ncr_sc->sc_dma_start = NULL;
    192  1.14.8.2  nathanw 	ncr_sc->sc_dma_eop   = NULL;
    193  1.14.8.2  nathanw 	ncr_sc->sc_dma_stop  = NULL;
    194  1.14.8.2  nathanw 	ncr_sc->sc_flags = 0;
    195  1.14.8.2  nathanw 	ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
    196  1.14.8.2  nathanw 
    197  1.14.8.2  nathanw 	if (sc->sc_options & SBC_INTR) {
    198  1.14.8.2  nathanw 		ncr_sc->sc_dma_alloc = sbc_dma_alloc;
    199  1.14.8.2  nathanw 		ncr_sc->sc_dma_free  = sbc_dma_free;
    200  1.14.8.2  nathanw 		ncr_sc->sc_dma_poll  = sbc_dma_poll;
    201  1.14.8.2  nathanw 		ncr_sc->sc_dma_setup = sbc_dma_setup;
    202  1.14.8.2  nathanw 		ncr_sc->sc_dma_start = sbc_dma_start;
    203  1.14.8.2  nathanw 		ncr_sc->sc_dma_eop   = sbc_dma_eop;
    204  1.14.8.2  nathanw 		ncr_sc->sc_dma_stop  = sbc_dma_stop;
    205  1.14.8.2  nathanw 		via2_register_irq(VIA2_SCSIDRQ, sbc_drq_intr, ncr_sc);
    206  1.14.8.2  nathanw 	}
    207  1.14.8.2  nathanw 
    208  1.14.8.2  nathanw 	via2_register_irq(VIA2_SCSIIRQ, sbc_irq_intr, ncr_sc);
    209  1.14.8.2  nathanw 	sc->sc_clrintr = sbc_obio_clrintr;
    210  1.14.8.2  nathanw 
    211  1.14.8.2  nathanw 	if ((sc->sc_options & SBC_RESELECT) == 0)
    212  1.14.8.2  nathanw 		ncr_sc->sc_no_disconnect = 0xff;
    213  1.14.8.2  nathanw 
    214  1.14.8.2  nathanw 	if (sc->sc_options)
    215  1.14.8.2  nathanw 		printf(": options=%s", bitmask_snprintf(sc->sc_options,
    216  1.14.8.2  nathanw 		    SBC_OPTIONS_BITS, bits, sizeof(bits)));
    217  1.14.8.2  nathanw 	printf("\n");
    218  1.14.8.2  nathanw 
    219  1.14.8.2  nathanw 	if (sc->sc_options & (SBC_INTR|SBC_RESELECT)) {
    220  1.14.8.2  nathanw 		/* Enable SCSI interrupts through VIA2 */
    221  1.14.8.2  nathanw 		sbc_intr_enable(ncr_sc);
    222  1.14.8.2  nathanw 	}
    223  1.14.8.2  nathanw 
    224  1.14.8.2  nathanw #ifdef SBC_DEBUG
    225  1.14.8.2  nathanw 	if (sbc_debug)
    226  1.14.8.2  nathanw 		printf("%s: softc=%p regs=%p\n", ncr_sc->sc_dev.dv_xname,
    227  1.14.8.2  nathanw 		    sc, sc->sc_regs);
    228  1.14.8.2  nathanw #endif
    229  1.14.8.2  nathanw 
    230  1.14.8.2  nathanw 	ncr_sc->sc_channel.chan_id = 7;
    231  1.14.8.2  nathanw 	ncr_sc->sc_adapter.adapt_minphys = minphys;
    232  1.14.8.2  nathanw 
    233  1.14.8.2  nathanw 	/*
    234  1.14.8.2  nathanw 	 *  Initialize the SCSI controller itself.
    235  1.14.8.2  nathanw 	 */
    236  1.14.8.2  nathanw 	ncr5380_attach(ncr_sc);
    237  1.14.8.2  nathanw }
    238  1.14.8.2  nathanw 
    239  1.14.8.2  nathanw /*
    240  1.14.8.2  nathanw  * Interrupt support routines.
    241  1.14.8.2  nathanw  */
    242  1.14.8.2  nathanw void
    243  1.14.8.2  nathanw sbc_intr_enable(ncr_sc)
    244  1.14.8.2  nathanw 	struct ncr5380_softc *ncr_sc;
    245  1.14.8.2  nathanw {
    246  1.14.8.2  nathanw 	struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
    247  1.14.8.2  nathanw 	int s, flags;
    248  1.14.8.2  nathanw 
    249  1.14.8.2  nathanw 	flags = V2IF_SCSIIRQ;
    250  1.14.8.2  nathanw 	if (sc->sc_options & SBC_INTR)
    251  1.14.8.2  nathanw 		flags |= V2IF_SCSIDRQ;
    252  1.14.8.2  nathanw 
    253  1.14.8.2  nathanw 	s = splhigh();
    254  1.14.8.2  nathanw 	if (VIA2 == VIA2OFF)
    255  1.14.8.2  nathanw 		via2_reg(vIER) = 0x80 | flags;
    256  1.14.8.2  nathanw 	else
    257  1.14.8.2  nathanw 		via2_reg(rIER) = 0x80 | flags;
    258  1.14.8.2  nathanw 	splx(s);
    259  1.14.8.2  nathanw }
    260  1.14.8.2  nathanw 
    261  1.14.8.2  nathanw void
    262  1.14.8.2  nathanw sbc_intr_disable(ncr_sc)
    263  1.14.8.2  nathanw 	struct ncr5380_softc *ncr_sc;
    264  1.14.8.2  nathanw {
    265  1.14.8.2  nathanw 	struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
    266  1.14.8.2  nathanw 	int s, flags;
    267  1.14.8.2  nathanw 
    268  1.14.8.2  nathanw 	flags = V2IF_SCSIIRQ;
    269  1.14.8.2  nathanw 	if (sc->sc_options & SBC_INTR)
    270  1.14.8.2  nathanw 		flags |= V2IF_SCSIDRQ;
    271  1.14.8.2  nathanw 
    272  1.14.8.2  nathanw 	s = splhigh();
    273  1.14.8.2  nathanw 	if (VIA2 == VIA2OFF)
    274  1.14.8.2  nathanw 		via2_reg(vIER) = flags;
    275  1.14.8.2  nathanw 	else
    276  1.14.8.2  nathanw 		via2_reg(rIER) = flags;
    277  1.14.8.2  nathanw 	splx(s);
    278  1.14.8.2  nathanw }
    279  1.14.8.2  nathanw 
    280  1.14.8.2  nathanw void
    281  1.14.8.2  nathanw sbc_obio_clrintr(ncr_sc)
    282  1.14.8.2  nathanw 	struct ncr5380_softc *ncr_sc;
    283  1.14.8.2  nathanw {
    284  1.14.8.2  nathanw 	struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
    285  1.14.8.2  nathanw 	int flags;
    286  1.14.8.2  nathanw 
    287  1.14.8.2  nathanw 	flags = V2IF_SCSIIRQ;
    288  1.14.8.2  nathanw 	if (sc->sc_options & SBC_INTR)
    289  1.14.8.2  nathanw 		flags |= V2IF_SCSIDRQ;
    290  1.14.8.2  nathanw 
    291  1.14.8.2  nathanw 	if (VIA2 == VIA2OFF)
    292  1.14.8.2  nathanw 		via2_reg(vIFR) = 0x80 | flags;
    293  1.14.8.2  nathanw 	else
    294  1.14.8.2  nathanw 		via2_reg(rIFR) = 0x80 | flags;
    295  1.14.8.2  nathanw }
    296