sbc_obio.c revision 1.6
1 /* $NetBSD: sbc_obio.c,v 1.6 1997/10/10 05:55:03 scottr Exp $ */ 2 3 /* 4 * Copyright (C) 1996,1997 Scott Reynolds. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/types.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/errno.h> 34 #include <sys/device.h> 35 #include <sys/buf.h> 36 #include <sys/proc.h> 37 #include <sys/user.h> 38 39 #include <dev/scsipi/scsi_all.h> 40 #include <dev/scsipi/scsipi_all.h> 41 #include <dev/scsipi/scsipi_debug.h> 42 #include <dev/scsipi/scsiconf.h> 43 44 #include <dev/ic/ncr5380reg.h> 45 #include <dev/ic/ncr5380var.h> 46 47 #include <machine/cpu.h> 48 #include <machine/viareg.h> 49 50 #include <mac68k/dev/sbcreg.h> 51 #include <mac68k/dev/sbcvar.h> 52 53 /* 54 * From Guide to the Macintosh Family Hardware, pp. 137-143 55 * These are offsets from SCSIBase (see pmap_bootstrap.c) 56 */ 57 #define SBC_REG_OFS 0x10000 58 #define SBC_DMA_OFS 0x12000 59 #define SBC_HSK_OFS 0x06000 60 61 #define SBC_DMA_OFS_PB500 0x06000 62 63 #define SBC_REG_OFS_IIFX 0x08000 /* Just guessing... */ 64 #define SBC_DMA_OFS_IIFX 0x0c000 65 #define SBC_HSK_OFS_IIFX 0x0e000 66 67 #define SBC_REG_OFS_DUO2 0x00000 68 #define SBC_DMA_OFS_DUO2 0x02000 69 #define SBC_HSK_OFS_DUO2 0x04000 70 71 static int sbc_obio_match __P((struct device *, struct cfdata *, void *)); 72 static void sbc_obio_attach __P((struct device *, struct device *, void *)); 73 74 void sbc_intr_enable __P((struct ncr5380_softc *)); 75 void sbc_intr_disable __P((struct ncr5380_softc *)); 76 void sbc_obio_clrintr __P((struct ncr5380_softc *)); 77 78 struct cfattach sbc_obio_ca = { 79 sizeof(struct sbc_softc), sbc_obio_match, sbc_obio_attach 80 }; 81 82 static int 83 sbc_obio_match(parent, cf, args) 84 struct device *parent; 85 struct cfdata *cf; 86 void *args; 87 { 88 switch (current_mac_model->machineid) { 89 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 90 break; 91 case MACH_MACPB210: 92 case MACH_MACPB230: 93 case MACH_MACPB250: 94 case MACH_MACPB270: 95 case MACH_MACPB280: 96 case MACH_MACPB280C: 97 if (cf->cf_unit == 1) 98 return 1; 99 /*FALLTHROUGH*/ 100 default: 101 if (cf->cf_unit == 0 && mac68k_machine.scsi80) 102 return 1; 103 } 104 return 0; 105 } 106 107 static void 108 sbc_obio_attach(parent, self, args) 109 struct device *parent, *self; 110 void *args; 111 { 112 struct sbc_softc *sc = (struct sbc_softc *) self; 113 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *) sc; 114 char bits[64]; 115 extern vm_offset_t SCSIBase; 116 117 /* Pull in the options flags. */ 118 sc->sc_options = ((ncr_sc->sc_dev.dv_cfdata->cf_flags | sbc_options) 119 & SBC_OPTIONS_MASK); 120 121 /* 122 * Set up offsets to 5380 registers and GLUE I/O space, and turn 123 * off options we know we can't support on certain models. 124 */ 125 switch (current_mac_model->machineid) { 126 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 127 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS_IIFX); 128 sc->sc_drq_addr = (vm_offset_t)(SCSIBase + SBC_HSK_OFS_IIFX); 129 sc->sc_nodrq_addr = (vm_offset_t)(SCSIBase + SBC_DMA_OFS_IIFX); 130 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 131 break; 132 case MACH_MACPB500: 133 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 134 sc->sc_drq_addr = (vm_offset_t)(SCSIBase + SBC_HSK_OFS); /*??*/ 135 sc->sc_nodrq_addr = (vm_offset_t)(SCSIBase + SBC_DMA_OFS_PB500); 136 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 137 break; 138 case MACH_MACPB210: 139 case MACH_MACPB230: 140 case MACH_MACPB250: 141 case MACH_MACPB270: 142 case MACH_MACPB280: 143 case MACH_MACPB280C: 144 if (ncr_sc->sc_dev.dv_unit == 1) { 145 sc->sc_regs = (struct sbc_regs *)(0xfee00000 + SBC_REG_OFS_DUO2); 146 sc->sc_drq_addr = (vm_offset_t)(0xfee00000 + SBC_HSK_OFS_DUO2); 147 sc->sc_nodrq_addr = (vm_offset_t)(0xfee00000 + SBC_DMA_OFS_DUO2); 148 break; 149 } 150 /*FALLTHROUGH*/ 151 default: 152 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 153 sc->sc_drq_addr = (vm_offset_t)(SCSIBase + SBC_HSK_OFS); 154 sc->sc_nodrq_addr = (vm_offset_t)(SCSIBase + SBC_DMA_OFS); 155 break; 156 } 157 158 /* 159 * Fill in the prototype scsi_link. 160 */ 161 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 162 ncr_sc->sc_link.adapter_softc = sc; 163 ncr_sc->sc_link.scsipi_scsi.adapter_target = 7; 164 ncr_sc->sc_link.adapter = &sbc_ops; 165 ncr_sc->sc_link.device = &sbc_dev; 166 ncr_sc->sc_link.type = BUS_SCSI; 167 168 /* 169 * Initialize fields used by the MI code 170 */ 171 ncr_sc->sci_r0 = &sc->sc_regs->sci_pr0.sci_reg; 172 ncr_sc->sci_r1 = &sc->sc_regs->sci_pr1.sci_reg; 173 ncr_sc->sci_r2 = &sc->sc_regs->sci_pr2.sci_reg; 174 ncr_sc->sci_r3 = &sc->sc_regs->sci_pr3.sci_reg; 175 ncr_sc->sci_r4 = &sc->sc_regs->sci_pr4.sci_reg; 176 ncr_sc->sci_r5 = &sc->sc_regs->sci_pr5.sci_reg; 177 ncr_sc->sci_r6 = &sc->sc_regs->sci_pr6.sci_reg; 178 ncr_sc->sci_r7 = &sc->sc_regs->sci_pr7.sci_reg; 179 180 /* 181 * MD function pointers used by the MI code. 182 */ 183 if (sc->sc_options & SBC_PDMA) { 184 ncr_sc->sc_pio_out = sbc_pdma_out; 185 ncr_sc->sc_pio_in = sbc_pdma_in; 186 } else { 187 ncr_sc->sc_pio_out = ncr5380_pio_out; 188 ncr_sc->sc_pio_in = ncr5380_pio_in; 189 } 190 ncr_sc->sc_dma_alloc = NULL; 191 ncr_sc->sc_dma_free = NULL; 192 ncr_sc->sc_dma_poll = NULL; 193 ncr_sc->sc_intr_on = NULL; 194 ncr_sc->sc_intr_off = NULL; 195 ncr_sc->sc_dma_setup = NULL; 196 ncr_sc->sc_dma_start = NULL; 197 ncr_sc->sc_dma_eop = NULL; 198 ncr_sc->sc_dma_stop = NULL; 199 ncr_sc->sc_flags = 0; 200 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 201 202 if (sc->sc_options & SBC_INTR) { 203 ncr_sc->sc_dma_alloc = sbc_dma_alloc; 204 ncr_sc->sc_dma_free = sbc_dma_free; 205 ncr_sc->sc_dma_poll = sbc_dma_poll; 206 ncr_sc->sc_dma_setup = sbc_dma_setup; 207 ncr_sc->sc_dma_start = sbc_dma_start; 208 ncr_sc->sc_dma_eop = sbc_dma_eop; 209 ncr_sc->sc_dma_stop = sbc_dma_stop; 210 via2_register_irq(VIA2_SCSIDRQ, sbc_drq_intr, ncr_sc); 211 } 212 213 via2_register_irq(VIA2_SCSIIRQ, sbc_irq_intr, ncr_sc); 214 sc->sc_clrintr = sbc_obio_clrintr; 215 216 if ((sc->sc_options & SBC_RESELECT) == 0) 217 ncr_sc->sc_no_disconnect = 0xff; 218 219 if (sc->sc_options) 220 printf(": options=%s", bitmask_snprintf(sc->sc_options, 221 SBC_OPTIONS_BITS, bits, sizeof(bits))); 222 printf("\n"); 223 224 /* Enable SCSI interrupts through VIA2 */ 225 sbc_intr_enable(ncr_sc); 226 227 #ifdef SBC_DEBUG 228 if (sbc_debug) 229 printf("%s: softc=%p regs=%p\n", ncr_sc->sc_dev.dv_xname, 230 sc, sc->sc_regs); 231 ncr_sc->sc_link.flags |= sbc_link_flags; 232 #endif 233 234 /* 235 * Initialize the SCSI controller itself. 236 */ 237 ncr5380_init(ncr_sc); 238 ncr5380_reset_scsibus(ncr_sc); 239 config_found(self, &(ncr_sc->sc_link), scsiprint); 240 } 241 242 /* 243 * Interrupt support routines. 244 */ 245 void 246 sbc_intr_enable(ncr_sc) 247 struct ncr5380_softc *ncr_sc; 248 { 249 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 250 int s, flags; 251 252 flags = V2IF_SCSIIRQ; 253 if (sc->sc_options & SBC_INTR) 254 flags |= V2IF_SCSIDRQ; 255 256 s = splhigh(); 257 if (VIA2 == VIA2OFF) 258 via2_reg(vIER) = 0x80 | flags; 259 else 260 via2_reg(rIER) = 0x80 | flags; 261 splx(s); 262 } 263 264 void 265 sbc_intr_disable(ncr_sc) 266 struct ncr5380_softc *ncr_sc; 267 { 268 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 269 int s, flags; 270 271 flags = V2IF_SCSIIRQ; 272 if (sc->sc_options & SBC_INTR) 273 flags |= V2IF_SCSIDRQ; 274 275 s = splhigh(); 276 if (VIA2 == VIA2OFF) 277 via2_reg(vIER) = flags; 278 else 279 via2_reg(rIER) = flags; 280 splx(s); 281 } 282 283 void 284 sbc_obio_clrintr(ncr_sc) 285 struct ncr5380_softc *ncr_sc; 286 { 287 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 288 int flags; 289 290 flags = V2IF_SCSIIRQ; 291 if (sc->sc_options & SBC_INTR) 292 flags |= V2IF_SCSIDRQ; 293 294 if (VIA2 == VIA2OFF) 295 via2_reg(vIFR) = 0x80 | flags; 296 else 297 via2_reg(rIFR) = 0x80 | flags; 298 } 299
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