sbc_obio.c revision 1.8
1 /* $NetBSD: sbc_obio.c,v 1.8 1998/05/02 16:45:31 scottr Exp $ */ 2 3 /* 4 * Copyright (C) 1996,1997 Scott Reynolds. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/types.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/errno.h> 34 #include <sys/device.h> 35 #include <sys/buf.h> 36 #include <sys/proc.h> 37 #include <sys/user.h> 38 39 #include <dev/scsipi/scsi_all.h> 40 #include <dev/scsipi/scsipi_all.h> 41 #include <dev/scsipi/scsipi_debug.h> 42 #include <dev/scsipi/scsiconf.h> 43 44 #include <dev/ic/ncr5380reg.h> 45 #include <dev/ic/ncr5380var.h> 46 47 #include <machine/cpu.h> 48 #include <machine/viareg.h> 49 50 #include <mac68k/dev/sbcreg.h> 51 #include <mac68k/dev/sbcvar.h> 52 53 /* 54 * From Guide to the Macintosh Family Hardware, pp. 137-143 55 * These are offsets from SCSIBase (see pmap_bootstrap.c) 56 */ 57 #define SBC_REG_OFS 0x10000 58 #define SBC_DMA_OFS 0x12000 59 #define SBC_HSK_OFS 0x06000 60 61 #define SBC_DMA_OFS_PB500 0x06000 62 63 #define SBC_REG_OFS_IIFX 0x08000 /* Just guessing... */ 64 #define SBC_DMA_OFS_IIFX 0x0c000 65 #define SBC_HSK_OFS_IIFX 0x0e000 66 67 #define SBC_REG_OFS_DUO2 0x00000 68 #define SBC_DMA_OFS_DUO2 0x02000 69 #define SBC_HSK_OFS_DUO2 0x04000 70 71 static int sbc_obio_match __P((struct device *, struct cfdata *, void *)); 72 static void sbc_obio_attach __P((struct device *, struct device *, void *)); 73 74 void sbc_intr_enable __P((struct ncr5380_softc *)); 75 void sbc_intr_disable __P((struct ncr5380_softc *)); 76 void sbc_obio_clrintr __P((struct ncr5380_softc *)); 77 78 struct cfattach sbc_obio_ca = { 79 sizeof(struct sbc_softc), sbc_obio_match, sbc_obio_attach 80 }; 81 82 static int 83 sbc_obio_match(parent, cf, args) 84 struct device *parent; 85 struct cfdata *cf; 86 void *args; 87 { 88 switch (current_mac_model->machineid) { 89 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 90 /* 91 if (cf->cf_unit == 0) 92 return 1; 93 */ 94 break; 95 case MACH_MACPB210: 96 case MACH_MACPB230: 97 case MACH_MACPB250: 98 case MACH_MACPB270: 99 case MACH_MACPB280: 100 case MACH_MACPB280C: 101 if (cf->cf_unit == 1) 102 return 1; 103 /*FALLTHROUGH*/ 104 default: 105 if (cf->cf_unit == 0 && mac68k_machine.scsi80) 106 return 1; 107 } 108 return 0; 109 } 110 111 static void 112 sbc_obio_attach(parent, self, args) 113 struct device *parent, *self; 114 void *args; 115 { 116 struct sbc_softc *sc = (struct sbc_softc *) self; 117 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *) sc; 118 char bits[64]; 119 extern vm_offset_t SCSIBase; 120 121 /* Pull in the options flags. */ 122 sc->sc_options = ((ncr_sc->sc_dev.dv_cfdata->cf_flags | sbc_options) 123 & SBC_OPTIONS_MASK); 124 125 /* 126 * Set up offsets to 5380 registers and GLUE I/O space, and turn 127 * off options we know we can't support on certain models. 128 */ 129 switch (current_mac_model->machineid) { 130 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 131 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS_IIFX); 132 sc->sc_drq_addr = (vm_offset_t)(SCSIBase + SBC_HSK_OFS_IIFX); 133 sc->sc_nodrq_addr = (vm_offset_t)(SCSIBase + SBC_DMA_OFS_IIFX); 134 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 135 break; 136 case MACH_MACPB500: 137 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 138 sc->sc_drq_addr = (vm_offset_t)(SCSIBase + SBC_HSK_OFS); /*??*/ 139 sc->sc_nodrq_addr = (vm_offset_t)(SCSIBase + SBC_DMA_OFS_PB500); 140 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 141 break; 142 case MACH_MACPB210: 143 case MACH_MACPB230: 144 case MACH_MACPB250: 145 case MACH_MACPB270: 146 case MACH_MACPB280: 147 case MACH_MACPB280C: 148 if (ncr_sc->sc_dev.dv_unit == 1) { 149 sc->sc_regs = (struct sbc_regs *)(0xfee00000 + SBC_REG_OFS_DUO2); 150 sc->sc_drq_addr = (vm_offset_t)(0xfee00000 + SBC_HSK_OFS_DUO2); 151 sc->sc_nodrq_addr = (vm_offset_t)(0xfee00000 + SBC_DMA_OFS_DUO2); 152 break; 153 } 154 /*FALLTHROUGH*/ 155 default: 156 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 157 sc->sc_drq_addr = (vm_offset_t)(SCSIBase + SBC_HSK_OFS); 158 sc->sc_nodrq_addr = (vm_offset_t)(SCSIBase + SBC_DMA_OFS); 159 break; 160 } 161 162 /* 163 * Fill in the prototype scsi_link. 164 */ 165 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 166 ncr_sc->sc_link.adapter_softc = sc; 167 ncr_sc->sc_link.scsipi_scsi.adapter_target = 7; 168 ncr_sc->sc_link.adapter = &sbc_ops; 169 ncr_sc->sc_link.device = &sbc_dev; 170 ncr_sc->sc_link.type = BUS_SCSI; 171 172 /* 173 * Initialize fields used by the MI code 174 */ 175 ncr_sc->sci_r0 = &sc->sc_regs->sci_pr0.sci_reg; 176 ncr_sc->sci_r1 = &sc->sc_regs->sci_pr1.sci_reg; 177 ncr_sc->sci_r2 = &sc->sc_regs->sci_pr2.sci_reg; 178 ncr_sc->sci_r3 = &sc->sc_regs->sci_pr3.sci_reg; 179 ncr_sc->sci_r4 = &sc->sc_regs->sci_pr4.sci_reg; 180 ncr_sc->sci_r5 = &sc->sc_regs->sci_pr5.sci_reg; 181 ncr_sc->sci_r6 = &sc->sc_regs->sci_pr6.sci_reg; 182 ncr_sc->sci_r7 = &sc->sc_regs->sci_pr7.sci_reg; 183 184 /* 185 * MD function pointers used by the MI code. 186 */ 187 if (sc->sc_options & SBC_PDMA) { 188 ncr_sc->sc_pio_out = sbc_pdma_out; 189 ncr_sc->sc_pio_in = sbc_pdma_in; 190 } else { 191 ncr_sc->sc_pio_out = ncr5380_pio_out; 192 ncr_sc->sc_pio_in = ncr5380_pio_in; 193 } 194 ncr_sc->sc_dma_alloc = NULL; 195 ncr_sc->sc_dma_free = NULL; 196 ncr_sc->sc_dma_poll = NULL; 197 ncr_sc->sc_intr_on = NULL; 198 ncr_sc->sc_intr_off = NULL; 199 ncr_sc->sc_dma_setup = NULL; 200 ncr_sc->sc_dma_start = NULL; 201 ncr_sc->sc_dma_eop = NULL; 202 ncr_sc->sc_dma_stop = NULL; 203 ncr_sc->sc_flags = 0; 204 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 205 206 if (sc->sc_options & SBC_INTR) { 207 ncr_sc->sc_dma_alloc = sbc_dma_alloc; 208 ncr_sc->sc_dma_free = sbc_dma_free; 209 ncr_sc->sc_dma_poll = sbc_dma_poll; 210 ncr_sc->sc_dma_setup = sbc_dma_setup; 211 ncr_sc->sc_dma_start = sbc_dma_start; 212 ncr_sc->sc_dma_eop = sbc_dma_eop; 213 ncr_sc->sc_dma_stop = sbc_dma_stop; 214 via2_register_irq(VIA2_SCSIDRQ, sbc_drq_intr, ncr_sc); 215 } 216 217 via2_register_irq(VIA2_SCSIIRQ, sbc_irq_intr, ncr_sc); 218 sc->sc_clrintr = sbc_obio_clrintr; 219 220 if ((sc->sc_options & SBC_RESELECT) == 0) 221 ncr_sc->sc_no_disconnect = 0xff; 222 223 if (sc->sc_options) 224 printf(": options=%s", bitmask_snprintf(sc->sc_options, 225 SBC_OPTIONS_BITS, bits, sizeof(bits))); 226 printf("\n"); 227 228 if (sc->sc_options & (SBC_INTR|SBC_RESELECT)) { 229 /* Enable SCSI interrupts through VIA2 */ 230 sbc_intr_enable(ncr_sc); 231 } 232 233 #ifdef SBC_DEBUG 234 if (sbc_debug) 235 printf("%s: softc=%p regs=%p\n", ncr_sc->sc_dev.dv_xname, 236 sc, sc->sc_regs); 237 ncr_sc->sc_link.flags |= sbc_link_flags; 238 #endif 239 240 /* 241 * Initialize the SCSI controller itself. 242 */ 243 ncr5380_init(ncr_sc); 244 ncr5380_reset_scsibus(ncr_sc); 245 config_found(self, &(ncr_sc->sc_link), scsiprint); 246 } 247 248 /* 249 * Interrupt support routines. 250 */ 251 void 252 sbc_intr_enable(ncr_sc) 253 struct ncr5380_softc *ncr_sc; 254 { 255 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 256 int s, flags; 257 258 flags = V2IF_SCSIIRQ; 259 if (sc->sc_options & SBC_INTR) 260 flags |= V2IF_SCSIDRQ; 261 262 s = splhigh(); 263 if (VIA2 == VIA2OFF) 264 via2_reg(vIER) = 0x80 | flags; 265 else 266 via2_reg(rIER) = 0x80 | flags; 267 splx(s); 268 } 269 270 void 271 sbc_intr_disable(ncr_sc) 272 struct ncr5380_softc *ncr_sc; 273 { 274 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 275 int s, flags; 276 277 flags = V2IF_SCSIIRQ; 278 if (sc->sc_options & SBC_INTR) 279 flags |= V2IF_SCSIDRQ; 280 281 s = splhigh(); 282 if (VIA2 == VIA2OFF) 283 via2_reg(vIER) = flags; 284 else 285 via2_reg(rIER) = flags; 286 splx(s); 287 } 288 289 void 290 sbc_obio_clrintr(ncr_sc) 291 struct ncr5380_softc *ncr_sc; 292 { 293 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 294 int flags; 295 296 flags = V2IF_SCSIIRQ; 297 if (sc->sc_options & SBC_INTR) 298 flags |= V2IF_SCSIDRQ; 299 300 if (VIA2 == VIA2OFF) 301 via2_reg(vIFR) = 0x80 | flags; 302 else 303 via2_reg(rIFR) = 0x80 | flags; 304 } 305
Indexes created Sun Sep 28 16:09:52 GMT 2025