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if_bm.c revision 1.16.6.2
      1  1.16.6.2  nathanw /*	$NetBSD: if_bm.c,v 1.16.6.2 2002/04/01 07:40:53 nathanw Exp $	*/
      2  1.16.6.2  nathanw 
      3  1.16.6.2  nathanw /*-
      4  1.16.6.2  nathanw  * Copyright (C) 1998, 1999, 2000 Tsubai Masanari.  All rights reserved.
      5  1.16.6.2  nathanw  *
      6  1.16.6.2  nathanw  * Redistribution and use in source and binary forms, with or without
      7  1.16.6.2  nathanw  * modification, are permitted provided that the following conditions
      8  1.16.6.2  nathanw  * are met:
      9  1.16.6.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     10  1.16.6.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     11  1.16.6.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.16.6.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     13  1.16.6.2  nathanw  *    documentation and/or other materials provided with the distribution.
     14  1.16.6.2  nathanw  * 3. The name of the author may not be used to endorse or promote products
     15  1.16.6.2  nathanw  *    derived from this software without specific prior written permission.
     16  1.16.6.2  nathanw  *
     17  1.16.6.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  1.16.6.2  nathanw  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  1.16.6.2  nathanw  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  1.16.6.2  nathanw  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  1.16.6.2  nathanw  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  1.16.6.2  nathanw  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  1.16.6.2  nathanw  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  1.16.6.2  nathanw  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  1.16.6.2  nathanw  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  1.16.6.2  nathanw  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  1.16.6.2  nathanw  */
     28  1.16.6.2  nathanw 
     29  1.16.6.2  nathanw #include "opt_inet.h"
     30  1.16.6.2  nathanw #include "opt_ns.h"
     31  1.16.6.2  nathanw #include "bpfilter.h"
     32  1.16.6.2  nathanw 
     33  1.16.6.2  nathanw #include <sys/param.h>
     34  1.16.6.2  nathanw #include <sys/device.h>
     35  1.16.6.2  nathanw #include <sys/ioctl.h>
     36  1.16.6.2  nathanw #include <sys/kernel.h>
     37  1.16.6.2  nathanw #include <sys/mbuf.h>
     38  1.16.6.2  nathanw #include <sys/socket.h>
     39  1.16.6.2  nathanw #include <sys/systm.h>
     40  1.16.6.2  nathanw #include <sys/callout.h>
     41  1.16.6.2  nathanw 
     42  1.16.6.2  nathanw #include <uvm/uvm_extern.h>
     43  1.16.6.2  nathanw 
     44  1.16.6.2  nathanw #include <net/if.h>
     45  1.16.6.2  nathanw #include <net/if_ether.h>
     46  1.16.6.2  nathanw #include <net/if_media.h>
     47  1.16.6.2  nathanw 
     48  1.16.6.2  nathanw #if NBPFILTER > 0
     49  1.16.6.2  nathanw #include <net/bpf.h>
     50  1.16.6.2  nathanw #endif
     51  1.16.6.2  nathanw 
     52  1.16.6.2  nathanw #ifdef INET
     53  1.16.6.2  nathanw #include <netinet/in.h>
     54  1.16.6.2  nathanw #include <netinet/if_inarp.h>
     55  1.16.6.2  nathanw #endif
     56  1.16.6.2  nathanw 
     57  1.16.6.2  nathanw #include <dev/ofw/openfirm.h>
     58  1.16.6.2  nathanw 
     59  1.16.6.2  nathanw #include <dev/mii/mii.h>
     60  1.16.6.2  nathanw #include <dev/mii/miivar.h>
     61  1.16.6.2  nathanw #include <dev/mii/mii_bitbang.h>
     62  1.16.6.2  nathanw 
     63  1.16.6.2  nathanw #include <machine/autoconf.h>
     64  1.16.6.2  nathanw #include <machine/pio.h>
     65  1.16.6.2  nathanw 
     66  1.16.6.2  nathanw #include <macppc/dev/dbdma.h>
     67  1.16.6.2  nathanw #include <macppc/dev/if_bmreg.h>
     68  1.16.6.2  nathanw 
     69  1.16.6.2  nathanw #define BMAC_TXBUFS 2
     70  1.16.6.2  nathanw #define BMAC_RXBUFS 16
     71  1.16.6.2  nathanw #define BMAC_BUFLEN 2048
     72  1.16.6.2  nathanw 
     73  1.16.6.2  nathanw struct bmac_softc {
     74  1.16.6.2  nathanw 	struct device sc_dev;
     75  1.16.6.2  nathanw 	struct ethercom sc_ethercom;
     76  1.16.6.2  nathanw #define sc_if sc_ethercom.ec_if
     77  1.16.6.2  nathanw 	struct callout sc_tick_ch;
     78  1.16.6.2  nathanw 	vaddr_t sc_regs;
     79  1.16.6.2  nathanw 	dbdma_regmap_t *sc_txdma;
     80  1.16.6.2  nathanw 	dbdma_regmap_t *sc_rxdma;
     81  1.16.6.2  nathanw 	dbdma_command_t *sc_txcmd;
     82  1.16.6.2  nathanw 	dbdma_command_t *sc_rxcmd;
     83  1.16.6.2  nathanw 	caddr_t sc_txbuf;
     84  1.16.6.2  nathanw 	caddr_t sc_rxbuf;
     85  1.16.6.2  nathanw 	int sc_rxlast;
     86  1.16.6.2  nathanw 	int sc_flags;
     87  1.16.6.2  nathanw 	struct mii_data sc_mii;
     88  1.16.6.2  nathanw 	u_char sc_enaddr[6];
     89  1.16.6.2  nathanw };
     90  1.16.6.2  nathanw 
     91  1.16.6.2  nathanw #define BMAC_BMACPLUS	0x01
     92  1.16.6.2  nathanw #define BMAC_DEBUGFLAG	0x02
     93  1.16.6.2  nathanw 
     94  1.16.6.2  nathanw extern u_int *heathrow_FCR;
     95  1.16.6.2  nathanw 
     96  1.16.6.2  nathanw static __inline int bmac_read_reg __P((struct bmac_softc *, int));
     97  1.16.6.2  nathanw static __inline void bmac_write_reg __P((struct bmac_softc *, int, int));
     98  1.16.6.2  nathanw static __inline void bmac_set_bits __P((struct bmac_softc *, int, int));
     99  1.16.6.2  nathanw static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int));
    100  1.16.6.2  nathanw 
    101  1.16.6.2  nathanw int bmac_match __P((struct device *, struct cfdata *, void *));
    102  1.16.6.2  nathanw void bmac_attach __P((struct device *, struct device *, void *));
    103  1.16.6.2  nathanw void bmac_reset_chip __P((struct bmac_softc *));
    104  1.16.6.2  nathanw void bmac_init __P((struct bmac_softc *));
    105  1.16.6.2  nathanw void bmac_init_dma __P((struct bmac_softc *));
    106  1.16.6.2  nathanw int bmac_intr __P((void *));
    107  1.16.6.2  nathanw int bmac_rint __P((void *));
    108  1.16.6.2  nathanw void bmac_reset __P((struct bmac_softc *));
    109  1.16.6.2  nathanw void bmac_stop __P((struct bmac_softc *));
    110  1.16.6.2  nathanw void bmac_start __P((struct ifnet *));
    111  1.16.6.2  nathanw void bmac_transmit_packet __P((struct bmac_softc *, void *, int));
    112  1.16.6.2  nathanw int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *));
    113  1.16.6.2  nathanw struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int));
    114  1.16.6.2  nathanw void bmac_watchdog __P((struct ifnet *));
    115  1.16.6.2  nathanw int bmac_ioctl __P((struct ifnet *, u_long, caddr_t));
    116  1.16.6.2  nathanw int bmac_mediachange __P((struct ifnet *));
    117  1.16.6.2  nathanw void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
    118  1.16.6.2  nathanw void bmac_setladrf __P((struct bmac_softc *));
    119  1.16.6.2  nathanw 
    120  1.16.6.2  nathanw int bmac_mii_readreg __P((struct device *, int, int));
    121  1.16.6.2  nathanw void bmac_mii_writereg __P((struct device *, int, int, int));
    122  1.16.6.2  nathanw void bmac_mii_statchg __P((struct device *));
    123  1.16.6.2  nathanw void bmac_mii_tick __P((void *));
    124  1.16.6.2  nathanw u_int32_t bmac_mbo_read __P((struct device *));
    125  1.16.6.2  nathanw void bmac_mbo_write __P((struct device *, u_int32_t));
    126  1.16.6.2  nathanw 
    127  1.16.6.2  nathanw struct cfattach bm_ca = {
    128  1.16.6.2  nathanw 	sizeof(struct bmac_softc), bmac_match, bmac_attach
    129  1.16.6.2  nathanw };
    130  1.16.6.2  nathanw 
    131  1.16.6.2  nathanw struct mii_bitbang_ops bmac_mbo = {
    132  1.16.6.2  nathanw 	bmac_mbo_read, bmac_mbo_write,
    133  1.16.6.2  nathanw 	{ MIFDO, MIFDI, MIFDC, MIFDIR, 0 }
    134  1.16.6.2  nathanw };
    135  1.16.6.2  nathanw 
    136  1.16.6.2  nathanw int
    137  1.16.6.2  nathanw bmac_read_reg(sc, off)
    138  1.16.6.2  nathanw 	struct bmac_softc *sc;
    139  1.16.6.2  nathanw 	int off;
    140  1.16.6.2  nathanw {
    141  1.16.6.2  nathanw 	return in16rb(sc->sc_regs + off);
    142  1.16.6.2  nathanw }
    143  1.16.6.2  nathanw 
    144  1.16.6.2  nathanw void
    145  1.16.6.2  nathanw bmac_write_reg(sc, off, val)
    146  1.16.6.2  nathanw 	struct bmac_softc *sc;
    147  1.16.6.2  nathanw 	int off, val;
    148  1.16.6.2  nathanw {
    149  1.16.6.2  nathanw 	out16rb(sc->sc_regs + off, val);
    150  1.16.6.2  nathanw }
    151  1.16.6.2  nathanw 
    152  1.16.6.2  nathanw void
    153  1.16.6.2  nathanw bmac_set_bits(sc, off, val)
    154  1.16.6.2  nathanw 	struct bmac_softc *sc;
    155  1.16.6.2  nathanw 	int off, val;
    156  1.16.6.2  nathanw {
    157  1.16.6.2  nathanw 	val |= bmac_read_reg(sc, off);
    158  1.16.6.2  nathanw 	bmac_write_reg(sc, off, val);
    159  1.16.6.2  nathanw }
    160  1.16.6.2  nathanw 
    161  1.16.6.2  nathanw void
    162  1.16.6.2  nathanw bmac_reset_bits(sc, off, val)
    163  1.16.6.2  nathanw 	struct bmac_softc *sc;
    164  1.16.6.2  nathanw 	int off, val;
    165  1.16.6.2  nathanw {
    166  1.16.6.2  nathanw 	bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
    167  1.16.6.2  nathanw }
    168  1.16.6.2  nathanw 
    169  1.16.6.2  nathanw int
    170  1.16.6.2  nathanw bmac_match(parent, cf, aux)
    171  1.16.6.2  nathanw 	struct device *parent;
    172  1.16.6.2  nathanw 	struct cfdata *cf;
    173  1.16.6.2  nathanw 	void *aux;
    174  1.16.6.2  nathanw {
    175  1.16.6.2  nathanw 	struct confargs *ca = aux;
    176  1.16.6.2  nathanw 
    177  1.16.6.2  nathanw 	if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
    178  1.16.6.2  nathanw 		return 0;
    179  1.16.6.2  nathanw 
    180  1.16.6.2  nathanw 	if (strcmp(ca->ca_name, "bmac") == 0)		/* bmac */
    181  1.16.6.2  nathanw 		return 1;
    182  1.16.6.2  nathanw 	if (strcmp(ca->ca_name, "ethernet") == 0)	/* bmac+ */
    183  1.16.6.2  nathanw 		return 1;
    184  1.16.6.2  nathanw 
    185  1.16.6.2  nathanw 	return 0;
    186  1.16.6.2  nathanw }
    187  1.16.6.2  nathanw 
    188  1.16.6.2  nathanw void
    189  1.16.6.2  nathanw bmac_attach(parent, self, aux)
    190  1.16.6.2  nathanw 	struct device *parent, *self;
    191  1.16.6.2  nathanw 	void *aux;
    192  1.16.6.2  nathanw {
    193  1.16.6.2  nathanw 	struct confargs *ca = aux;
    194  1.16.6.2  nathanw 	struct bmac_softc *sc = (void *)self;
    195  1.16.6.2  nathanw 	struct ifnet *ifp = &sc->sc_if;
    196  1.16.6.2  nathanw 	struct mii_data *mii = &sc->sc_mii;
    197  1.16.6.2  nathanw 	u_char laddr[6];
    198  1.16.6.2  nathanw 
    199  1.16.6.2  nathanw 	callout_init(&sc->sc_tick_ch);
    200  1.16.6.2  nathanw 
    201  1.16.6.2  nathanw 	sc->sc_flags =0;
    202  1.16.6.2  nathanw 	if (strcmp(ca->ca_name, "ethernet") == 0) {
    203  1.16.6.2  nathanw 		char name[64];
    204  1.16.6.2  nathanw 
    205  1.16.6.2  nathanw 		memset(name, 0, 64);
    206  1.16.6.2  nathanw 		OF_package_to_path(ca->ca_node, name, sizeof(name));
    207  1.16.6.2  nathanw 		OF_open(name);
    208  1.16.6.2  nathanw 		sc->sc_flags |= BMAC_BMACPLUS;
    209  1.16.6.2  nathanw 	}
    210  1.16.6.2  nathanw 
    211  1.16.6.2  nathanw 	ca->ca_reg[0] += ca->ca_baseaddr;
    212  1.16.6.2  nathanw 	ca->ca_reg[2] += ca->ca_baseaddr;
    213  1.16.6.2  nathanw 	ca->ca_reg[4] += ca->ca_baseaddr;
    214  1.16.6.2  nathanw 
    215  1.16.6.2  nathanw 	sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], NBPG);
    216  1.16.6.2  nathanw 
    217  1.16.6.2  nathanw 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    218  1.16.6.2  nathanw 
    219  1.16.6.2  nathanw 	if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
    220  1.16.6.2  nathanw 	    OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
    221  1.16.6.2  nathanw 		printf(": cannot get mac-address\n");
    222  1.16.6.2  nathanw 		return;
    223  1.16.6.2  nathanw 	}
    224  1.16.6.2  nathanw 	memcpy(sc->sc_enaddr, laddr, 6);
    225  1.16.6.2  nathanw 
    226  1.16.6.2  nathanw 	sc->sc_txdma = mapiodev(ca->ca_reg[2], NBPG);
    227  1.16.6.2  nathanw 	sc->sc_rxdma = mapiodev(ca->ca_reg[4], NBPG);
    228  1.16.6.2  nathanw 	sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
    229  1.16.6.2  nathanw 	sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    230  1.16.6.2  nathanw 	sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
    231  1.16.6.2  nathanw 	sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
    232  1.16.6.2  nathanw 	if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
    233  1.16.6.2  nathanw 	    sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
    234  1.16.6.2  nathanw 		printf("cannot allocate memory\n");
    235  1.16.6.2  nathanw 		return;
    236  1.16.6.2  nathanw 	}
    237  1.16.6.2  nathanw 
    238  1.16.6.2  nathanw 	printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
    239  1.16.6.2  nathanw 		ether_sprintf(laddr));
    240  1.16.6.2  nathanw 
    241  1.16.6.2  nathanw 	intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc);
    242  1.16.6.2  nathanw 	intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc);
    243  1.16.6.2  nathanw 
    244  1.16.6.2  nathanw 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    245  1.16.6.2  nathanw 	ifp->if_softc = sc;
    246  1.16.6.2  nathanw 	ifp->if_ioctl = bmac_ioctl;
    247  1.16.6.2  nathanw 	ifp->if_start = bmac_start;
    248  1.16.6.2  nathanw 	ifp->if_flags =
    249  1.16.6.2  nathanw 		IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    250  1.16.6.2  nathanw 	ifp->if_watchdog = bmac_watchdog;
    251  1.16.6.2  nathanw 	IFQ_SET_READY(&ifp->if_snd);
    252  1.16.6.2  nathanw 
    253  1.16.6.2  nathanw 	mii->mii_ifp = ifp;
    254  1.16.6.2  nathanw 	mii->mii_readreg = bmac_mii_readreg;
    255  1.16.6.2  nathanw 	mii->mii_writereg = bmac_mii_writereg;
    256  1.16.6.2  nathanw 	mii->mii_statchg = bmac_mii_statchg;
    257  1.16.6.2  nathanw 
    258  1.16.6.2  nathanw 	ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
    259  1.16.6.2  nathanw 	mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
    260  1.16.6.2  nathanw 		      MII_OFFSET_ANY, 0);
    261  1.16.6.2  nathanw 
    262  1.16.6.2  nathanw 	/* Choose a default media. */
    263  1.16.6.2  nathanw 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    264  1.16.6.2  nathanw 		ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
    265  1.16.6.2  nathanw 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
    266  1.16.6.2  nathanw 	} else
    267  1.16.6.2  nathanw 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
    268  1.16.6.2  nathanw 
    269  1.16.6.2  nathanw 	bmac_reset_chip(sc);
    270  1.16.6.2  nathanw 
    271  1.16.6.2  nathanw 	if_attach(ifp);
    272  1.16.6.2  nathanw 	ether_ifattach(ifp, sc->sc_enaddr);
    273  1.16.6.2  nathanw }
    274  1.16.6.2  nathanw 
    275  1.16.6.2  nathanw /*
    276  1.16.6.2  nathanw  * Reset and enable bmac by heathrow FCR.
    277  1.16.6.2  nathanw  */
    278  1.16.6.2  nathanw void
    279  1.16.6.2  nathanw bmac_reset_chip(sc)
    280  1.16.6.2  nathanw 	struct bmac_softc *sc;
    281  1.16.6.2  nathanw {
    282  1.16.6.2  nathanw 	u_int v;
    283  1.16.6.2  nathanw 
    284  1.16.6.2  nathanw 	dbdma_reset(sc->sc_txdma);
    285  1.16.6.2  nathanw 	dbdma_reset(sc->sc_rxdma);
    286  1.16.6.2  nathanw 
    287  1.16.6.2  nathanw 	v = in32rb(heathrow_FCR);
    288  1.16.6.2  nathanw 
    289  1.16.6.2  nathanw 	v |= EnetEnable;
    290  1.16.6.2  nathanw 	out32rb(heathrow_FCR, v);
    291  1.16.6.2  nathanw 	delay(50000);
    292  1.16.6.2  nathanw 
    293  1.16.6.2  nathanw 	v |= ResetEnetCell;
    294  1.16.6.2  nathanw 	out32rb(heathrow_FCR, v);
    295  1.16.6.2  nathanw 	delay(50000);
    296  1.16.6.2  nathanw 
    297  1.16.6.2  nathanw 	v &= ~ResetEnetCell;
    298  1.16.6.2  nathanw 	out32rb(heathrow_FCR, v);
    299  1.16.6.2  nathanw 	delay(50000);
    300  1.16.6.2  nathanw 
    301  1.16.6.2  nathanw 	out32rb(heathrow_FCR, v);
    302  1.16.6.2  nathanw }
    303  1.16.6.2  nathanw 
    304  1.16.6.2  nathanw void
    305  1.16.6.2  nathanw bmac_init(sc)
    306  1.16.6.2  nathanw 	struct bmac_softc *sc;
    307  1.16.6.2  nathanw {
    308  1.16.6.2  nathanw 	struct ifnet *ifp = &sc->sc_if;
    309  1.16.6.2  nathanw 	struct ether_header *eh;
    310  1.16.6.2  nathanw 	caddr_t data;
    311  1.16.6.2  nathanw 	int i, tb, bmcr;
    312  1.16.6.2  nathanw 	u_short *p;
    313  1.16.6.2  nathanw 
    314  1.16.6.2  nathanw 	bmac_reset_chip(sc);
    315  1.16.6.2  nathanw 
    316  1.16.6.2  nathanw 	/* XXX */
    317  1.16.6.2  nathanw 	bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
    318  1.16.6.2  nathanw 	bmcr &= ~BMCR_ISO;
    319  1.16.6.2  nathanw 	bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
    320  1.16.6.2  nathanw 
    321  1.16.6.2  nathanw 	bmac_write_reg(sc, RXRST, RxResetValue);
    322  1.16.6.2  nathanw 	bmac_write_reg(sc, TXRST, TxResetBit);
    323  1.16.6.2  nathanw 
    324  1.16.6.2  nathanw 	/* Wait for reset completion. */
    325  1.16.6.2  nathanw 	for (i = 1000; i > 0; i -= 10) {
    326  1.16.6.2  nathanw 		if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
    327  1.16.6.2  nathanw 			break;
    328  1.16.6.2  nathanw 		delay(10);
    329  1.16.6.2  nathanw 	}
    330  1.16.6.2  nathanw 	if (i <= 0)
    331  1.16.6.2  nathanw 		printf("%s: reset timeout\n", ifp->if_xname);
    332  1.16.6.2  nathanw 
    333  1.16.6.2  nathanw 	if (! (sc->sc_flags & BMAC_BMACPLUS))
    334  1.16.6.2  nathanw 		bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
    335  1.16.6.2  nathanw 
    336  1.16.6.2  nathanw 	__asm __volatile ("mftb %0" : "=r"(tb));
    337  1.16.6.2  nathanw 	bmac_write_reg(sc, RSEED, tb);
    338  1.16.6.2  nathanw 	bmac_set_bits(sc, XIFC, TxOutputEnable);
    339  1.16.6.2  nathanw 	bmac_read_reg(sc, PAREG);
    340  1.16.6.2  nathanw 
    341  1.16.6.2  nathanw 	/* Reset various counters. */
    342  1.16.6.2  nathanw 	bmac_write_reg(sc, NCCNT, 0);
    343  1.16.6.2  nathanw 	bmac_write_reg(sc, NTCNT, 0);
    344  1.16.6.2  nathanw 	bmac_write_reg(sc, EXCNT, 0);
    345  1.16.6.2  nathanw 	bmac_write_reg(sc, LTCNT, 0);
    346  1.16.6.2  nathanw 	bmac_write_reg(sc, FRCNT, 0);
    347  1.16.6.2  nathanw 	bmac_write_reg(sc, LECNT, 0);
    348  1.16.6.2  nathanw 	bmac_write_reg(sc, AECNT, 0);
    349  1.16.6.2  nathanw 	bmac_write_reg(sc, FECNT, 0);
    350  1.16.6.2  nathanw 	bmac_write_reg(sc, RXCV, 0);
    351  1.16.6.2  nathanw 
    352  1.16.6.2  nathanw 	/* Set tx fifo information. */
    353  1.16.6.2  nathanw 	bmac_write_reg(sc, TXTH, 4);	/* 4 octets before tx starts */
    354  1.16.6.2  nathanw 
    355  1.16.6.2  nathanw 	bmac_write_reg(sc, TXFIFOCSR, 0);
    356  1.16.6.2  nathanw 	bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
    357  1.16.6.2  nathanw 
    358  1.16.6.2  nathanw 	/* Set rx fifo information. */
    359  1.16.6.2  nathanw 	bmac_write_reg(sc, RXFIFOCSR, 0);
    360  1.16.6.2  nathanw 	bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
    361  1.16.6.2  nathanw 
    362  1.16.6.2  nathanw 	/* Clear status register. */
    363  1.16.6.2  nathanw 	bmac_read_reg(sc, STATUS);
    364  1.16.6.2  nathanw 
    365  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH3, 0);
    366  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH2, 0);
    367  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH1, 0);
    368  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH0, 0);
    369  1.16.6.2  nathanw 
    370  1.16.6.2  nathanw 	/* Set MAC address. */
    371  1.16.6.2  nathanw 	p = (u_short *)sc->sc_enaddr;
    372  1.16.6.2  nathanw 	bmac_write_reg(sc, MADD0, *p++);
    373  1.16.6.2  nathanw 	bmac_write_reg(sc, MADD1, *p++);
    374  1.16.6.2  nathanw 	bmac_write_reg(sc, MADD2, *p);
    375  1.16.6.2  nathanw 
    376  1.16.6.2  nathanw 	bmac_write_reg(sc, RXCFG,
    377  1.16.6.2  nathanw 		RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
    378  1.16.6.2  nathanw 
    379  1.16.6.2  nathanw 	if (ifp->if_flags & IFF_PROMISC)
    380  1.16.6.2  nathanw 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    381  1.16.6.2  nathanw 
    382  1.16.6.2  nathanw 	bmac_init_dma(sc);
    383  1.16.6.2  nathanw 
    384  1.16.6.2  nathanw 	/* Enable TX/RX */
    385  1.16.6.2  nathanw 	bmac_set_bits(sc, RXCFG, RxMACEnable);
    386  1.16.6.2  nathanw 	bmac_set_bits(sc, TXCFG, TxMACEnable);
    387  1.16.6.2  nathanw 
    388  1.16.6.2  nathanw 	bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
    389  1.16.6.2  nathanw 
    390  1.16.6.2  nathanw 	ifp->if_flags |= IFF_RUNNING;
    391  1.16.6.2  nathanw 	ifp->if_flags &= ~IFF_OACTIVE;
    392  1.16.6.2  nathanw 	ifp->if_timer = 0;
    393  1.16.6.2  nathanw 
    394  1.16.6.2  nathanw 	data = sc->sc_txbuf;
    395  1.16.6.2  nathanw 	eh = (struct ether_header *)data;
    396  1.16.6.2  nathanw 
    397  1.16.6.2  nathanw 	memset(data, 0, sizeof(eh) + ETHERMIN);
    398  1.16.6.2  nathanw 	memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN);
    399  1.16.6.2  nathanw 	memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN);
    400  1.16.6.2  nathanw 	bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN);
    401  1.16.6.2  nathanw 
    402  1.16.6.2  nathanw 	bmac_start(ifp);
    403  1.16.6.2  nathanw 
    404  1.16.6.2  nathanw 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    405  1.16.6.2  nathanw }
    406  1.16.6.2  nathanw 
    407  1.16.6.2  nathanw void
    408  1.16.6.2  nathanw bmac_init_dma(sc)
    409  1.16.6.2  nathanw 	struct bmac_softc *sc;
    410  1.16.6.2  nathanw {
    411  1.16.6.2  nathanw 	dbdma_command_t *cmd = sc->sc_rxcmd;
    412  1.16.6.2  nathanw 	int i;
    413  1.16.6.2  nathanw 
    414  1.16.6.2  nathanw 	dbdma_reset(sc->sc_txdma);
    415  1.16.6.2  nathanw 	dbdma_reset(sc->sc_rxdma);
    416  1.16.6.2  nathanw 
    417  1.16.6.2  nathanw 	memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t));
    418  1.16.6.2  nathanw 	memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    419  1.16.6.2  nathanw 
    420  1.16.6.2  nathanw 	for (i = 0; i < BMAC_RXBUFS; i++) {
    421  1.16.6.2  nathanw 		DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
    422  1.16.6.2  nathanw 			vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i),
    423  1.16.6.2  nathanw 			DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    424  1.16.6.2  nathanw 		cmd++;
    425  1.16.6.2  nathanw 	}
    426  1.16.6.2  nathanw 	DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
    427  1.16.6.2  nathanw 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
    428  1.16.6.2  nathanw 	dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd));
    429  1.16.6.2  nathanw 
    430  1.16.6.2  nathanw 	sc->sc_rxlast = 0;
    431  1.16.6.2  nathanw 
    432  1.16.6.2  nathanw 	dbdma_start(sc->sc_rxdma, sc->sc_rxcmd);
    433  1.16.6.2  nathanw }
    434  1.16.6.2  nathanw 
    435  1.16.6.2  nathanw int
    436  1.16.6.2  nathanw bmac_intr(v)
    437  1.16.6.2  nathanw 	void *v;
    438  1.16.6.2  nathanw {
    439  1.16.6.2  nathanw 	struct bmac_softc *sc = v;
    440  1.16.6.2  nathanw 	int stat;
    441  1.16.6.2  nathanw 
    442  1.16.6.2  nathanw 	stat = bmac_read_reg(sc, STATUS);
    443  1.16.6.2  nathanw 	if (stat == 0)
    444  1.16.6.2  nathanw 		return 0;
    445  1.16.6.2  nathanw 
    446  1.16.6.2  nathanw #ifdef BMAC_DEBUG
    447  1.16.6.2  nathanw 	printf("bmac_intr status = 0x%x\n", stat);
    448  1.16.6.2  nathanw #endif
    449  1.16.6.2  nathanw 
    450  1.16.6.2  nathanw 	if (stat & IntFrameSent) {
    451  1.16.6.2  nathanw 		sc->sc_if.if_flags &= ~IFF_OACTIVE;
    452  1.16.6.2  nathanw 		sc->sc_if.if_timer = 0;
    453  1.16.6.2  nathanw 		sc->sc_if.if_opackets++;
    454  1.16.6.2  nathanw 		bmac_start(&sc->sc_if);
    455  1.16.6.2  nathanw 	}
    456  1.16.6.2  nathanw 
    457  1.16.6.2  nathanw 	/* XXX should do more! */
    458  1.16.6.2  nathanw 
    459  1.16.6.2  nathanw 	return 1;
    460  1.16.6.2  nathanw }
    461  1.16.6.2  nathanw 
    462  1.16.6.2  nathanw int
    463  1.16.6.2  nathanw bmac_rint(v)
    464  1.16.6.2  nathanw 	void *v;
    465  1.16.6.2  nathanw {
    466  1.16.6.2  nathanw 	struct bmac_softc *sc = v;
    467  1.16.6.2  nathanw 	struct ifnet *ifp = &sc->sc_if;
    468  1.16.6.2  nathanw 	struct mbuf *m;
    469  1.16.6.2  nathanw 	dbdma_command_t *cmd;
    470  1.16.6.2  nathanw 	int status, resid, count, datalen;
    471  1.16.6.2  nathanw 	int i, n;
    472  1.16.6.2  nathanw 	void *data;
    473  1.16.6.2  nathanw 
    474  1.16.6.2  nathanw 	i = sc->sc_rxlast;
    475  1.16.6.2  nathanw 	for (n = 0; n < BMAC_RXBUFS; n++, i++) {
    476  1.16.6.2  nathanw 		if (i == BMAC_RXBUFS)
    477  1.16.6.2  nathanw 			i = 0;
    478  1.16.6.2  nathanw 		cmd = &sc->sc_rxcmd[i];
    479  1.16.6.2  nathanw 		status = dbdma_ld16(&cmd->d_status);
    480  1.16.6.2  nathanw 		resid = dbdma_ld16(&cmd->d_resid);
    481  1.16.6.2  nathanw 
    482  1.16.6.2  nathanw #ifdef BMAC_DEBUG
    483  1.16.6.2  nathanw 		if (status != 0 && status != 0x8440 && status != 0x9440)
    484  1.16.6.2  nathanw 			printf("bmac_rint status = 0x%x\n", status);
    485  1.16.6.2  nathanw #endif
    486  1.16.6.2  nathanw 
    487  1.16.6.2  nathanw 		if ((status & DBDMA_CNTRL_ACTIVE) == 0)	/* 0x9440 | 0x8440 */
    488  1.16.6.2  nathanw 			continue;
    489  1.16.6.2  nathanw 		count = dbdma_ld16(&cmd->d_count);
    490  1.16.6.2  nathanw 		datalen = count - resid - 2;		/* 2 == framelen */
    491  1.16.6.2  nathanw 		if (datalen < sizeof(struct ether_header)) {
    492  1.16.6.2  nathanw 			printf("%s: short packet len = %d\n",
    493  1.16.6.2  nathanw 				ifp->if_xname, datalen);
    494  1.16.6.2  nathanw 			goto next;
    495  1.16.6.2  nathanw 		}
    496  1.16.6.2  nathanw 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
    497  1.16.6.2  nathanw 		data = sc->sc_rxbuf + BMAC_BUFLEN * i;
    498  1.16.6.2  nathanw 
    499  1.16.6.2  nathanw 		/* XXX Sometimes bmac reads one extra byte. */
    500  1.16.6.2  nathanw 		if (datalen == ETHER_MAX_LEN + 1)
    501  1.16.6.2  nathanw 			datalen--;
    502  1.16.6.2  nathanw 		m = bmac_get(sc, data, datalen);
    503  1.16.6.2  nathanw 
    504  1.16.6.2  nathanw 		if (m == NULL) {
    505  1.16.6.2  nathanw 			ifp->if_ierrors++;
    506  1.16.6.2  nathanw 			goto next;
    507  1.16.6.2  nathanw 		}
    508  1.16.6.2  nathanw 
    509  1.16.6.2  nathanw #if NBPFILTER > 0
    510  1.16.6.2  nathanw 		/*
    511  1.16.6.2  nathanw 		 * Check if there's a BPF listener on this interface.
    512  1.16.6.2  nathanw 		 * If so, hand off the raw packet to BPF.
    513  1.16.6.2  nathanw 		 */
    514  1.16.6.2  nathanw 		if (ifp->if_bpf)
    515  1.16.6.2  nathanw 			bpf_mtap(ifp->if_bpf, m);
    516  1.16.6.2  nathanw #endif
    517  1.16.6.2  nathanw 		(*ifp->if_input)(ifp, m);
    518  1.16.6.2  nathanw 		ifp->if_ipackets++;
    519  1.16.6.2  nathanw 
    520  1.16.6.2  nathanw next:
    521  1.16.6.2  nathanw 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
    522  1.16.6.2  nathanw 			DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    523  1.16.6.2  nathanw 
    524  1.16.6.2  nathanw 		cmd->d_status = 0;
    525  1.16.6.2  nathanw 		cmd->d_resid = 0;
    526  1.16.6.2  nathanw 		sc->sc_rxlast = i + 1;
    527  1.16.6.2  nathanw 	}
    528  1.16.6.2  nathanw 	dbdma_continue(sc->sc_rxdma);
    529  1.16.6.2  nathanw 
    530  1.16.6.2  nathanw 	return 1;
    531  1.16.6.2  nathanw }
    532  1.16.6.2  nathanw 
    533  1.16.6.2  nathanw void
    534  1.16.6.2  nathanw bmac_reset(sc)
    535  1.16.6.2  nathanw 	struct bmac_softc *sc;
    536  1.16.6.2  nathanw {
    537  1.16.6.2  nathanw 	int s;
    538  1.16.6.2  nathanw 
    539  1.16.6.2  nathanw 	s = splnet();
    540  1.16.6.2  nathanw 	bmac_init(sc);
    541  1.16.6.2  nathanw 	splx(s);
    542  1.16.6.2  nathanw }
    543  1.16.6.2  nathanw 
    544  1.16.6.2  nathanw void
    545  1.16.6.2  nathanw bmac_stop(sc)
    546  1.16.6.2  nathanw 	struct bmac_softc *sc;
    547  1.16.6.2  nathanw {
    548  1.16.6.2  nathanw 	struct ifnet *ifp = &sc->sc_if;
    549  1.16.6.2  nathanw 	int s;
    550  1.16.6.2  nathanw 
    551  1.16.6.2  nathanw 	s = splnet();
    552  1.16.6.2  nathanw 
    553  1.16.6.2  nathanw 	callout_stop(&sc->sc_tick_ch);
    554  1.16.6.2  nathanw 	mii_down(&sc->sc_mii);
    555  1.16.6.2  nathanw 
    556  1.16.6.2  nathanw 	/* Disable TX/RX. */
    557  1.16.6.2  nathanw 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    558  1.16.6.2  nathanw 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    559  1.16.6.2  nathanw 
    560  1.16.6.2  nathanw 	/* Disable all interrupts. */
    561  1.16.6.2  nathanw 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    562  1.16.6.2  nathanw 
    563  1.16.6.2  nathanw 	dbdma_stop(sc->sc_txdma);
    564  1.16.6.2  nathanw 	dbdma_stop(sc->sc_rxdma);
    565  1.16.6.2  nathanw 
    566  1.16.6.2  nathanw 	ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
    567  1.16.6.2  nathanw 	ifp->if_timer = 0;
    568  1.16.6.2  nathanw 
    569  1.16.6.2  nathanw 	splx(s);
    570  1.16.6.2  nathanw }
    571  1.16.6.2  nathanw 
    572  1.16.6.2  nathanw void
    573  1.16.6.2  nathanw bmac_start(ifp)
    574  1.16.6.2  nathanw 	struct ifnet *ifp;
    575  1.16.6.2  nathanw {
    576  1.16.6.2  nathanw 	struct bmac_softc *sc = ifp->if_softc;
    577  1.16.6.2  nathanw 	struct mbuf *m;
    578  1.16.6.2  nathanw 	int tlen;
    579  1.16.6.2  nathanw 
    580  1.16.6.2  nathanw 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
    581  1.16.6.2  nathanw 		return;
    582  1.16.6.2  nathanw 
    583  1.16.6.2  nathanw 	while (1) {
    584  1.16.6.2  nathanw 		if (ifp->if_flags & IFF_OACTIVE)
    585  1.16.6.2  nathanw 			return;
    586  1.16.6.2  nathanw 
    587  1.16.6.2  nathanw 		IFQ_DEQUEUE(&ifp->if_snd, m);
    588  1.16.6.2  nathanw 		if (m == 0)
    589  1.16.6.2  nathanw 			break;
    590  1.16.6.2  nathanw #if NBPFILTER > 0
    591  1.16.6.2  nathanw 		/*
    592  1.16.6.2  nathanw 		 * If BPF is listening on this interface, let it see the
    593  1.16.6.2  nathanw 		 * packet before we commit it to the wire.
    594  1.16.6.2  nathanw 		 */
    595  1.16.6.2  nathanw 		if (ifp->if_bpf)
    596  1.16.6.2  nathanw 			bpf_mtap(ifp->if_bpf, m);
    597  1.16.6.2  nathanw #endif
    598  1.16.6.2  nathanw 
    599  1.16.6.2  nathanw 		ifp->if_flags |= IFF_OACTIVE;
    600  1.16.6.2  nathanw 		tlen = bmac_put(sc, sc->sc_txbuf, m);
    601  1.16.6.2  nathanw 
    602  1.16.6.2  nathanw 		/* 5 seconds to watch for failing to transmit */
    603  1.16.6.2  nathanw 		ifp->if_timer = 5;
    604  1.16.6.2  nathanw 		ifp->if_opackets++;		/* # of pkts */
    605  1.16.6.2  nathanw 
    606  1.16.6.2  nathanw 		bmac_transmit_packet(sc, sc->sc_txbuf, tlen);
    607  1.16.6.2  nathanw 	}
    608  1.16.6.2  nathanw }
    609  1.16.6.2  nathanw 
    610  1.16.6.2  nathanw void
    611  1.16.6.2  nathanw bmac_transmit_packet(sc, buff, len)
    612  1.16.6.2  nathanw 	struct bmac_softc *sc;
    613  1.16.6.2  nathanw 	void *buff;
    614  1.16.6.2  nathanw 	int len;
    615  1.16.6.2  nathanw {
    616  1.16.6.2  nathanw 	dbdma_command_t *cmd = sc->sc_txcmd;
    617  1.16.6.2  nathanw 	vaddr_t va = (vaddr_t)buff;
    618  1.16.6.2  nathanw 
    619  1.16.6.2  nathanw #ifdef BMAC_DEBUG
    620  1.16.6.2  nathanw 	if (vtophys(va) + len - 1 != vtophys(va + len - 1))
    621  1.16.6.2  nathanw 		panic("bmac_transmit_packet");
    622  1.16.6.2  nathanw #endif
    623  1.16.6.2  nathanw 
    624  1.16.6.2  nathanw 	DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
    625  1.16.6.2  nathanw 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    626  1.16.6.2  nathanw 	cmd++;
    627  1.16.6.2  nathanw 	DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
    628  1.16.6.2  nathanw 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    629  1.16.6.2  nathanw 
    630  1.16.6.2  nathanw 	dbdma_start(sc->sc_txdma, sc->sc_txcmd);
    631  1.16.6.2  nathanw }
    632  1.16.6.2  nathanw 
    633  1.16.6.2  nathanw int
    634  1.16.6.2  nathanw bmac_put(sc, buff, m)
    635  1.16.6.2  nathanw 	struct bmac_softc *sc;
    636  1.16.6.2  nathanw 	caddr_t buff;
    637  1.16.6.2  nathanw 	struct mbuf *m;
    638  1.16.6.2  nathanw {
    639  1.16.6.2  nathanw 	struct mbuf *n;
    640  1.16.6.2  nathanw 	int len, tlen = 0;
    641  1.16.6.2  nathanw 
    642  1.16.6.2  nathanw 	for (; m; m = n) {
    643  1.16.6.2  nathanw 		len = m->m_len;
    644  1.16.6.2  nathanw 		if (len == 0) {
    645  1.16.6.2  nathanw 			MFREE(m, n);
    646  1.16.6.2  nathanw 			continue;
    647  1.16.6.2  nathanw 		}
    648  1.16.6.2  nathanw 		memcpy(buff, mtod(m, caddr_t), len);
    649  1.16.6.2  nathanw 		buff += len;
    650  1.16.6.2  nathanw 		tlen += len;
    651  1.16.6.2  nathanw 		MFREE(m, n);
    652  1.16.6.2  nathanw 	}
    653  1.16.6.2  nathanw 	if (tlen > NBPG)
    654  1.16.6.2  nathanw 		panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
    655  1.16.6.2  nathanw 
    656  1.16.6.2  nathanw 	return tlen;
    657  1.16.6.2  nathanw }
    658  1.16.6.2  nathanw 
    659  1.16.6.2  nathanw struct mbuf *
    660  1.16.6.2  nathanw bmac_get(sc, pkt, totlen)
    661  1.16.6.2  nathanw 	struct bmac_softc *sc;
    662  1.16.6.2  nathanw 	caddr_t pkt;
    663  1.16.6.2  nathanw 	int totlen;
    664  1.16.6.2  nathanw {
    665  1.16.6.2  nathanw 	struct mbuf *m;
    666  1.16.6.2  nathanw 	struct mbuf *top, **mp;
    667  1.16.6.2  nathanw 	int len;
    668  1.16.6.2  nathanw 
    669  1.16.6.2  nathanw 	MGETHDR(m, M_DONTWAIT, MT_DATA);
    670  1.16.6.2  nathanw 	if (m == 0)
    671  1.16.6.2  nathanw 		return 0;
    672  1.16.6.2  nathanw 	m->m_flags |= M_HASFCS;
    673  1.16.6.2  nathanw 	m->m_pkthdr.rcvif = &sc->sc_if;
    674  1.16.6.2  nathanw 	m->m_pkthdr.len = totlen;
    675  1.16.6.2  nathanw 	len = MHLEN;
    676  1.16.6.2  nathanw 	top = 0;
    677  1.16.6.2  nathanw 	mp = &top;
    678  1.16.6.2  nathanw 
    679  1.16.6.2  nathanw 	while (totlen > 0) {
    680  1.16.6.2  nathanw 		if (top) {
    681  1.16.6.2  nathanw 			MGET(m, M_DONTWAIT, MT_DATA);
    682  1.16.6.2  nathanw 			if (m == 0) {
    683  1.16.6.2  nathanw 				m_freem(top);
    684  1.16.6.2  nathanw 				return 0;
    685  1.16.6.2  nathanw 			}
    686  1.16.6.2  nathanw 			len = MLEN;
    687  1.16.6.2  nathanw 		}
    688  1.16.6.2  nathanw 		if (totlen >= MINCLSIZE) {
    689  1.16.6.2  nathanw 			MCLGET(m, M_DONTWAIT);
    690  1.16.6.2  nathanw 			if ((m->m_flags & M_EXT) == 0) {
    691  1.16.6.2  nathanw 				m_free(m);
    692  1.16.6.2  nathanw 				m_freem(top);
    693  1.16.6.2  nathanw 				return 0;
    694  1.16.6.2  nathanw 			}
    695  1.16.6.2  nathanw 			len = MCLBYTES;
    696  1.16.6.2  nathanw 		}
    697  1.16.6.2  nathanw 		m->m_len = len = min(totlen, len);
    698  1.16.6.2  nathanw 		memcpy(mtod(m, caddr_t), pkt, len);
    699  1.16.6.2  nathanw 		pkt += len;
    700  1.16.6.2  nathanw 		totlen -= len;
    701  1.16.6.2  nathanw 		*mp = m;
    702  1.16.6.2  nathanw 		mp = &m->m_next;
    703  1.16.6.2  nathanw 	}
    704  1.16.6.2  nathanw 
    705  1.16.6.2  nathanw 	return top;
    706  1.16.6.2  nathanw }
    707  1.16.6.2  nathanw 
    708  1.16.6.2  nathanw void
    709  1.16.6.2  nathanw bmac_watchdog(ifp)
    710  1.16.6.2  nathanw 	struct ifnet *ifp;
    711  1.16.6.2  nathanw {
    712  1.16.6.2  nathanw 	struct bmac_softc *sc = ifp->if_softc;
    713  1.16.6.2  nathanw 
    714  1.16.6.2  nathanw 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    715  1.16.6.2  nathanw 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    716  1.16.6.2  nathanw 
    717  1.16.6.2  nathanw 	printf("%s: device timeout\n", ifp->if_xname);
    718  1.16.6.2  nathanw 	ifp->if_oerrors++;
    719  1.16.6.2  nathanw 
    720  1.16.6.2  nathanw 	bmac_reset(sc);
    721  1.16.6.2  nathanw }
    722  1.16.6.2  nathanw 
    723  1.16.6.2  nathanw int
    724  1.16.6.2  nathanw bmac_ioctl(ifp, cmd, data)
    725  1.16.6.2  nathanw 	struct ifnet *ifp;
    726  1.16.6.2  nathanw 	u_long cmd;
    727  1.16.6.2  nathanw 	caddr_t data;
    728  1.16.6.2  nathanw {
    729  1.16.6.2  nathanw 	struct bmac_softc *sc = ifp->if_softc;
    730  1.16.6.2  nathanw 	struct ifaddr *ifa = (struct ifaddr *)data;
    731  1.16.6.2  nathanw 	struct ifreq *ifr = (struct ifreq *)data;
    732  1.16.6.2  nathanw 	int s, error = 0;
    733  1.16.6.2  nathanw 
    734  1.16.6.2  nathanw 	s = splnet();
    735  1.16.6.2  nathanw 
    736  1.16.6.2  nathanw 	switch (cmd) {
    737  1.16.6.2  nathanw 
    738  1.16.6.2  nathanw 	case SIOCSIFADDR:
    739  1.16.6.2  nathanw 		ifp->if_flags |= IFF_UP;
    740  1.16.6.2  nathanw 
    741  1.16.6.2  nathanw 		switch (ifa->ifa_addr->sa_family) {
    742  1.16.6.2  nathanw #ifdef INET
    743  1.16.6.2  nathanw 		case AF_INET:
    744  1.16.6.2  nathanw 			bmac_init(sc);
    745  1.16.6.2  nathanw 			arp_ifinit(ifp, ifa);
    746  1.16.6.2  nathanw 			break;
    747  1.16.6.2  nathanw #endif
    748  1.16.6.2  nathanw #ifdef NS
    749  1.16.6.2  nathanw 		case AF_NS:
    750  1.16.6.2  nathanw 		    {
    751  1.16.6.2  nathanw 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
    752  1.16.6.2  nathanw 
    753  1.16.6.2  nathanw 			if (ns_nullhost(*ina))
    754  1.16.6.2  nathanw 				ina->x_host =
    755  1.16.6.2  nathanw 				    *(union ns_host *)LLADDR(ifp->if_sadl);
    756  1.16.6.2  nathanw 			else {
    757  1.16.6.2  nathanw 				memcpy(LLADDR(ifp->if_sadl),
    758  1.16.6.2  nathanw 				    ina->x_host.c_host,
    759  1.16.6.2  nathanw 				    sizeof(sc->sc_enaddr));
    760  1.16.6.2  nathanw 			}
    761  1.16.6.2  nathanw 			/* Set new address. */
    762  1.16.6.2  nathanw 			bmac_init(sc);
    763  1.16.6.2  nathanw 			break;
    764  1.16.6.2  nathanw 		    }
    765  1.16.6.2  nathanw #endif
    766  1.16.6.2  nathanw 		default:
    767  1.16.6.2  nathanw 			bmac_init(sc);
    768  1.16.6.2  nathanw 			break;
    769  1.16.6.2  nathanw 		}
    770  1.16.6.2  nathanw 		break;
    771  1.16.6.2  nathanw 
    772  1.16.6.2  nathanw 	case SIOCSIFFLAGS:
    773  1.16.6.2  nathanw 		if ((ifp->if_flags & IFF_UP) == 0 &&
    774  1.16.6.2  nathanw 		    (ifp->if_flags & IFF_RUNNING) != 0) {
    775  1.16.6.2  nathanw 			/*
    776  1.16.6.2  nathanw 			 * If interface is marked down and it is running, then
    777  1.16.6.2  nathanw 			 * stop it.
    778  1.16.6.2  nathanw 			 */
    779  1.16.6.2  nathanw 			bmac_stop(sc);
    780  1.16.6.2  nathanw 			ifp->if_flags &= ~IFF_RUNNING;
    781  1.16.6.2  nathanw 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
    782  1.16.6.2  nathanw 		    (ifp->if_flags & IFF_RUNNING) == 0) {
    783  1.16.6.2  nathanw 			/*
    784  1.16.6.2  nathanw 			 * If interface is marked up and it is stopped, then
    785  1.16.6.2  nathanw 			 * start it.
    786  1.16.6.2  nathanw 			 */
    787  1.16.6.2  nathanw 			bmac_init(sc);
    788  1.16.6.2  nathanw 		} else {
    789  1.16.6.2  nathanw 			/*
    790  1.16.6.2  nathanw 			 * Reset the interface to pick up changes in any other
    791  1.16.6.2  nathanw 			 * flags that affect hardware registers.
    792  1.16.6.2  nathanw 			 */
    793  1.16.6.2  nathanw 			/*bmac_stop(sc);*/
    794  1.16.6.2  nathanw 			bmac_init(sc);
    795  1.16.6.2  nathanw 		}
    796  1.16.6.2  nathanw #ifdef BMAC_DEBUG
    797  1.16.6.2  nathanw 		if (ifp->if_flags & IFF_DEBUG)
    798  1.16.6.2  nathanw 			sc->sc_flags |= BMAC_DEBUGFLAG;
    799  1.16.6.2  nathanw #endif
    800  1.16.6.2  nathanw 		break;
    801  1.16.6.2  nathanw 
    802  1.16.6.2  nathanw 	case SIOCADDMULTI:
    803  1.16.6.2  nathanw 	case SIOCDELMULTI:
    804  1.16.6.2  nathanw 		error = (cmd == SIOCADDMULTI) ?
    805  1.16.6.2  nathanw 		    ether_addmulti(ifr, &sc->sc_ethercom) :
    806  1.16.6.2  nathanw 		    ether_delmulti(ifr, &sc->sc_ethercom);
    807  1.16.6.2  nathanw 
    808  1.16.6.2  nathanw 		if (error == ENETRESET) {
    809  1.16.6.2  nathanw 			/*
    810  1.16.6.2  nathanw 			 * Multicast list has changed; set the hardware filter
    811  1.16.6.2  nathanw 			 * accordingly.
    812  1.16.6.2  nathanw 			 */
    813  1.16.6.2  nathanw 			bmac_init(sc);
    814  1.16.6.2  nathanw 			bmac_setladrf(sc);
    815  1.16.6.2  nathanw 			error = 0;
    816  1.16.6.2  nathanw 		}
    817  1.16.6.2  nathanw 		break;
    818  1.16.6.2  nathanw 
    819  1.16.6.2  nathanw 	case SIOCGIFMEDIA:
    820  1.16.6.2  nathanw 	case SIOCSIFMEDIA:
    821  1.16.6.2  nathanw 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
    822  1.16.6.2  nathanw 		break;
    823  1.16.6.2  nathanw 
    824  1.16.6.2  nathanw 	default:
    825  1.16.6.2  nathanw 		error = EINVAL;
    826  1.16.6.2  nathanw 	}
    827  1.16.6.2  nathanw 
    828  1.16.6.2  nathanw 	splx(s);
    829  1.16.6.2  nathanw 	return error;
    830  1.16.6.2  nathanw }
    831  1.16.6.2  nathanw 
    832  1.16.6.2  nathanw int
    833  1.16.6.2  nathanw bmac_mediachange(ifp)
    834  1.16.6.2  nathanw 	struct ifnet *ifp;
    835  1.16.6.2  nathanw {
    836  1.16.6.2  nathanw 	struct bmac_softc *sc = ifp->if_softc;
    837  1.16.6.2  nathanw 
    838  1.16.6.2  nathanw 	return mii_mediachg(&sc->sc_mii);
    839  1.16.6.2  nathanw }
    840  1.16.6.2  nathanw 
    841  1.16.6.2  nathanw void
    842  1.16.6.2  nathanw bmac_mediastatus(ifp, ifmr)
    843  1.16.6.2  nathanw 	struct ifnet *ifp;
    844  1.16.6.2  nathanw 	struct ifmediareq *ifmr;
    845  1.16.6.2  nathanw {
    846  1.16.6.2  nathanw 	struct bmac_softc *sc = ifp->if_softc;
    847  1.16.6.2  nathanw 
    848  1.16.6.2  nathanw 	mii_pollstat(&sc->sc_mii);
    849  1.16.6.2  nathanw 
    850  1.16.6.2  nathanw 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
    851  1.16.6.2  nathanw 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
    852  1.16.6.2  nathanw }
    853  1.16.6.2  nathanw 
    854  1.16.6.2  nathanw /*
    855  1.16.6.2  nathanw  * Set up the logical address filter.
    856  1.16.6.2  nathanw  */
    857  1.16.6.2  nathanw void
    858  1.16.6.2  nathanw bmac_setladrf(sc)
    859  1.16.6.2  nathanw 	struct bmac_softc *sc;
    860  1.16.6.2  nathanw {
    861  1.16.6.2  nathanw 	struct ifnet *ifp = &sc->sc_if;
    862  1.16.6.2  nathanw 	struct ether_multi *enm;
    863  1.16.6.2  nathanw 	struct ether_multistep step;
    864  1.16.6.2  nathanw 	u_int32_t crc;
    865  1.16.6.2  nathanw 	u_int16_t hash[4];
    866  1.16.6.2  nathanw 	int x;
    867  1.16.6.2  nathanw 
    868  1.16.6.2  nathanw 	/*
    869  1.16.6.2  nathanw 	 * Set up multicast address filter by passing all multicast addresses
    870  1.16.6.2  nathanw 	 * through a crc generator, and then using the high order 6 bits as an
    871  1.16.6.2  nathanw 	 * index into the 64 bit logical address filter.  The high order bit
    872  1.16.6.2  nathanw 	 * selects the word, while the rest of the bits select the bit within
    873  1.16.6.2  nathanw 	 * the word.
    874  1.16.6.2  nathanw 	 */
    875  1.16.6.2  nathanw 
    876  1.16.6.2  nathanw 	if (ifp->if_flags & IFF_PROMISC) {
    877  1.16.6.2  nathanw 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    878  1.16.6.2  nathanw 		return;
    879  1.16.6.2  nathanw 	}
    880  1.16.6.2  nathanw 
    881  1.16.6.2  nathanw 	if (ifp->if_flags & IFF_ALLMULTI) {
    882  1.16.6.2  nathanw 		hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    883  1.16.6.2  nathanw 		goto chipit;
    884  1.16.6.2  nathanw 	}
    885  1.16.6.2  nathanw 
    886  1.16.6.2  nathanw 	hash[3] = hash[2] = hash[1] = hash[0] = 0;
    887  1.16.6.2  nathanw 
    888  1.16.6.2  nathanw 	ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
    889  1.16.6.2  nathanw 	while (enm != NULL) {
    890  1.16.6.2  nathanw 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
    891  1.16.6.2  nathanw 			/*
    892  1.16.6.2  nathanw 			 * We must listen to a range of multicast addresses.
    893  1.16.6.2  nathanw 			 * For now, just accept all multicasts, rather than
    894  1.16.6.2  nathanw 			 * trying to set only those filter bits needed to match
    895  1.16.6.2  nathanw 			 * the range.  (At this time, the only use of address
    896  1.16.6.2  nathanw 			 * ranges is for IP multicast routing, for which the
    897  1.16.6.2  nathanw 			 * range is big enough to require all bits set.)
    898  1.16.6.2  nathanw 			 */
    899  1.16.6.2  nathanw 			hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    900  1.16.6.2  nathanw 			ifp->if_flags |= IFF_ALLMULTI;
    901  1.16.6.2  nathanw 			goto chipit;
    902  1.16.6.2  nathanw 		}
    903  1.16.6.2  nathanw 
    904  1.16.6.2  nathanw 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
    905  1.16.6.2  nathanw 
    906  1.16.6.2  nathanw 		/* Just want the 6 most significant bits. */
    907  1.16.6.2  nathanw 		crc >>= 26;
    908  1.16.6.2  nathanw 
    909  1.16.6.2  nathanw 		/* Set the corresponding bit in the filter. */
    910  1.16.6.2  nathanw 		hash[crc >> 4] |= 1 << (crc & 0xf);
    911  1.16.6.2  nathanw 
    912  1.16.6.2  nathanw 		ETHER_NEXT_MULTI(step, enm);
    913  1.16.6.2  nathanw 	}
    914  1.16.6.2  nathanw 
    915  1.16.6.2  nathanw 	ifp->if_flags &= ~IFF_ALLMULTI;
    916  1.16.6.2  nathanw 
    917  1.16.6.2  nathanw chipit:
    918  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH0, hash[0]);
    919  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH1, hash[1]);
    920  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH2, hash[2]);
    921  1.16.6.2  nathanw 	bmac_write_reg(sc, HASH3, hash[3]);
    922  1.16.6.2  nathanw 	x = bmac_read_reg(sc, RXCFG);
    923  1.16.6.2  nathanw 	x &= ~RxPromiscEnable;
    924  1.16.6.2  nathanw 	x |= RxHashFilterEnable;
    925  1.16.6.2  nathanw 	bmac_write_reg(sc, RXCFG, x);
    926  1.16.6.2  nathanw }
    927  1.16.6.2  nathanw 
    928  1.16.6.2  nathanw int
    929  1.16.6.2  nathanw bmac_mii_readreg(dev, phy, reg)
    930  1.16.6.2  nathanw 	struct device *dev;
    931  1.16.6.2  nathanw 	int phy, reg;
    932  1.16.6.2  nathanw {
    933  1.16.6.2  nathanw 	return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg);
    934  1.16.6.2  nathanw }
    935  1.16.6.2  nathanw 
    936  1.16.6.2  nathanw void
    937  1.16.6.2  nathanw bmac_mii_writereg(dev, phy, reg, val)
    938  1.16.6.2  nathanw 	struct device *dev;
    939  1.16.6.2  nathanw 	int phy, reg, val;
    940  1.16.6.2  nathanw {
    941  1.16.6.2  nathanw 	mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val);
    942  1.16.6.2  nathanw }
    943  1.16.6.2  nathanw 
    944  1.16.6.2  nathanw u_int32_t
    945  1.16.6.2  nathanw bmac_mbo_read(dev)
    946  1.16.6.2  nathanw 	struct device *dev;
    947  1.16.6.2  nathanw {
    948  1.16.6.2  nathanw 	struct bmac_softc *sc = (void *)dev;
    949  1.16.6.2  nathanw 
    950  1.16.6.2  nathanw 	return bmac_read_reg(sc, MIFCSR);
    951  1.16.6.2  nathanw }
    952  1.16.6.2  nathanw 
    953  1.16.6.2  nathanw void
    954  1.16.6.2  nathanw bmac_mbo_write(dev, val)
    955  1.16.6.2  nathanw 	struct device *dev;
    956  1.16.6.2  nathanw 	u_int32_t val;
    957  1.16.6.2  nathanw {
    958  1.16.6.2  nathanw 	struct bmac_softc *sc = (void *)dev;
    959  1.16.6.2  nathanw 
    960  1.16.6.2  nathanw 	bmac_write_reg(sc, MIFCSR, val);
    961  1.16.6.2  nathanw }
    962  1.16.6.2  nathanw 
    963  1.16.6.2  nathanw void
    964  1.16.6.2  nathanw bmac_mii_statchg(dev)
    965  1.16.6.2  nathanw 	struct device *dev;
    966  1.16.6.2  nathanw {
    967  1.16.6.2  nathanw 	struct bmac_softc *sc = (void *)dev;
    968  1.16.6.2  nathanw 	int x;
    969  1.16.6.2  nathanw 
    970  1.16.6.2  nathanw 	/* Update duplex mode in TX configuration */
    971  1.16.6.2  nathanw 	x = bmac_read_reg(sc, TXCFG);
    972  1.16.6.2  nathanw 	if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
    973  1.16.6.2  nathanw 		x |= TxFullDuplex;
    974  1.16.6.2  nathanw 	else
    975  1.16.6.2  nathanw 		x &= ~TxFullDuplex;
    976  1.16.6.2  nathanw 	bmac_write_reg(sc, TXCFG, x);
    977  1.16.6.2  nathanw 
    978  1.16.6.2  nathanw #ifdef BMAC_DEBUG
    979  1.16.6.2  nathanw 	printf("bmac_mii_statchg 0x%x\n",
    980  1.16.6.2  nathanw 		IFM_OPTIONS(sc->sc_mii.mii_media_active));
    981  1.16.6.2  nathanw #endif
    982  1.16.6.2  nathanw }
    983  1.16.6.2  nathanw 
    984  1.16.6.2  nathanw void
    985  1.16.6.2  nathanw bmac_mii_tick(v)
    986  1.16.6.2  nathanw 	void *v;
    987  1.16.6.2  nathanw {
    988  1.16.6.2  nathanw 	struct bmac_softc *sc = v;
    989  1.16.6.2  nathanw 	int s;
    990  1.16.6.2  nathanw 
    991  1.16.6.2  nathanw 	s = splnet();
    992  1.16.6.2  nathanw 	mii_tick(&sc->sc_mii);
    993  1.16.6.2  nathanw 	splx(s);
    994  1.16.6.2  nathanw 
    995  1.16.6.2  nathanw 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    996  1.16.6.2  nathanw }
    997