if_bm.c revision 1.1.4.1 1 /* $NetBSD: if_bm.c,v 1.1.4.1 1999/06/21 00:51:38 thorpej Exp $ */
2
3 /*-
4 * Copyright (C) 1998, 1999 Tsubai Masanari. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "opt_inet.h"
30 #include "opt_ns.h"
31 #include "bpfilter.h"
32
33 #include <sys/param.h>
34 #include <sys/device.h>
35 #include <sys/ioctl.h>
36 #include <sys/mbuf.h>
37 #include <sys/socket.h>
38 #include <sys/systm.h>
39
40 #include <net/if.h>
41 #include <net/if_ether.h>
42 #include <net/if_media.h>
43
44 #if NBPFILTER > 0
45 #include <net/bpf.h>
46 #include <net/bpfdesc.h>
47 #endif
48
49 #include <vm/vm.h>
50
51 #include <dev/ofw/openfirm.h>
52
53 #include <machine/autoconf.h>
54 #include <machine/pio.h>
55
56 #include <macppc/dev/dbdma.h>
57 #include <macppc/dev/if_bmreg.h>
58
59 #define BMAC_TXBUFS 2
60 #define BMAC_RXBUFS 16
61 #define BMAC_BUFLEN 2048
62
63 struct bmac_softc {
64 struct device sc_dev;
65 struct ethercom sc_ethercom;
66 #define sc_if sc_ethercom.ec_if
67 struct ifmedia sc_media;
68 vaddr_t sc_regs;
69 dbdma_regmap_t *sc_txdma;
70 dbdma_regmap_t *sc_rxdma;
71 dbdma_command_t *sc_txcmd;
72 dbdma_command_t *sc_rxcmd;
73 caddr_t sc_txbuf;
74 caddr_t sc_rxbuf;
75 int sc_rxlast;
76 int sc_flags;
77 int sc_debug;
78 u_char sc_enaddr[6];
79 };
80
81 #define BMAC_BMACPLUS 0x01
82
83 extern u_int *heathrow_FCR;
84
85 static __inline int bmac_read_reg __P((struct bmac_softc *, int));
86 static __inline void bmac_write_reg __P((struct bmac_softc *, int, int));
87 static __inline void bmac_set_bits __P((struct bmac_softc *, int, int));
88 static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int));
89
90 static int bmac_match __P((struct device *, struct cfdata *, void *));
91 static void bmac_attach __P((struct device *, struct device *, void *));
92 static void bmac_reset_chip __P((struct bmac_softc *));
93 static void bmac_init __P((struct bmac_softc *));
94 static void bmac_init_dma __P((struct bmac_softc *));
95 static int bmac_intr __P((void *));
96 static int bmac_rint __P((void *));
97 static void bmac_reset __P((struct bmac_softc *));
98 static void bmac_stop __P((struct bmac_softc *));
99 static void bmac_start __P((struct ifnet *));
100 static void bmac_transmit_packet __P((struct bmac_softc *, void *, int));
101 static int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *));
102 static struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int));
103 static void bmac_watchdog __P((struct ifnet *));
104 static int bmac_ioctl __P((struct ifnet *, u_long, caddr_t));
105 static int bmac_mediachange __P((struct ifnet *));
106 static void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
107 static void bmac_setladrf __P((struct bmac_softc *));
108
109 struct cfattach bm_ca = {
110 sizeof(struct bmac_softc), bmac_match, bmac_attach
111 };
112
113 int
114 bmac_read_reg(sc, off)
115 struct bmac_softc *sc;
116 int off;
117 {
118 return in16rb(sc->sc_regs + off);
119 }
120
121 void
122 bmac_write_reg(sc, off, val)
123 struct bmac_softc *sc;
124 int off, val;
125 {
126 out16rb(sc->sc_regs + off, val);
127 }
128
129 void
130 bmac_set_bits(sc, off, val)
131 struct bmac_softc *sc;
132 int off, val;
133 {
134 val |= bmac_read_reg(sc, off);
135 bmac_write_reg(sc, off, val);
136 }
137
138 void
139 bmac_reset_bits(sc, off, val)
140 struct bmac_softc *sc;
141 int off, val;
142 {
143 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
144 }
145
146 int
147 bmac_match(parent, cf, aux)
148 struct device *parent;
149 struct cfdata *cf;
150 void *aux;
151 {
152 struct confargs *ca = aux;
153
154 if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
155 return 0;
156
157 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */
158 return 1;
159 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */
160 return 1;
161
162 return 0;
163 }
164
165 void
166 bmac_attach(parent, self, aux)
167 struct device *parent, *self;
168 void *aux;
169 {
170 struct confargs *ca = aux;
171 struct bmac_softc *sc = (void *)self;
172 struct ifnet *ifp = &sc->sc_if;
173 u_char laddr[6];
174 int i;
175
176 sc->sc_flags =0;
177 if (strcmp(ca->ca_name, "ethernet") == 0)
178 sc->sc_flags |= BMAC_BMACPLUS;
179
180 ca->ca_reg[0] += ca->ca_baseaddr;
181 ca->ca_reg[2] += ca->ca_baseaddr;
182 ca->ca_reg[4] += ca->ca_baseaddr;
183
184 sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], NBPG);
185
186 bmac_write_reg(sc, INTDISABLE, NoEventsMask);
187
188 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
189 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
190 printf(": cannot get mac-address\n");
191 return;
192 }
193 bcopy(laddr, sc->sc_enaddr, 6);
194
195 sc->sc_txdma = mapiodev(ca->ca_reg[2], NBPG);
196 sc->sc_rxdma = mapiodev(ca->ca_reg[4], NBPG);
197 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
198 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
199 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
200 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
201 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
202 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
203 printf("cannot allocate memory\n");
204 return;
205 }
206
207 printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
208 ether_sprintf(laddr));
209
210 intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc);
211 intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc);
212
213 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
214 ifp->if_softc = sc;
215 ifp->if_ioctl = bmac_ioctl;
216 ifp->if_start = bmac_start;
217 ifp->if_flags =
218 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
219 ifp->if_watchdog = bmac_watchdog;
220
221 ifmedia_init(&sc->sc_media, 0, bmac_mediachange, bmac_mediastatus);
222 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_T, 0, NULL);
223 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_10_T);
224
225 bmac_reset_chip(sc);
226
227 if_attach(ifp);
228 ether_ifattach(ifp, sc->sc_enaddr);
229
230 #if NBPFILTER > 0
231 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
232 #endif
233 }
234
235 /*
236 * Reset and enable bmac by heathrow FCR.
237 */
238 void
239 bmac_reset_chip(sc)
240 struct bmac_softc *sc;
241 {
242 u_int v;
243
244 dbdma_reset(sc->sc_txdma);
245 dbdma_reset(sc->sc_rxdma);
246
247 v = in32rb(heathrow_FCR);
248
249 v |= EnetEnable;
250 out32rb(heathrow_FCR, v);
251 delay(50000);
252
253 v |= ResetEnetCell;
254 out32rb(heathrow_FCR, v);
255 delay(50000);
256
257 v &= ~ResetEnetCell;
258 out32rb(heathrow_FCR, v);
259 delay(50000);
260
261 out32rb(heathrow_FCR, v);
262 }
263
264 void
265 bmac_init(sc)
266 struct bmac_softc *sc;
267 {
268 struct ifnet *ifp = &sc->sc_if;
269 struct ether_header *eh;
270 caddr_t data;
271 int i, tb;
272 u_short *p;
273
274 bmac_reset_chip(sc);
275
276 bmac_write_reg(sc, RXRST, RxResetValue);
277 bmac_write_reg(sc, TXRST, TxResetBit);
278
279 /* Wait for reset completion. */
280 while (bmac_read_reg(sc, TXRST) & TxResetBit);
281
282 if (! (sc->sc_flags & BMAC_BMACPLUS))
283 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
284
285 __asm __volatile ("mftb %0" : "=r"(tb));
286 bmac_write_reg(sc, RSEED, tb);
287 bmac_set_bits(sc, XIFC, TxOutputEnable);
288 bmac_read_reg(sc, PAREG);
289
290 /* Reset various counters. */
291 bmac_write_reg(sc, NCCNT, 0);
292 bmac_write_reg(sc, NTCNT, 0);
293 bmac_write_reg(sc, EXCNT, 0);
294 bmac_write_reg(sc, LTCNT, 0);
295 bmac_write_reg(sc, FRCNT, 0);
296 bmac_write_reg(sc, LECNT, 0);
297 bmac_write_reg(sc, AECNT, 0);
298 bmac_write_reg(sc, FECNT, 0);
299 bmac_write_reg(sc, RXCV, 0);
300
301 /* Set tx fifo information. */
302 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */
303
304 bmac_write_reg(sc, TXFIFOCSR, 0);
305 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
306
307 /* Set rx fifo information. */
308 bmac_write_reg(sc, RXFIFOCSR, 0);
309 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
310
311 /* Clear status register. */
312 bmac_read_reg(sc, STATUS);
313
314 bmac_write_reg(sc, HASH3, 0);
315 bmac_write_reg(sc, HASH2, 0);
316 bmac_write_reg(sc, HASH1, 0);
317 bmac_write_reg(sc, HASH0, 0);
318
319 /* Set MAC address. */
320 p = (u_short *)sc->sc_enaddr;
321 bmac_write_reg(sc, MADD0, *p++);
322 bmac_write_reg(sc, MADD1, *p++);
323 bmac_write_reg(sc, MADD2, *p);
324
325 bmac_write_reg(sc, RXCFG,
326 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
327
328 if (ifp->if_flags & IFF_PROMISC)
329 bmac_set_bits(sc, RXCFG, RxPromiscEnable);
330
331 bmac_init_dma(sc);
332
333 /* Enable TX/RX */
334 bmac_set_bits(sc, RXCFG, RxMACEnable);
335 bmac_set_bits(sc, TXCFG, TxMACEnable);
336
337 bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
338
339 ifp->if_flags |= IFF_RUNNING;
340 ifp->if_flags &= ~IFF_OACTIVE;
341 ifp->if_timer = 0;
342
343 data = sc->sc_txbuf;
344 eh = (struct ether_header *)data;
345
346 bzero(data, sizeof(eh) + ETHERMIN);
347 bcopy(sc->sc_enaddr, eh->ether_dhost, ETHER_ADDR_LEN);
348 bcopy(sc->sc_enaddr, eh->ether_shost, ETHER_ADDR_LEN);
349 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN);
350
351 bmac_start(ifp);
352 }
353
354 void
355 bmac_init_dma(sc)
356 struct bmac_softc *sc;
357 {
358 dbdma_command_t *cmd = sc->sc_rxcmd;
359 int i;
360
361 dbdma_reset(sc->sc_txdma);
362 dbdma_reset(sc->sc_rxdma);
363
364 bzero(sc->sc_txcmd, BMAC_TXBUFS * sizeof(dbdma_command_t));
365 bzero(sc->sc_rxcmd, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
366
367 for (i = 0; i < BMAC_RXBUFS; i++) {
368 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
369 vtophys(sc->sc_rxbuf + BMAC_BUFLEN * i),
370 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
371 cmd++;
372 }
373 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
374 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
375 dbdma_st32(&cmd->d_cmddep, vtophys(sc->sc_rxcmd));
376
377 sc->sc_rxlast = 0;
378
379 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd);
380 }
381
382 int
383 bmac_intr(v)
384 void *v;
385 {
386 struct bmac_softc *sc = v;
387 int stat;
388
389 stat = bmac_read_reg(sc, STATUS);
390 if (stat == 0)
391 return 0;
392
393 #ifdef BMAC_DEBUG
394 printf("bmac_intr status = 0x%x\n", stat);
395 #endif
396
397 if (stat & IntFrameSent) {
398 sc->sc_if.if_flags &= ~IFF_OACTIVE;
399 sc->sc_if.if_timer = 0;
400 sc->sc_if.if_opackets++;
401 bmac_start(&sc->sc_if);
402 }
403
404 /* XXX should do more! */
405
406 return 1;
407 }
408
409 int
410 bmac_rint(v)
411 void *v;
412 {
413 struct bmac_softc *sc = v;
414 struct ifnet *ifp = &sc->sc_if;
415 struct mbuf *m;
416 dbdma_command_t *cmd;
417 int status, resid, count, datalen;
418 int i, n;
419 void *data;
420
421 i = sc->sc_rxlast;
422 for (n = 0; n < BMAC_RXBUFS; n++, i++) {
423 if (i == BMAC_RXBUFS)
424 i = 0;
425 cmd = &sc->sc_rxcmd[i];
426 status = dbdma_ld16(&cmd->d_status);
427 resid = dbdma_ld16(&cmd->d_resid);
428
429 #ifdef BMAC_DEBUG
430 if (status != 0 && status != 0x8440 && status != 0x9440)
431 printf("bmac_rint status = 0x%x\n", status);
432 #endif
433
434 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */
435 continue;
436 count = dbdma_ld16(&cmd->d_count);
437 datalen = count - resid;
438 if (datalen < sizeof(struct ether_header)) {
439 printf("%s: short packet len = %d\n",
440 ifp->if_xname, datalen);
441 goto next;
442 }
443 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
444 data = sc->sc_rxbuf + BMAC_BUFLEN * i;
445 m = bmac_get(sc, data, datalen);
446
447 if (m == NULL) {
448 ifp->if_ierrors++;
449 goto next;
450 }
451
452 #if NBPFILTER > 0
453 /*
454 * Check if there's a BPF listener on this interface.
455 * If so, hand off the raw packet to BPF.
456 */
457 if (ifp->if_bpf)
458 bpf_mtap(ifp->if_bpf, m);
459 #endif
460 (*ifp->if_input)(ifp, m);
461 ifp->if_ipackets++;
462
463 next:
464 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
465 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
466
467 cmd->d_status = 0;
468 cmd->d_resid = 0;
469 sc->sc_rxlast = i + 1;
470 }
471 dbdma_continue(sc->sc_rxdma);
472
473 return 1;
474 }
475
476 void
477 bmac_reset(sc)
478 struct bmac_softc *sc;
479 {
480 int s;
481
482 s = splnet();
483 bmac_init(sc);
484 splx(s);
485 }
486
487 void
488 bmac_stop(sc)
489 struct bmac_softc *sc;
490 {
491 struct ifnet *ifp = &sc->sc_if;
492 int s;
493
494 s = splnet();
495
496 /* Disable TX/RX. */
497 bmac_reset_bits(sc, TXCFG, TxMACEnable);
498 bmac_reset_bits(sc, RXCFG, RxMACEnable);
499
500 /* Disable all interrupts. */
501 bmac_write_reg(sc, INTDISABLE, NoEventsMask);
502
503 dbdma_stop(sc->sc_txdma);
504 dbdma_stop(sc->sc_rxdma);
505
506 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
507 ifp->if_timer = 0;
508
509 splx(s);
510 }
511
512 void
513 bmac_start(ifp)
514 struct ifnet *ifp;
515 {
516 struct bmac_softc *sc = ifp->if_softc;
517 struct mbuf *m;
518 int tlen;
519
520 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
521 return;
522
523 while (1) {
524 if (ifp->if_flags & IFF_OACTIVE)
525 return;
526
527 IF_DEQUEUE(&ifp->if_snd, m);
528 if (m == 0)
529 break;
530 #if NBPFILTER > 0
531 /*
532 * If BPF is listening on this interface, let it see the
533 * packet before we commit it to the wire.
534 */
535 if (ifp->if_bpf)
536 bpf_mtap(ifp->if_bpf, m);
537 #endif
538
539 ifp->if_flags |= IFF_OACTIVE;
540 tlen = bmac_put(sc, sc->sc_txbuf, m);
541
542 /* 5 seconds to watch for failing to transmit */
543 ifp->if_timer = 5;
544 ifp->if_opackets++; /* # of pkts */
545
546 bmac_transmit_packet(sc, sc->sc_txbuf, tlen);
547 }
548 }
549
550 void
551 bmac_transmit_packet(sc, buff, len)
552 struct bmac_softc *sc;
553 void *buff;
554 int len;
555 {
556 dbdma_command_t *cmd = sc->sc_txcmd;
557 vaddr_t va = (vaddr_t)buff;
558
559 #ifdef BMAC_DEBUG
560 if (vtophys(va) + len - 1 != vtophys(va + len - 1))
561 panic("bmac_transmit_packet");
562 #endif
563
564 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
565 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
566 cmd++;
567 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
568 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
569
570 dbdma_start(sc->sc_txdma, sc->sc_txcmd);
571 }
572
573 int
574 bmac_put(sc, buff, m)
575 struct bmac_softc *sc;
576 caddr_t buff;
577 struct mbuf *m;
578 {
579 struct mbuf *n;
580 int len, tlen = 0;
581
582 for (; m; m = n) {
583 len = m->m_len;
584 if (len == 0) {
585 MFREE(m, n);
586 continue;
587 }
588 bcopy(mtod(m, caddr_t), buff, len);
589 buff += len;
590 tlen += len;
591 MFREE(m, n);
592 }
593 if (tlen > NBPG)
594 panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
595
596 return tlen;
597 }
598
599 struct mbuf *
600 bmac_get(sc, pkt, totlen)
601 struct bmac_softc *sc;
602 caddr_t pkt;
603 int totlen;
604 {
605 struct mbuf *m;
606 struct mbuf *top, **mp;
607 int len;
608
609 MGETHDR(m, M_DONTWAIT, MT_DATA);
610 if (m == 0)
611 return 0;
612 m->m_pkthdr.rcvif = &sc->sc_if;
613 m->m_pkthdr.len = totlen;
614 len = MHLEN;
615 top = 0;
616 mp = ⊤
617
618 while (totlen > 0) {
619 if (top) {
620 MGET(m, M_DONTWAIT, MT_DATA);
621 if (m == 0) {
622 m_freem(top);
623 return 0;
624 }
625 len = MLEN;
626 }
627 if (totlen >= MINCLSIZE) {
628 MCLGET(m, M_DONTWAIT);
629 if ((m->m_flags & M_EXT) == 0) {
630 m_free(m);
631 m_freem(top);
632 return 0;
633 }
634 len = MCLBYTES;
635 }
636 m->m_len = len = min(totlen, len);
637 bcopy(pkt, mtod(m, caddr_t), len);
638 pkt += len;
639 totlen -= len;
640 *mp = m;
641 mp = &m->m_next;
642 }
643
644 return top;
645 }
646
647 void
648 bmac_watchdog(ifp)
649 struct ifnet *ifp;
650 {
651 struct bmac_softc *sc = ifp->if_softc;
652
653 bmac_reset_bits(sc, RXCFG, RxMACEnable);
654 bmac_reset_bits(sc, TXCFG, TxMACEnable);
655
656 printf("%s: device timeout\n", ifp->if_xname);
657 ifp->if_oerrors++;
658
659 bmac_reset(sc);
660 }
661
662 int
663 bmac_ioctl(ifp, cmd, data)
664 struct ifnet *ifp;
665 u_long cmd;
666 caddr_t data;
667 {
668 struct bmac_softc *sc = ifp->if_softc;
669 struct ifaddr *ifa = (struct ifaddr *)data;
670 struct ifreq *ifr = (struct ifreq *)data;
671 int s, error = 0;
672 int temp;
673
674 s = splnet();
675
676 switch (cmd) {
677
678 case SIOCSIFADDR:
679 ifp->if_flags |= IFF_UP;
680
681 switch (ifa->ifa_addr->sa_family) {
682 #ifdef INET
683 case AF_INET:
684 bmac_init(sc);
685 arp_ifinit(ifp, ifa);
686 break;
687 #endif
688 #ifdef NS
689 case AF_NS:
690 {
691 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
692
693 if (ns_nullhost(*ina))
694 ina->x_host =
695 *(union ns_host *)LLADDR(ifp->if_sadl);
696 else {
697 bcopy(ina->x_host.c_host,
698 LLADDR(ifp->if_sadl),
699 sizeof(sc->sc_enaddr));
700 }
701 /* Set new address. */
702 bmac_init(sc);
703 break;
704 }
705 #endif
706 default:
707 bmac_init(sc);
708 break;
709 }
710 break;
711
712 case SIOCSIFFLAGS:
713 if ((ifp->if_flags & IFF_UP) == 0 &&
714 (ifp->if_flags & IFF_RUNNING) != 0) {
715 /*
716 * If interface is marked down and it is running, then
717 * stop it.
718 */
719 bmac_stop(sc);
720 ifp->if_flags &= ~IFF_RUNNING;
721 } else if ((ifp->if_flags & IFF_UP) != 0 &&
722 (ifp->if_flags & IFF_RUNNING) == 0) {
723 /*
724 * If interface is marked up and it is stopped, then
725 * start it.
726 */
727 bmac_init(sc);
728 } else {
729 /*
730 * Reset the interface to pick up changes in any other
731 * flags that affect hardware registers.
732 */
733 /*bmac_stop(sc);*/
734 bmac_init(sc);
735 }
736 #ifdef BMAC_DEBUG
737 if (ifp->if_flags & IFF_DEBUG)
738 sc->sc_debug = 1;
739 else
740 sc->sc_debug = 0;
741 #endif
742 break;
743
744 case SIOCADDMULTI:
745 case SIOCDELMULTI:
746 error = (cmd == SIOCADDMULTI) ?
747 ether_addmulti(ifr, &sc->sc_ethercom) :
748 ether_delmulti(ifr, &sc->sc_ethercom);
749
750 if (error == ENETRESET) {
751 /*
752 * Multicast list has changed; set the hardware filter
753 * accordingly.
754 */
755 bmac_init(sc);
756 bmac_setladrf(sc);
757 error = 0;
758 }
759 break;
760
761 case SIOCGIFMEDIA:
762 case SIOCSIFMEDIA:
763 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
764 break;
765
766 default:
767 error = EINVAL;
768 }
769
770 splx(s);
771 return error;
772 }
773
774 int
775 bmac_mediachange(ifp)
776 struct ifnet *ifp;
777 {
778 return EINVAL;
779 }
780
781 void
782 bmac_mediastatus(ifp, ifmr)
783 struct ifnet *ifp;
784 struct ifmediareq *ifmr;
785 {
786 if ((ifp->if_flags & IFF_UP) == 0)
787 return;
788
789 ifmr->ifm_status = IFM_AVALID;
790 ifmr->ifm_status |= IFM_ACTIVE;
791 }
792
793 #define MC_POLY_BE 0x04c11db7UL /* mcast crc, big endian */
794 #define MC_POLY_LE 0xedb88320UL /* mcast crc, little endian */
795
796 /*
797 * Set up the logical address filter.
798 */
799 void
800 bmac_setladrf(sc)
801 struct bmac_softc *sc;
802 {
803 struct ifnet *ifp = &sc->sc_if;
804 struct ether_multi *enm;
805 struct ether_multistep step;
806 int i, j;
807 u_int32_t crc;
808 u_int16_t hash[4];
809 u_int8_t octet;
810
811 /*
812 * Set up multicast address filter by passing all multicast addresses
813 * through a crc generator, and then using the high order 6 bits as an
814 * index into the 64 bit logical address filter. The high order bit
815 * selects the word, while the rest of the bits select the bit within
816 * the word.
817 */
818
819 if (ifp->if_flags & IFF_ALLMULTI)
820 goto allmulti;
821
822 if (ifp->if_flags & IFF_PROMISC) {
823 bmac_set_bits(sc, RXCFG, RxPromiscEnable);
824 goto allmulti;
825 }
826
827 hash[3] = hash[2] = hash[1] = hash[0] = 0;
828 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
829 while (enm != NULL) {
830 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
831 /*
832 * We must listen to a range of multicast addresses.
833 * For now, just accept all multicasts, rather than
834 * trying to set only those filter bits needed to match
835 * the range. (At this time, the only use of address
836 * ranges is for IP multicast routing, for which the
837 * range is big enough to require all bits set.)
838 */
839 goto allmulti;
840 }
841
842 crc = 0xffffffff;
843 for (i = 0; i < ETHER_ADDR_LEN; i++) {
844 octet = enm->enm_addrlo[i];
845
846 for (j = 0; j < 8; j++) {
847 if ((crc & 1) ^ (octet & 1)) {
848 crc >>= 1;
849 crc ^= MC_POLY_LE;
850 }
851 else
852 crc >>= 1;
853 octet >>= 1;
854 }
855 }
856
857 /* Just want the 6 most significant bits. */
858 crc >>= 26;
859
860 /* Set the corresponding bit in the filter. */
861 hash[crc >> 4] |= 1 << (crc & 0xf);
862
863 ETHER_NEXT_MULTI(step, enm);
864 }
865 bmac_write_reg(sc, HASH3, hash[3]);
866 bmac_write_reg(sc, HASH2, hash[2]);
867 bmac_write_reg(sc, HASH1, hash[1]);
868 bmac_write_reg(sc, HASH0, hash[0]);
869 ifp->if_flags &= ~IFF_ALLMULTI;
870 return;
871
872 allmulti:
873 ifp->if_flags |= IFF_ALLMULTI;
874 bmac_write_reg(sc, HASH3, 0xffff);
875 bmac_write_reg(sc, HASH2, 0xffff);
876 bmac_write_reg(sc, HASH1, 0xffff);
877 bmac_write_reg(sc, HASH0, 0xffff);
878 }
879