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if_bm.c revision 1.15.4.2
      1 /*	$NetBSD: if_bm.c,v 1.15.4.2 2002/03/16 15:58:31 jdolecek Exp $	*/
      2 
      3 /*-
      4  * Copyright (C) 1998, 1999, 2000 Tsubai Masanari.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_inet.h"
     30 #include "opt_ns.h"
     31 #include "bpfilter.h"
     32 
     33 #include <sys/param.h>
     34 #include <sys/device.h>
     35 #include <sys/ioctl.h>
     36 #include <sys/kernel.h>
     37 #include <sys/mbuf.h>
     38 #include <sys/socket.h>
     39 #include <sys/systm.h>
     40 #include <sys/callout.h>
     41 
     42 #include <uvm/uvm_extern.h>
     43 
     44 #include <net/if.h>
     45 #include <net/if_ether.h>
     46 #include <net/if_media.h>
     47 
     48 #if NBPFILTER > 0
     49 #include <net/bpf.h>
     50 #endif
     51 
     52 #ifdef INET
     53 #include <netinet/in.h>
     54 #include <netinet/if_inarp.h>
     55 #endif
     56 
     57 #include <dev/ofw/openfirm.h>
     58 
     59 #include <dev/mii/mii.h>
     60 #include <dev/mii/miivar.h>
     61 #include <dev/mii/mii_bitbang.h>
     62 
     63 #include <machine/autoconf.h>
     64 #include <machine/pio.h>
     65 
     66 #include <macppc/dev/dbdma.h>
     67 #include <macppc/dev/if_bmreg.h>
     68 
     69 #define BMAC_TXBUFS 2
     70 #define BMAC_RXBUFS 16
     71 #define BMAC_BUFLEN 2048
     72 
     73 struct bmac_softc {
     74 	struct device sc_dev;
     75 	struct ethercom sc_ethercom;
     76 #define sc_if sc_ethercom.ec_if
     77 	struct callout sc_tick_ch;
     78 	vaddr_t sc_regs;
     79 	dbdma_regmap_t *sc_txdma;
     80 	dbdma_regmap_t *sc_rxdma;
     81 	dbdma_command_t *sc_txcmd;
     82 	dbdma_command_t *sc_rxcmd;
     83 	caddr_t sc_txbuf;
     84 	caddr_t sc_rxbuf;
     85 	int sc_rxlast;
     86 	int sc_flags;
     87 	struct mii_data sc_mii;
     88 	u_char sc_enaddr[6];
     89 };
     90 
     91 #define BMAC_BMACPLUS	0x01
     92 #define BMAC_DEBUGFLAG	0x02
     93 
     94 extern u_int *heathrow_FCR;
     95 
     96 static __inline int bmac_read_reg __P((struct bmac_softc *, int));
     97 static __inline void bmac_write_reg __P((struct bmac_softc *, int, int));
     98 static __inline void bmac_set_bits __P((struct bmac_softc *, int, int));
     99 static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int));
    100 
    101 int bmac_match __P((struct device *, struct cfdata *, void *));
    102 void bmac_attach __P((struct device *, struct device *, void *));
    103 void bmac_reset_chip __P((struct bmac_softc *));
    104 void bmac_init __P((struct bmac_softc *));
    105 void bmac_init_dma __P((struct bmac_softc *));
    106 int bmac_intr __P((void *));
    107 int bmac_rint __P((void *));
    108 void bmac_reset __P((struct bmac_softc *));
    109 void bmac_stop __P((struct bmac_softc *));
    110 void bmac_start __P((struct ifnet *));
    111 void bmac_transmit_packet __P((struct bmac_softc *, void *, int));
    112 int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *));
    113 struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int));
    114 void bmac_watchdog __P((struct ifnet *));
    115 int bmac_ioctl __P((struct ifnet *, u_long, caddr_t));
    116 int bmac_mediachange __P((struct ifnet *));
    117 void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
    118 void bmac_setladrf __P((struct bmac_softc *));
    119 
    120 int bmac_mii_readreg __P((struct device *, int, int));
    121 void bmac_mii_writereg __P((struct device *, int, int, int));
    122 void bmac_mii_statchg __P((struct device *));
    123 void bmac_mii_tick __P((void *));
    124 u_int32_t bmac_mbo_read __P((struct device *));
    125 void bmac_mbo_write __P((struct device *, u_int32_t));
    126 
    127 struct cfattach bm_ca = {
    128 	sizeof(struct bmac_softc), bmac_match, bmac_attach
    129 };
    130 
    131 struct mii_bitbang_ops bmac_mbo = {
    132 	bmac_mbo_read, bmac_mbo_write,
    133 	{ MIFDO, MIFDI, MIFDC, MIFDIR, 0 }
    134 };
    135 
    136 int
    137 bmac_read_reg(sc, off)
    138 	struct bmac_softc *sc;
    139 	int off;
    140 {
    141 	return in16rb(sc->sc_regs + off);
    142 }
    143 
    144 void
    145 bmac_write_reg(sc, off, val)
    146 	struct bmac_softc *sc;
    147 	int off, val;
    148 {
    149 	out16rb(sc->sc_regs + off, val);
    150 }
    151 
    152 void
    153 bmac_set_bits(sc, off, val)
    154 	struct bmac_softc *sc;
    155 	int off, val;
    156 {
    157 	val |= bmac_read_reg(sc, off);
    158 	bmac_write_reg(sc, off, val);
    159 }
    160 
    161 void
    162 bmac_reset_bits(sc, off, val)
    163 	struct bmac_softc *sc;
    164 	int off, val;
    165 {
    166 	bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
    167 }
    168 
    169 int
    170 bmac_match(parent, cf, aux)
    171 	struct device *parent;
    172 	struct cfdata *cf;
    173 	void *aux;
    174 {
    175 	struct confargs *ca = aux;
    176 
    177 	if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
    178 		return 0;
    179 
    180 	if (strcmp(ca->ca_name, "bmac") == 0)		/* bmac */
    181 		return 1;
    182 	if (strcmp(ca->ca_name, "ethernet") == 0)	/* bmac+ */
    183 		return 1;
    184 
    185 	return 0;
    186 }
    187 
    188 void
    189 bmac_attach(parent, self, aux)
    190 	struct device *parent, *self;
    191 	void *aux;
    192 {
    193 	struct confargs *ca = aux;
    194 	struct bmac_softc *sc = (void *)self;
    195 	struct ifnet *ifp = &sc->sc_if;
    196 	struct mii_data *mii = &sc->sc_mii;
    197 	u_char laddr[6];
    198 
    199 	callout_init(&sc->sc_tick_ch);
    200 
    201 	sc->sc_flags =0;
    202 	if (strcmp(ca->ca_name, "ethernet") == 0) {
    203 		char name[64];
    204 
    205 		memset(name, 0, 64);
    206 		OF_package_to_path(ca->ca_node, name, sizeof(name));
    207 		OF_open(name);
    208 		sc->sc_flags |= BMAC_BMACPLUS;
    209 	}
    210 
    211 	ca->ca_reg[0] += ca->ca_baseaddr;
    212 	ca->ca_reg[2] += ca->ca_baseaddr;
    213 	ca->ca_reg[4] += ca->ca_baseaddr;
    214 
    215 	sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], NBPG);
    216 
    217 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    218 
    219 	if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
    220 	    OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
    221 		printf(": cannot get mac-address\n");
    222 		return;
    223 	}
    224 	memcpy(sc->sc_enaddr, laddr, 6);
    225 
    226 	sc->sc_txdma = mapiodev(ca->ca_reg[2], NBPG);
    227 	sc->sc_rxdma = mapiodev(ca->ca_reg[4], NBPG);
    228 	sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
    229 	sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    230 	sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
    231 	sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
    232 	if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
    233 	    sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
    234 		printf("cannot allocate memory\n");
    235 		return;
    236 	}
    237 
    238 	printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
    239 		ether_sprintf(laddr));
    240 
    241 	intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc);
    242 	intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc);
    243 
    244 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    245 	ifp->if_softc = sc;
    246 	ifp->if_ioctl = bmac_ioctl;
    247 	ifp->if_start = bmac_start;
    248 	ifp->if_flags =
    249 		IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    250 	ifp->if_watchdog = bmac_watchdog;
    251 	IFQ_SET_READY(&ifp->if_snd);
    252 
    253 	mii->mii_ifp = ifp;
    254 	mii->mii_readreg = bmac_mii_readreg;
    255 	mii->mii_writereg = bmac_mii_writereg;
    256 	mii->mii_statchg = bmac_mii_statchg;
    257 
    258 	ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
    259 	mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
    260 		      MII_OFFSET_ANY, 0);
    261 
    262 	/* Choose a default media. */
    263 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    264 		ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
    265 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
    266 	} else
    267 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
    268 
    269 	bmac_reset_chip(sc);
    270 
    271 	if_attach(ifp);
    272 	ether_ifattach(ifp, sc->sc_enaddr);
    273 }
    274 
    275 /*
    276  * Reset and enable bmac by heathrow FCR.
    277  */
    278 void
    279 bmac_reset_chip(sc)
    280 	struct bmac_softc *sc;
    281 {
    282 	u_int v;
    283 
    284 	dbdma_reset(sc->sc_txdma);
    285 	dbdma_reset(sc->sc_rxdma);
    286 
    287 	v = in32rb(heathrow_FCR);
    288 
    289 	v |= EnetEnable;
    290 	out32rb(heathrow_FCR, v);
    291 	delay(50000);
    292 
    293 	v |= ResetEnetCell;
    294 	out32rb(heathrow_FCR, v);
    295 	delay(50000);
    296 
    297 	v &= ~ResetEnetCell;
    298 	out32rb(heathrow_FCR, v);
    299 	delay(50000);
    300 
    301 	out32rb(heathrow_FCR, v);
    302 }
    303 
    304 void
    305 bmac_init(sc)
    306 	struct bmac_softc *sc;
    307 {
    308 	struct ifnet *ifp = &sc->sc_if;
    309 	struct ether_header *eh;
    310 	caddr_t data;
    311 	int i, tb, bmcr;
    312 	u_short *p;
    313 
    314 	bmac_reset_chip(sc);
    315 
    316 	/* XXX */
    317 	bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
    318 	bmcr &= ~BMCR_ISO;
    319 	bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
    320 
    321 	bmac_write_reg(sc, RXRST, RxResetValue);
    322 	bmac_write_reg(sc, TXRST, TxResetBit);
    323 
    324 	/* Wait for reset completion. */
    325 	for (i = 1000; i > 0; i -= 10) {
    326 		if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
    327 			break;
    328 		delay(10);
    329 	}
    330 	if (i <= 0)
    331 		printf("%s: reset timeout\n", ifp->if_xname);
    332 
    333 	if (! (sc->sc_flags & BMAC_BMACPLUS))
    334 		bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
    335 
    336 	__asm __volatile ("mftb %0" : "=r"(tb));
    337 	bmac_write_reg(sc, RSEED, tb);
    338 	bmac_set_bits(sc, XIFC, TxOutputEnable);
    339 	bmac_read_reg(sc, PAREG);
    340 
    341 	/* Reset various counters. */
    342 	bmac_write_reg(sc, NCCNT, 0);
    343 	bmac_write_reg(sc, NTCNT, 0);
    344 	bmac_write_reg(sc, EXCNT, 0);
    345 	bmac_write_reg(sc, LTCNT, 0);
    346 	bmac_write_reg(sc, FRCNT, 0);
    347 	bmac_write_reg(sc, LECNT, 0);
    348 	bmac_write_reg(sc, AECNT, 0);
    349 	bmac_write_reg(sc, FECNT, 0);
    350 	bmac_write_reg(sc, RXCV, 0);
    351 
    352 	/* Set tx fifo information. */
    353 	bmac_write_reg(sc, TXTH, 4);	/* 4 octets before tx starts */
    354 
    355 	bmac_write_reg(sc, TXFIFOCSR, 0);
    356 	bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
    357 
    358 	/* Set rx fifo information. */
    359 	bmac_write_reg(sc, RXFIFOCSR, 0);
    360 	bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
    361 
    362 	/* Clear status register. */
    363 	bmac_read_reg(sc, STATUS);
    364 
    365 	bmac_write_reg(sc, HASH3, 0);
    366 	bmac_write_reg(sc, HASH2, 0);
    367 	bmac_write_reg(sc, HASH1, 0);
    368 	bmac_write_reg(sc, HASH0, 0);
    369 
    370 	/* Set MAC address. */
    371 	p = (u_short *)sc->sc_enaddr;
    372 	bmac_write_reg(sc, MADD0, *p++);
    373 	bmac_write_reg(sc, MADD1, *p++);
    374 	bmac_write_reg(sc, MADD2, *p);
    375 
    376 	bmac_write_reg(sc, RXCFG,
    377 		RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
    378 
    379 	if (ifp->if_flags & IFF_PROMISC)
    380 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    381 
    382 	bmac_init_dma(sc);
    383 
    384 	/* Enable TX/RX */
    385 	bmac_set_bits(sc, RXCFG, RxMACEnable);
    386 	bmac_set_bits(sc, TXCFG, TxMACEnable);
    387 
    388 	bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
    389 
    390 	ifp->if_flags |= IFF_RUNNING;
    391 	ifp->if_flags &= ~IFF_OACTIVE;
    392 	ifp->if_timer = 0;
    393 
    394 	data = sc->sc_txbuf;
    395 	eh = (struct ether_header *)data;
    396 
    397 	memset(data, 0, sizeof(eh) + ETHERMIN);
    398 	memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN);
    399 	memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN);
    400 	bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN);
    401 
    402 	bmac_start(ifp);
    403 
    404 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    405 }
    406 
    407 void
    408 bmac_init_dma(sc)
    409 	struct bmac_softc *sc;
    410 {
    411 	dbdma_command_t *cmd = sc->sc_rxcmd;
    412 	int i;
    413 
    414 	dbdma_reset(sc->sc_txdma);
    415 	dbdma_reset(sc->sc_rxdma);
    416 
    417 	memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t));
    418 	memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    419 
    420 	for (i = 0; i < BMAC_RXBUFS; i++) {
    421 		DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
    422 			vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i),
    423 			DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    424 		cmd++;
    425 	}
    426 	DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
    427 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
    428 	dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd));
    429 
    430 	sc->sc_rxlast = 0;
    431 
    432 	dbdma_start(sc->sc_rxdma, sc->sc_rxcmd);
    433 }
    434 
    435 int
    436 bmac_intr(v)
    437 	void *v;
    438 {
    439 	struct bmac_softc *sc = v;
    440 	int stat;
    441 
    442 	stat = bmac_read_reg(sc, STATUS);
    443 	if (stat == 0)
    444 		return 0;
    445 
    446 #ifdef BMAC_DEBUG
    447 	printf("bmac_intr status = 0x%x\n", stat);
    448 #endif
    449 
    450 	if (stat & IntFrameSent) {
    451 		sc->sc_if.if_flags &= ~IFF_OACTIVE;
    452 		sc->sc_if.if_timer = 0;
    453 		sc->sc_if.if_opackets++;
    454 		bmac_start(&sc->sc_if);
    455 	}
    456 
    457 	/* XXX should do more! */
    458 
    459 	return 1;
    460 }
    461 
    462 int
    463 bmac_rint(v)
    464 	void *v;
    465 {
    466 	struct bmac_softc *sc = v;
    467 	struct ifnet *ifp = &sc->sc_if;
    468 	struct mbuf *m;
    469 	dbdma_command_t *cmd;
    470 	int status, resid, count, datalen;
    471 	int i, n;
    472 	void *data;
    473 
    474 	i = sc->sc_rxlast;
    475 	for (n = 0; n < BMAC_RXBUFS; n++, i++) {
    476 		if (i == BMAC_RXBUFS)
    477 			i = 0;
    478 		cmd = &sc->sc_rxcmd[i];
    479 		status = dbdma_ld16(&cmd->d_status);
    480 		resid = dbdma_ld16(&cmd->d_resid);
    481 
    482 #ifdef BMAC_DEBUG
    483 		if (status != 0 && status != 0x8440 && status != 0x9440)
    484 			printf("bmac_rint status = 0x%x\n", status);
    485 #endif
    486 
    487 		if ((status & DBDMA_CNTRL_ACTIVE) == 0)	/* 0x9440 | 0x8440 */
    488 			continue;
    489 		count = dbdma_ld16(&cmd->d_count);
    490 		datalen = count - resid - 2;		/* 2 == framelen */
    491 		if (datalen < sizeof(struct ether_header)) {
    492 			printf("%s: short packet len = %d\n",
    493 				ifp->if_xname, datalen);
    494 			goto next;
    495 		}
    496 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
    497 		data = sc->sc_rxbuf + BMAC_BUFLEN * i;
    498 
    499 		/* XXX Sometimes bmac reads one extra byte. */
    500 		if (datalen == ETHER_MAX_LEN + 1)
    501 			datalen--;
    502 		m = bmac_get(sc, data, datalen);
    503 
    504 		if (m == NULL) {
    505 			ifp->if_ierrors++;
    506 			goto next;
    507 		}
    508 
    509 #if NBPFILTER > 0
    510 		/*
    511 		 * Check if there's a BPF listener on this interface.
    512 		 * If so, hand off the raw packet to BPF.
    513 		 */
    514 		if (ifp->if_bpf)
    515 			bpf_mtap(ifp->if_bpf, m);
    516 #endif
    517 		(*ifp->if_input)(ifp, m);
    518 		ifp->if_ipackets++;
    519 
    520 next:
    521 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
    522 			DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    523 
    524 		cmd->d_status = 0;
    525 		cmd->d_resid = 0;
    526 		sc->sc_rxlast = i + 1;
    527 	}
    528 	dbdma_continue(sc->sc_rxdma);
    529 
    530 	return 1;
    531 }
    532 
    533 void
    534 bmac_reset(sc)
    535 	struct bmac_softc *sc;
    536 {
    537 	int s;
    538 
    539 	s = splnet();
    540 	bmac_init(sc);
    541 	splx(s);
    542 }
    543 
    544 void
    545 bmac_stop(sc)
    546 	struct bmac_softc *sc;
    547 {
    548 	struct ifnet *ifp = &sc->sc_if;
    549 	int s;
    550 
    551 	s = splnet();
    552 
    553 	callout_stop(&sc->sc_tick_ch);
    554 	mii_down(&sc->sc_mii);
    555 
    556 	/* Disable TX/RX. */
    557 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    558 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    559 
    560 	/* Disable all interrupts. */
    561 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    562 
    563 	dbdma_stop(sc->sc_txdma);
    564 	dbdma_stop(sc->sc_rxdma);
    565 
    566 	ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
    567 	ifp->if_timer = 0;
    568 
    569 	splx(s);
    570 }
    571 
    572 void
    573 bmac_start(ifp)
    574 	struct ifnet *ifp;
    575 {
    576 	struct bmac_softc *sc = ifp->if_softc;
    577 	struct mbuf *m;
    578 	int tlen;
    579 
    580 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
    581 		return;
    582 
    583 	while (1) {
    584 		if (ifp->if_flags & IFF_OACTIVE)
    585 			return;
    586 
    587 		IFQ_DEQUEUE(&ifp->if_snd, m);
    588 		if (m == 0)
    589 			break;
    590 #if NBPFILTER > 0
    591 		/*
    592 		 * If BPF is listening on this interface, let it see the
    593 		 * packet before we commit it to the wire.
    594 		 */
    595 		if (ifp->if_bpf)
    596 			bpf_mtap(ifp->if_bpf, m);
    597 #endif
    598 
    599 		ifp->if_flags |= IFF_OACTIVE;
    600 		tlen = bmac_put(sc, sc->sc_txbuf, m);
    601 
    602 		/* 5 seconds to watch for failing to transmit */
    603 		ifp->if_timer = 5;
    604 		ifp->if_opackets++;		/* # of pkts */
    605 
    606 		bmac_transmit_packet(sc, sc->sc_txbuf, tlen);
    607 	}
    608 }
    609 
    610 void
    611 bmac_transmit_packet(sc, buff, len)
    612 	struct bmac_softc *sc;
    613 	void *buff;
    614 	int len;
    615 {
    616 	dbdma_command_t *cmd = sc->sc_txcmd;
    617 	vaddr_t va = (vaddr_t)buff;
    618 
    619 #ifdef BMAC_DEBUG
    620 	if (vtophys(va) + len - 1 != vtophys(va + len - 1))
    621 		panic("bmac_transmit_packet");
    622 #endif
    623 
    624 	DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
    625 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    626 	cmd++;
    627 	DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
    628 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    629 
    630 	dbdma_start(sc->sc_txdma, sc->sc_txcmd);
    631 }
    632 
    633 int
    634 bmac_put(sc, buff, m)
    635 	struct bmac_softc *sc;
    636 	caddr_t buff;
    637 	struct mbuf *m;
    638 {
    639 	struct mbuf *n;
    640 	int len, tlen = 0;
    641 
    642 	for (; m; m = n) {
    643 		len = m->m_len;
    644 		if (len == 0) {
    645 			MFREE(m, n);
    646 			continue;
    647 		}
    648 		memcpy(buff, mtod(m, caddr_t), len);
    649 		buff += len;
    650 		tlen += len;
    651 		MFREE(m, n);
    652 	}
    653 	if (tlen > NBPG)
    654 		panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
    655 
    656 	return tlen;
    657 }
    658 
    659 struct mbuf *
    660 bmac_get(sc, pkt, totlen)
    661 	struct bmac_softc *sc;
    662 	caddr_t pkt;
    663 	int totlen;
    664 {
    665 	struct mbuf *m;
    666 	struct mbuf *top, **mp;
    667 	int len;
    668 
    669 	MGETHDR(m, M_DONTWAIT, MT_DATA);
    670 	if (m == 0)
    671 		return 0;
    672 	m->m_flags |= M_HASFCS;
    673 	m->m_pkthdr.rcvif = &sc->sc_if;
    674 	m->m_pkthdr.len = totlen;
    675 	len = MHLEN;
    676 	top = 0;
    677 	mp = &top;
    678 
    679 	while (totlen > 0) {
    680 		if (top) {
    681 			MGET(m, M_DONTWAIT, MT_DATA);
    682 			if (m == 0) {
    683 				m_freem(top);
    684 				return 0;
    685 			}
    686 			len = MLEN;
    687 		}
    688 		if (totlen >= MINCLSIZE) {
    689 			MCLGET(m, M_DONTWAIT);
    690 			if ((m->m_flags & M_EXT) == 0) {
    691 				m_free(m);
    692 				m_freem(top);
    693 				return 0;
    694 			}
    695 			len = MCLBYTES;
    696 		}
    697 		m->m_len = len = min(totlen, len);
    698 		memcpy(mtod(m, caddr_t), pkt, len);
    699 		pkt += len;
    700 		totlen -= len;
    701 		*mp = m;
    702 		mp = &m->m_next;
    703 	}
    704 
    705 	return top;
    706 }
    707 
    708 void
    709 bmac_watchdog(ifp)
    710 	struct ifnet *ifp;
    711 {
    712 	struct bmac_softc *sc = ifp->if_softc;
    713 
    714 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    715 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    716 
    717 	printf("%s: device timeout\n", ifp->if_xname);
    718 	ifp->if_oerrors++;
    719 
    720 	bmac_reset(sc);
    721 }
    722 
    723 int
    724 bmac_ioctl(ifp, cmd, data)
    725 	struct ifnet *ifp;
    726 	u_long cmd;
    727 	caddr_t data;
    728 {
    729 	struct bmac_softc *sc = ifp->if_softc;
    730 	struct ifaddr *ifa = (struct ifaddr *)data;
    731 	struct ifreq *ifr = (struct ifreq *)data;
    732 	int s, error = 0;
    733 
    734 	s = splnet();
    735 
    736 	switch (cmd) {
    737 
    738 	case SIOCSIFADDR:
    739 		ifp->if_flags |= IFF_UP;
    740 
    741 		switch (ifa->ifa_addr->sa_family) {
    742 #ifdef INET
    743 		case AF_INET:
    744 			bmac_init(sc);
    745 			arp_ifinit(ifp, ifa);
    746 			break;
    747 #endif
    748 #ifdef NS
    749 		case AF_NS:
    750 		    {
    751 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
    752 
    753 			if (ns_nullhost(*ina))
    754 				ina->x_host =
    755 				    *(union ns_host *)LLADDR(ifp->if_sadl);
    756 			else {
    757 				memcpy(LLADDR(ifp->if_sadl),
    758 				    ina->x_host.c_host,
    759 				    sizeof(sc->sc_enaddr));
    760 			}
    761 			/* Set new address. */
    762 			bmac_init(sc);
    763 			break;
    764 		    }
    765 #endif
    766 		default:
    767 			bmac_init(sc);
    768 			break;
    769 		}
    770 		break;
    771 
    772 	case SIOCSIFFLAGS:
    773 		if ((ifp->if_flags & IFF_UP) == 0 &&
    774 		    (ifp->if_flags & IFF_RUNNING) != 0) {
    775 			/*
    776 			 * If interface is marked down and it is running, then
    777 			 * stop it.
    778 			 */
    779 			bmac_stop(sc);
    780 			ifp->if_flags &= ~IFF_RUNNING;
    781 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
    782 		    (ifp->if_flags & IFF_RUNNING) == 0) {
    783 			/*
    784 			 * If interface is marked up and it is stopped, then
    785 			 * start it.
    786 			 */
    787 			bmac_init(sc);
    788 		} else {
    789 			/*
    790 			 * Reset the interface to pick up changes in any other
    791 			 * flags that affect hardware registers.
    792 			 */
    793 			/*bmac_stop(sc);*/
    794 			bmac_init(sc);
    795 		}
    796 #ifdef BMAC_DEBUG
    797 		if (ifp->if_flags & IFF_DEBUG)
    798 			sc->sc_flags |= BMAC_DEBUGFLAG;
    799 #endif
    800 		break;
    801 
    802 	case SIOCADDMULTI:
    803 	case SIOCDELMULTI:
    804 		error = (cmd == SIOCADDMULTI) ?
    805 		    ether_addmulti(ifr, &sc->sc_ethercom) :
    806 		    ether_delmulti(ifr, &sc->sc_ethercom);
    807 
    808 		if (error == ENETRESET) {
    809 			/*
    810 			 * Multicast list has changed; set the hardware filter
    811 			 * accordingly.
    812 			 */
    813 			bmac_init(sc);
    814 			bmac_setladrf(sc);
    815 			error = 0;
    816 		}
    817 		break;
    818 
    819 	case SIOCGIFMEDIA:
    820 	case SIOCSIFMEDIA:
    821 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
    822 		break;
    823 
    824 	default:
    825 		error = EINVAL;
    826 	}
    827 
    828 	splx(s);
    829 	return error;
    830 }
    831 
    832 int
    833 bmac_mediachange(ifp)
    834 	struct ifnet *ifp;
    835 {
    836 	struct bmac_softc *sc = ifp->if_softc;
    837 
    838 	return mii_mediachg(&sc->sc_mii);
    839 }
    840 
    841 void
    842 bmac_mediastatus(ifp, ifmr)
    843 	struct ifnet *ifp;
    844 	struct ifmediareq *ifmr;
    845 {
    846 	struct bmac_softc *sc = ifp->if_softc;
    847 
    848 	mii_pollstat(&sc->sc_mii);
    849 
    850 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
    851 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
    852 }
    853 
    854 /*
    855  * Set up the logical address filter.
    856  */
    857 void
    858 bmac_setladrf(sc)
    859 	struct bmac_softc *sc;
    860 {
    861 	struct ifnet *ifp = &sc->sc_if;
    862 	struct ether_multi *enm;
    863 	struct ether_multistep step;
    864 	u_int32_t crc;
    865 	u_int16_t hash[4];
    866 	int x;
    867 
    868 	/*
    869 	 * Set up multicast address filter by passing all multicast addresses
    870 	 * through a crc generator, and then using the high order 6 bits as an
    871 	 * index into the 64 bit logical address filter.  The high order bit
    872 	 * selects the word, while the rest of the bits select the bit within
    873 	 * the word.
    874 	 */
    875 
    876 	if (ifp->if_flags & IFF_PROMISC) {
    877 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    878 		return;
    879 	}
    880 
    881 	if (ifp->if_flags & IFF_ALLMULTI) {
    882 		hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    883 		goto chipit;
    884 	}
    885 
    886 	hash[3] = hash[2] = hash[1] = hash[0] = 0;
    887 
    888 	ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
    889 	while (enm != NULL) {
    890 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
    891 			/*
    892 			 * We must listen to a range of multicast addresses.
    893 			 * For now, just accept all multicasts, rather than
    894 			 * trying to set only those filter bits needed to match
    895 			 * the range.  (At this time, the only use of address
    896 			 * ranges is for IP multicast routing, for which the
    897 			 * range is big enough to require all bits set.)
    898 			 */
    899 			hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    900 			ifp->if_flags |= IFF_ALLMULTI;
    901 			goto chipit;
    902 		}
    903 
    904 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
    905 
    906 		/* Just want the 6 most significant bits. */
    907 		crc >>= 26;
    908 
    909 		/* Set the corresponding bit in the filter. */
    910 		hash[crc >> 4] |= 1 << (crc & 0xf);
    911 
    912 		ETHER_NEXT_MULTI(step, enm);
    913 	}
    914 
    915 	ifp->if_flags &= ~IFF_ALLMULTI;
    916 
    917 chipit:
    918 	bmac_write_reg(sc, HASH0, hash[0]);
    919 	bmac_write_reg(sc, HASH1, hash[1]);
    920 	bmac_write_reg(sc, HASH2, hash[2]);
    921 	bmac_write_reg(sc, HASH3, hash[3]);
    922 	x = bmac_read_reg(sc, RXCFG);
    923 	x &= ~RxPromiscEnable;
    924 	x |= RxHashFilterEnable;
    925 	bmac_write_reg(sc, RXCFG, x);
    926 }
    927 
    928 int
    929 bmac_mii_readreg(dev, phy, reg)
    930 	struct device *dev;
    931 	int phy, reg;
    932 {
    933 	return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg);
    934 }
    935 
    936 void
    937 bmac_mii_writereg(dev, phy, reg, val)
    938 	struct device *dev;
    939 	int phy, reg, val;
    940 {
    941 	mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val);
    942 }
    943 
    944 u_int32_t
    945 bmac_mbo_read(dev)
    946 	struct device *dev;
    947 {
    948 	struct bmac_softc *sc = (void *)dev;
    949 
    950 	return bmac_read_reg(sc, MIFCSR);
    951 }
    952 
    953 void
    954 bmac_mbo_write(dev, val)
    955 	struct device *dev;
    956 	u_int32_t val;
    957 {
    958 	struct bmac_softc *sc = (void *)dev;
    959 
    960 	bmac_write_reg(sc, MIFCSR, val);
    961 }
    962 
    963 void
    964 bmac_mii_statchg(dev)
    965 	struct device *dev;
    966 {
    967 	struct bmac_softc *sc = (void *)dev;
    968 	int x;
    969 
    970 	/* Update duplex mode in TX configuration */
    971 	x = bmac_read_reg(sc, TXCFG);
    972 	if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
    973 		x |= TxFullDuplex;
    974 	else
    975 		x &= ~TxFullDuplex;
    976 	bmac_write_reg(sc, TXCFG, x);
    977 
    978 #ifdef BMAC_DEBUG
    979 	printf("bmac_mii_statchg 0x%x\n",
    980 		IFM_OPTIONS(sc->sc_mii.mii_media_active));
    981 #endif
    982 }
    983 
    984 void
    985 bmac_mii_tick(v)
    986 	void *v;
    987 {
    988 	struct bmac_softc *sc = v;
    989 	int s;
    990 
    991 	s = splnet();
    992 	mii_tick(&sc->sc_mii);
    993 	splx(s);
    994 
    995 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    996 }
    997