if_bm.c revision 1.20.2.1
1 /* $NetBSD: if_bm.c,v 1.20.2.1 2004/08/03 10:37:20 skrll Exp $ */ 2 3 /*- 4 * Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.20.2.1 2004/08/03 10:37:20 skrll Exp $"); 31 32 #include "opt_inet.h" 33 #include "opt_ns.h" 34 #include "bpfilter.h" 35 36 #include <sys/param.h> 37 #include <sys/device.h> 38 #include <sys/ioctl.h> 39 #include <sys/kernel.h> 40 #include <sys/mbuf.h> 41 #include <sys/socket.h> 42 #include <sys/systm.h> 43 #include <sys/callout.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_ether.h> 50 #include <net/if_media.h> 51 52 #if NBPFILTER > 0 53 #include <net/bpf.h> 54 #endif 55 56 #ifdef INET 57 #include <netinet/in.h> 58 #include <netinet/if_inarp.h> 59 #endif 60 61 #ifdef NS 62 #include <netns/ns.h> 63 #include <netns/ns_if.h> 64 #endif 65 66 #include <dev/ofw/openfirm.h> 67 68 #include <dev/mii/mii.h> 69 #include <dev/mii/miivar.h> 70 #include <dev/mii/mii_bitbang.h> 71 72 #include <machine/autoconf.h> 73 #include <machine/pio.h> 74 75 #include <macppc/dev/dbdma.h> 76 #include <macppc/dev/if_bmreg.h> 77 78 #define BMAC_TXBUFS 2 79 #define BMAC_RXBUFS 16 80 #define BMAC_BUFLEN 2048 81 82 struct bmac_softc { 83 struct device sc_dev; 84 struct ethercom sc_ethercom; 85 #define sc_if sc_ethercom.ec_if 86 struct callout sc_tick_ch; 87 vaddr_t sc_regs; 88 dbdma_regmap_t *sc_txdma; 89 dbdma_regmap_t *sc_rxdma; 90 dbdma_command_t *sc_txcmd; 91 dbdma_command_t *sc_rxcmd; 92 caddr_t sc_txbuf; 93 caddr_t sc_rxbuf; 94 int sc_rxlast; 95 int sc_flags; 96 struct mii_data sc_mii; 97 u_char sc_enaddr[6]; 98 }; 99 100 #define BMAC_BMACPLUS 0x01 101 #define BMAC_DEBUGFLAG 0x02 102 103 extern u_int *heathrow_FCR; 104 105 static __inline int bmac_read_reg __P((struct bmac_softc *, int)); 106 static __inline void bmac_write_reg __P((struct bmac_softc *, int, int)); 107 static __inline void bmac_set_bits __P((struct bmac_softc *, int, int)); 108 static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int)); 109 110 int bmac_match __P((struct device *, struct cfdata *, void *)); 111 void bmac_attach __P((struct device *, struct device *, void *)); 112 void bmac_reset_chip __P((struct bmac_softc *)); 113 void bmac_init __P((struct bmac_softc *)); 114 void bmac_init_dma __P((struct bmac_softc *)); 115 int bmac_intr __P((void *)); 116 int bmac_rint __P((void *)); 117 void bmac_reset __P((struct bmac_softc *)); 118 void bmac_stop __P((struct bmac_softc *)); 119 void bmac_start __P((struct ifnet *)); 120 void bmac_transmit_packet __P((struct bmac_softc *, void *, int)); 121 int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *)); 122 struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int)); 123 void bmac_watchdog __P((struct ifnet *)); 124 int bmac_ioctl __P((struct ifnet *, u_long, caddr_t)); 125 int bmac_mediachange __P((struct ifnet *)); 126 void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *)); 127 void bmac_setladrf __P((struct bmac_softc *)); 128 129 int bmac_mii_readreg __P((struct device *, int, int)); 130 void bmac_mii_writereg __P((struct device *, int, int, int)); 131 void bmac_mii_statchg __P((struct device *)); 132 void bmac_mii_tick __P((void *)); 133 u_int32_t bmac_mbo_read __P((struct device *)); 134 void bmac_mbo_write __P((struct device *, u_int32_t)); 135 136 CFATTACH_DECL(bm, sizeof(struct bmac_softc), 137 bmac_match, bmac_attach, NULL, NULL); 138 139 struct mii_bitbang_ops bmac_mbo = { 140 bmac_mbo_read, bmac_mbo_write, 141 { MIFDO, MIFDI, MIFDC, MIFDIR, 0 } 142 }; 143 144 int 145 bmac_read_reg(sc, off) 146 struct bmac_softc *sc; 147 int off; 148 { 149 return in16rb(sc->sc_regs + off); 150 } 151 152 void 153 bmac_write_reg(sc, off, val) 154 struct bmac_softc *sc; 155 int off, val; 156 { 157 out16rb(sc->sc_regs + off, val); 158 } 159 160 void 161 bmac_set_bits(sc, off, val) 162 struct bmac_softc *sc; 163 int off, val; 164 { 165 val |= bmac_read_reg(sc, off); 166 bmac_write_reg(sc, off, val); 167 } 168 169 void 170 bmac_reset_bits(sc, off, val) 171 struct bmac_softc *sc; 172 int off, val; 173 { 174 bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val); 175 } 176 177 int 178 bmac_match(parent, cf, aux) 179 struct device *parent; 180 struct cfdata *cf; 181 void *aux; 182 { 183 struct confargs *ca = aux; 184 185 if (ca->ca_nreg < 24 || ca->ca_nintr < 12) 186 return 0; 187 188 if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */ 189 return 1; 190 if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */ 191 return 1; 192 193 return 0; 194 } 195 196 void 197 bmac_attach(parent, self, aux) 198 struct device *parent, *self; 199 void *aux; 200 { 201 struct confargs *ca = aux; 202 struct bmac_softc *sc = (void *)self; 203 struct ifnet *ifp = &sc->sc_if; 204 struct mii_data *mii = &sc->sc_mii; 205 u_char laddr[6]; 206 207 callout_init(&sc->sc_tick_ch); 208 209 sc->sc_flags =0; 210 if (strcmp(ca->ca_name, "ethernet") == 0) { 211 char name[64]; 212 213 memset(name, 0, 64); 214 OF_package_to_path(ca->ca_node, name, sizeof(name)); 215 OF_open(name); 216 sc->sc_flags |= BMAC_BMACPLUS; 217 } 218 219 ca->ca_reg[0] += ca->ca_baseaddr; 220 ca->ca_reg[2] += ca->ca_baseaddr; 221 ca->ca_reg[4] += ca->ca_baseaddr; 222 223 sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], PAGE_SIZE); 224 225 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 226 227 if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 && 228 OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) { 229 printf(": cannot get mac-address\n"); 230 return; 231 } 232 memcpy(sc->sc_enaddr, laddr, 6); 233 234 sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE); 235 sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE); 236 sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t)); 237 sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 238 sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT); 239 sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT); 240 if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL || 241 sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) { 242 printf("cannot allocate memory\n"); 243 return; 244 } 245 246 printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2], 247 ether_sprintf(laddr)); 248 249 intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc); 250 intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc); 251 252 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 253 ifp->if_softc = sc; 254 ifp->if_ioctl = bmac_ioctl; 255 ifp->if_start = bmac_start; 256 ifp->if_flags = 257 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 258 ifp->if_watchdog = bmac_watchdog; 259 IFQ_SET_READY(&ifp->if_snd); 260 261 mii->mii_ifp = ifp; 262 mii->mii_readreg = bmac_mii_readreg; 263 mii->mii_writereg = bmac_mii_writereg; 264 mii->mii_statchg = bmac_mii_statchg; 265 266 ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus); 267 mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, 268 MII_OFFSET_ANY, 0); 269 270 /* Choose a default media. */ 271 if (LIST_FIRST(&mii->mii_phys) == NULL) { 272 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL); 273 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T); 274 } else 275 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 276 277 bmac_reset_chip(sc); 278 279 if_attach(ifp); 280 ether_ifattach(ifp, sc->sc_enaddr); 281 } 282 283 /* 284 * Reset and enable bmac by heathrow FCR. 285 */ 286 void 287 bmac_reset_chip(sc) 288 struct bmac_softc *sc; 289 { 290 u_int v; 291 292 dbdma_reset(sc->sc_txdma); 293 dbdma_reset(sc->sc_rxdma); 294 295 v = in32rb(heathrow_FCR); 296 297 v |= EnetEnable; 298 out32rb(heathrow_FCR, v); 299 delay(50000); 300 301 v |= ResetEnetCell; 302 out32rb(heathrow_FCR, v); 303 delay(50000); 304 305 v &= ~ResetEnetCell; 306 out32rb(heathrow_FCR, v); 307 delay(50000); 308 309 out32rb(heathrow_FCR, v); 310 } 311 312 void 313 bmac_init(sc) 314 struct bmac_softc *sc; 315 { 316 struct ifnet *ifp = &sc->sc_if; 317 struct ether_header *eh; 318 caddr_t data; 319 int i, tb, bmcr; 320 u_short *p; 321 322 bmac_reset_chip(sc); 323 324 /* XXX */ 325 bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR); 326 bmcr &= ~BMCR_ISO; 327 bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr); 328 329 bmac_write_reg(sc, RXRST, RxResetValue); 330 bmac_write_reg(sc, TXRST, TxResetBit); 331 332 /* Wait for reset completion. */ 333 for (i = 1000; i > 0; i -= 10) { 334 if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0) 335 break; 336 delay(10); 337 } 338 if (i <= 0) 339 printf("%s: reset timeout\n", ifp->if_xname); 340 341 if (! (sc->sc_flags & BMAC_BMACPLUS)) 342 bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow); 343 344 __asm __volatile ("mftb %0" : "=r"(tb)); 345 bmac_write_reg(sc, RSEED, tb); 346 bmac_set_bits(sc, XIFC, TxOutputEnable); 347 bmac_read_reg(sc, PAREG); 348 349 /* Reset various counters. */ 350 bmac_write_reg(sc, NCCNT, 0); 351 bmac_write_reg(sc, NTCNT, 0); 352 bmac_write_reg(sc, EXCNT, 0); 353 bmac_write_reg(sc, LTCNT, 0); 354 bmac_write_reg(sc, FRCNT, 0); 355 bmac_write_reg(sc, LECNT, 0); 356 bmac_write_reg(sc, AECNT, 0); 357 bmac_write_reg(sc, FECNT, 0); 358 bmac_write_reg(sc, RXCV, 0); 359 360 /* Set tx fifo information. */ 361 bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */ 362 363 bmac_write_reg(sc, TXFIFOCSR, 0); 364 bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable); 365 366 /* Set rx fifo information. */ 367 bmac_write_reg(sc, RXFIFOCSR, 0); 368 bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable); 369 370 /* Clear status register. */ 371 bmac_read_reg(sc, STATUS); 372 373 bmac_write_reg(sc, HASH3, 0); 374 bmac_write_reg(sc, HASH2, 0); 375 bmac_write_reg(sc, HASH1, 0); 376 bmac_write_reg(sc, HASH0, 0); 377 378 /* Set MAC address. */ 379 p = (u_short *)sc->sc_enaddr; 380 bmac_write_reg(sc, MADD0, *p++); 381 bmac_write_reg(sc, MADD1, *p++); 382 bmac_write_reg(sc, MADD2, *p); 383 384 bmac_write_reg(sc, RXCFG, 385 RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets); 386 387 if (ifp->if_flags & IFF_PROMISC) 388 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 389 390 bmac_init_dma(sc); 391 392 /* Enable TX/RX */ 393 bmac_set_bits(sc, RXCFG, RxMACEnable); 394 bmac_set_bits(sc, TXCFG, TxMACEnable); 395 396 bmac_write_reg(sc, INTDISABLE, NormalIntEvents); 397 398 ifp->if_flags |= IFF_RUNNING; 399 ifp->if_flags &= ~IFF_OACTIVE; 400 ifp->if_timer = 0; 401 402 data = sc->sc_txbuf; 403 eh = (struct ether_header *)data; 404 405 memset(data, 0, sizeof(eh) + ETHERMIN); 406 memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN); 407 memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN); 408 bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN); 409 410 bmac_start(ifp); 411 412 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 413 } 414 415 void 416 bmac_init_dma(sc) 417 struct bmac_softc *sc; 418 { 419 dbdma_command_t *cmd = sc->sc_rxcmd; 420 int i; 421 422 dbdma_reset(sc->sc_txdma); 423 dbdma_reset(sc->sc_rxdma); 424 425 memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t)); 426 memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t)); 427 428 for (i = 0; i < BMAC_RXBUFS; i++) { 429 DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN, 430 vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i), 431 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 432 cmd++; 433 } 434 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 435 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 436 dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd)); 437 438 sc->sc_rxlast = 0; 439 440 dbdma_start(sc->sc_rxdma, sc->sc_rxcmd); 441 } 442 443 int 444 bmac_intr(v) 445 void *v; 446 { 447 struct bmac_softc *sc = v; 448 int stat; 449 450 stat = bmac_read_reg(sc, STATUS); 451 if (stat == 0) 452 return 0; 453 454 #ifdef BMAC_DEBUG 455 printf("bmac_intr status = 0x%x\n", stat); 456 #endif 457 458 if (stat & IntFrameSent) { 459 sc->sc_if.if_flags &= ~IFF_OACTIVE; 460 sc->sc_if.if_timer = 0; 461 sc->sc_if.if_opackets++; 462 bmac_start(&sc->sc_if); 463 } 464 465 /* XXX should do more! */ 466 467 return 1; 468 } 469 470 int 471 bmac_rint(v) 472 void *v; 473 { 474 struct bmac_softc *sc = v; 475 struct ifnet *ifp = &sc->sc_if; 476 struct mbuf *m; 477 dbdma_command_t *cmd; 478 int status, resid, count, datalen; 479 int i, n; 480 void *data; 481 482 i = sc->sc_rxlast; 483 for (n = 0; n < BMAC_RXBUFS; n++, i++) { 484 if (i == BMAC_RXBUFS) 485 i = 0; 486 cmd = &sc->sc_rxcmd[i]; 487 status = dbdma_ld16(&cmd->d_status); 488 resid = dbdma_ld16(&cmd->d_resid); 489 490 #ifdef BMAC_DEBUG 491 if (status != 0 && status != 0x8440 && status != 0x9440) 492 printf("bmac_rint status = 0x%x\n", status); 493 #endif 494 495 if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */ 496 continue; 497 count = dbdma_ld16(&cmd->d_count); 498 datalen = count - resid - 2; /* 2 == framelen */ 499 if (datalen < sizeof(struct ether_header)) { 500 printf("%s: short packet len = %d\n", 501 ifp->if_xname, datalen); 502 goto next; 503 } 504 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); 505 data = sc->sc_rxbuf + BMAC_BUFLEN * i; 506 507 /* XXX Sometimes bmac reads one extra byte. */ 508 if (datalen == ETHER_MAX_LEN + 1) 509 datalen--; 510 m = bmac_get(sc, data, datalen); 511 512 if (m == NULL) { 513 ifp->if_ierrors++; 514 goto next; 515 } 516 517 #if NBPFILTER > 0 518 /* 519 * Check if there's a BPF listener on this interface. 520 * If so, hand off the raw packet to BPF. 521 */ 522 if (ifp->if_bpf) 523 bpf_mtap(ifp->if_bpf, m); 524 #endif 525 (*ifp->if_input)(ifp, m); 526 ifp->if_ipackets++; 527 528 next: 529 DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, 530 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 531 532 cmd->d_status = 0; 533 cmd->d_resid = 0; 534 sc->sc_rxlast = i + 1; 535 } 536 dbdma_continue(sc->sc_rxdma); 537 538 return 1; 539 } 540 541 void 542 bmac_reset(sc) 543 struct bmac_softc *sc; 544 { 545 int s; 546 547 s = splnet(); 548 bmac_init(sc); 549 splx(s); 550 } 551 552 void 553 bmac_stop(sc) 554 struct bmac_softc *sc; 555 { 556 struct ifnet *ifp = &sc->sc_if; 557 int s; 558 559 s = splnet(); 560 561 callout_stop(&sc->sc_tick_ch); 562 mii_down(&sc->sc_mii); 563 564 /* Disable TX/RX. */ 565 bmac_reset_bits(sc, TXCFG, TxMACEnable); 566 bmac_reset_bits(sc, RXCFG, RxMACEnable); 567 568 /* Disable all interrupts. */ 569 bmac_write_reg(sc, INTDISABLE, NoEventsMask); 570 571 dbdma_stop(sc->sc_txdma); 572 dbdma_stop(sc->sc_rxdma); 573 574 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 575 ifp->if_timer = 0; 576 577 splx(s); 578 } 579 580 void 581 bmac_start(ifp) 582 struct ifnet *ifp; 583 { 584 struct bmac_softc *sc = ifp->if_softc; 585 struct mbuf *m; 586 int tlen; 587 588 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 589 return; 590 591 while (1) { 592 if (ifp->if_flags & IFF_OACTIVE) 593 return; 594 595 IFQ_DEQUEUE(&ifp->if_snd, m); 596 if (m == 0) 597 break; 598 #if NBPFILTER > 0 599 /* 600 * If BPF is listening on this interface, let it see the 601 * packet before we commit it to the wire. 602 */ 603 if (ifp->if_bpf) 604 bpf_mtap(ifp->if_bpf, m); 605 #endif 606 607 ifp->if_flags |= IFF_OACTIVE; 608 tlen = bmac_put(sc, sc->sc_txbuf, m); 609 610 /* 5 seconds to watch for failing to transmit */ 611 ifp->if_timer = 5; 612 ifp->if_opackets++; /* # of pkts */ 613 614 bmac_transmit_packet(sc, sc->sc_txbuf, tlen); 615 } 616 } 617 618 void 619 bmac_transmit_packet(sc, buff, len) 620 struct bmac_softc *sc; 621 void *buff; 622 int len; 623 { 624 dbdma_command_t *cmd = sc->sc_txcmd; 625 vaddr_t va = (vaddr_t)buff; 626 627 #ifdef BMAC_DEBUG 628 if (vtophys(va) + len - 1 != vtophys(va + len - 1)) 629 panic("bmac_transmit_packet"); 630 #endif 631 632 DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va), 633 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 634 cmd++; 635 DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 636 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 637 638 dbdma_start(sc->sc_txdma, sc->sc_txcmd); 639 } 640 641 int 642 bmac_put(sc, buff, m) 643 struct bmac_softc *sc; 644 caddr_t buff; 645 struct mbuf *m; 646 { 647 struct mbuf *n; 648 int len, tlen = 0; 649 650 for (; m; m = n) { 651 len = m->m_len; 652 if (len == 0) { 653 MFREE(m, n); 654 continue; 655 } 656 memcpy(buff, mtod(m, caddr_t), len); 657 buff += len; 658 tlen += len; 659 MFREE(m, n); 660 } 661 if (tlen > PAGE_SIZE) 662 panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname); 663 664 return tlen; 665 } 666 667 struct mbuf * 668 bmac_get(sc, pkt, totlen) 669 struct bmac_softc *sc; 670 caddr_t pkt; 671 int totlen; 672 { 673 struct mbuf *m; 674 struct mbuf *top, **mp; 675 int len; 676 677 MGETHDR(m, M_DONTWAIT, MT_DATA); 678 if (m == 0) 679 return 0; 680 m->m_flags |= M_HASFCS; 681 m->m_pkthdr.rcvif = &sc->sc_if; 682 m->m_pkthdr.len = totlen; 683 len = MHLEN; 684 top = 0; 685 mp = ⊤ 686 687 while (totlen > 0) { 688 if (top) { 689 MGET(m, M_DONTWAIT, MT_DATA); 690 if (m == 0) { 691 m_freem(top); 692 return 0; 693 } 694 len = MLEN; 695 } 696 if (totlen >= MINCLSIZE) { 697 MCLGET(m, M_DONTWAIT); 698 if ((m->m_flags & M_EXT) == 0) { 699 m_free(m); 700 m_freem(top); 701 return 0; 702 } 703 len = MCLBYTES; 704 } 705 m->m_len = len = min(totlen, len); 706 memcpy(mtod(m, caddr_t), pkt, len); 707 pkt += len; 708 totlen -= len; 709 *mp = m; 710 mp = &m->m_next; 711 } 712 713 return top; 714 } 715 716 void 717 bmac_watchdog(ifp) 718 struct ifnet *ifp; 719 { 720 struct bmac_softc *sc = ifp->if_softc; 721 722 bmac_reset_bits(sc, RXCFG, RxMACEnable); 723 bmac_reset_bits(sc, TXCFG, TxMACEnable); 724 725 printf("%s: device timeout\n", ifp->if_xname); 726 ifp->if_oerrors++; 727 728 bmac_reset(sc); 729 } 730 731 int 732 bmac_ioctl(ifp, cmd, data) 733 struct ifnet *ifp; 734 u_long cmd; 735 caddr_t data; 736 { 737 struct bmac_softc *sc = ifp->if_softc; 738 struct ifaddr *ifa = (struct ifaddr *)data; 739 struct ifreq *ifr = (struct ifreq *)data; 740 int s, error = 0; 741 742 s = splnet(); 743 744 switch (cmd) { 745 746 case SIOCSIFADDR: 747 ifp->if_flags |= IFF_UP; 748 749 switch (ifa->ifa_addr->sa_family) { 750 #ifdef INET 751 case AF_INET: 752 bmac_init(sc); 753 arp_ifinit(ifp, ifa); 754 break; 755 #endif 756 #ifdef NS 757 case AF_NS: 758 { 759 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 760 761 if (ns_nullhost(*ina)) 762 ina->x_host = 763 *(union ns_host *)LLADDR(ifp->if_sadl); 764 else { 765 memcpy(LLADDR(ifp->if_sadl), 766 ina->x_host.c_host, 767 sizeof(sc->sc_enaddr)); 768 } 769 /* Set new address. */ 770 bmac_init(sc); 771 break; 772 } 773 #endif 774 default: 775 bmac_init(sc); 776 break; 777 } 778 break; 779 780 case SIOCSIFFLAGS: 781 if ((ifp->if_flags & IFF_UP) == 0 && 782 (ifp->if_flags & IFF_RUNNING) != 0) { 783 /* 784 * If interface is marked down and it is running, then 785 * stop it. 786 */ 787 bmac_stop(sc); 788 ifp->if_flags &= ~IFF_RUNNING; 789 } else if ((ifp->if_flags & IFF_UP) != 0 && 790 (ifp->if_flags & IFF_RUNNING) == 0) { 791 /* 792 * If interface is marked up and it is stopped, then 793 * start it. 794 */ 795 bmac_init(sc); 796 } else { 797 /* 798 * Reset the interface to pick up changes in any other 799 * flags that affect hardware registers. 800 */ 801 /*bmac_stop(sc);*/ 802 bmac_init(sc); 803 } 804 #ifdef BMAC_DEBUG 805 if (ifp->if_flags & IFF_DEBUG) 806 sc->sc_flags |= BMAC_DEBUGFLAG; 807 #endif 808 break; 809 810 case SIOCADDMULTI: 811 case SIOCDELMULTI: 812 error = (cmd == SIOCADDMULTI) ? 813 ether_addmulti(ifr, &sc->sc_ethercom) : 814 ether_delmulti(ifr, &sc->sc_ethercom); 815 816 if (error == ENETRESET) { 817 /* 818 * Multicast list has changed; set the hardware filter 819 * accordingly. 820 */ 821 bmac_init(sc); 822 bmac_setladrf(sc); 823 error = 0; 824 } 825 break; 826 827 case SIOCGIFMEDIA: 828 case SIOCSIFMEDIA: 829 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 830 break; 831 832 default: 833 error = EINVAL; 834 } 835 836 splx(s); 837 return error; 838 } 839 840 int 841 bmac_mediachange(ifp) 842 struct ifnet *ifp; 843 { 844 struct bmac_softc *sc = ifp->if_softc; 845 846 return mii_mediachg(&sc->sc_mii); 847 } 848 849 void 850 bmac_mediastatus(ifp, ifmr) 851 struct ifnet *ifp; 852 struct ifmediareq *ifmr; 853 { 854 struct bmac_softc *sc = ifp->if_softc; 855 856 mii_pollstat(&sc->sc_mii); 857 858 ifmr->ifm_status = sc->sc_mii.mii_media_status; 859 ifmr->ifm_active = sc->sc_mii.mii_media_active; 860 } 861 862 /* 863 * Set up the logical address filter. 864 */ 865 void 866 bmac_setladrf(sc) 867 struct bmac_softc *sc; 868 { 869 struct ifnet *ifp = &sc->sc_if; 870 struct ether_multi *enm; 871 struct ether_multistep step; 872 u_int32_t crc; 873 u_int16_t hash[4]; 874 int x; 875 876 /* 877 * Set up multicast address filter by passing all multicast addresses 878 * through a crc generator, and then using the high order 6 bits as an 879 * index into the 64 bit logical address filter. The high order bit 880 * selects the word, while the rest of the bits select the bit within 881 * the word. 882 */ 883 884 if (ifp->if_flags & IFF_PROMISC) { 885 bmac_set_bits(sc, RXCFG, RxPromiscEnable); 886 return; 887 } 888 889 if (ifp->if_flags & IFF_ALLMULTI) { 890 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 891 goto chipit; 892 } 893 894 hash[3] = hash[2] = hash[1] = hash[0] = 0; 895 896 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 897 while (enm != NULL) { 898 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 899 /* 900 * We must listen to a range of multicast addresses. 901 * For now, just accept all multicasts, rather than 902 * trying to set only those filter bits needed to match 903 * the range. (At this time, the only use of address 904 * ranges is for IP multicast routing, for which the 905 * range is big enough to require all bits set.) 906 */ 907 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 908 ifp->if_flags |= IFF_ALLMULTI; 909 goto chipit; 910 } 911 912 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 913 914 /* Just want the 6 most significant bits. */ 915 crc >>= 26; 916 917 /* Set the corresponding bit in the filter. */ 918 hash[crc >> 4] |= 1 << (crc & 0xf); 919 920 ETHER_NEXT_MULTI(step, enm); 921 } 922 923 ifp->if_flags &= ~IFF_ALLMULTI; 924 925 chipit: 926 bmac_write_reg(sc, HASH0, hash[0]); 927 bmac_write_reg(sc, HASH1, hash[1]); 928 bmac_write_reg(sc, HASH2, hash[2]); 929 bmac_write_reg(sc, HASH3, hash[3]); 930 x = bmac_read_reg(sc, RXCFG); 931 x &= ~RxPromiscEnable; 932 x |= RxHashFilterEnable; 933 bmac_write_reg(sc, RXCFG, x); 934 } 935 936 int 937 bmac_mii_readreg(dev, phy, reg) 938 struct device *dev; 939 int phy, reg; 940 { 941 return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg); 942 } 943 944 void 945 bmac_mii_writereg(dev, phy, reg, val) 946 struct device *dev; 947 int phy, reg, val; 948 { 949 mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val); 950 } 951 952 u_int32_t 953 bmac_mbo_read(dev) 954 struct device *dev; 955 { 956 struct bmac_softc *sc = (void *)dev; 957 958 return bmac_read_reg(sc, MIFCSR); 959 } 960 961 void 962 bmac_mbo_write(dev, val) 963 struct device *dev; 964 u_int32_t val; 965 { 966 struct bmac_softc *sc = (void *)dev; 967 968 bmac_write_reg(sc, MIFCSR, val); 969 } 970 971 void 972 bmac_mii_statchg(dev) 973 struct device *dev; 974 { 975 struct bmac_softc *sc = (void *)dev; 976 int x; 977 978 /* Update duplex mode in TX configuration */ 979 x = bmac_read_reg(sc, TXCFG); 980 if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) 981 x |= TxFullDuplex; 982 else 983 x &= ~TxFullDuplex; 984 bmac_write_reg(sc, TXCFG, x); 985 986 #ifdef BMAC_DEBUG 987 printf("bmac_mii_statchg 0x%x\n", 988 IFM_OPTIONS(sc->sc_mii.mii_media_active)); 989 #endif 990 } 991 992 void 993 bmac_mii_tick(v) 994 void *v; 995 { 996 struct bmac_softc *sc = v; 997 int s; 998 999 s = splnet(); 1000 mii_tick(&sc->sc_mii); 1001 splx(s); 1002 1003 callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc); 1004 } 1005
Indexes created Sun Oct 19 18:09:56 GMT 2025