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if_bm.c revision 1.21.4.1
      1 /*	$NetBSD: if_bm.c,v 1.21.4.1 2005/01/24 21:43:14 he Exp $	*/
      2 
      3 /*-
      4  * Copyright (C) 1998, 1999, 2000 Tsubai Masanari.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.21.4.1 2005/01/24 21:43:14 he Exp $");
     31 
     32 #include "opt_inet.h"
     33 #include "opt_ns.h"
     34 #include "bpfilter.h"
     35 
     36 #include <sys/param.h>
     37 #include <sys/device.h>
     38 #include <sys/ioctl.h>
     39 #include <sys/kernel.h>
     40 #include <sys/mbuf.h>
     41 #include <sys/socket.h>
     42 #include <sys/systm.h>
     43 #include <sys/callout.h>
     44 
     45 #include <uvm/uvm_extern.h>
     46 
     47 #include <net/if.h>
     48 #include <net/if_ether.h>
     49 #include <net/if_media.h>
     50 
     51 #if NBPFILTER > 0
     52 #include <net/bpf.h>
     53 #endif
     54 
     55 #ifdef INET
     56 #include <netinet/in.h>
     57 #include <netinet/if_inarp.h>
     58 #endif
     59 
     60 #include <dev/ofw/openfirm.h>
     61 
     62 #include <dev/mii/mii.h>
     63 #include <dev/mii/miivar.h>
     64 #include <dev/mii/mii_bitbang.h>
     65 
     66 #include <machine/autoconf.h>
     67 #include <machine/pio.h>
     68 
     69 #include <macppc/dev/dbdma.h>
     70 #include <macppc/dev/if_bmreg.h>
     71 
     72 #define BMAC_TXBUFS 2
     73 #define BMAC_RXBUFS 16
     74 #define BMAC_BUFLEN 2048
     75 
     76 struct bmac_softc {
     77 	struct device sc_dev;
     78 	struct ethercom sc_ethercom;
     79 #define sc_if sc_ethercom.ec_if
     80 	struct callout sc_tick_ch;
     81 	vaddr_t sc_regs;
     82 	dbdma_regmap_t *sc_txdma;
     83 	dbdma_regmap_t *sc_rxdma;
     84 	dbdma_command_t *sc_txcmd;
     85 	dbdma_command_t *sc_rxcmd;
     86 	caddr_t sc_txbuf;
     87 	caddr_t sc_rxbuf;
     88 	int sc_rxlast;
     89 	int sc_flags;
     90 	struct mii_data sc_mii;
     91 	u_char sc_enaddr[6];
     92 };
     93 
     94 #define BMAC_BMACPLUS	0x01
     95 #define BMAC_DEBUGFLAG	0x02
     96 
     97 extern u_int *heathrow_FCR;
     98 
     99 static __inline int bmac_read_reg __P((struct bmac_softc *, int));
    100 static __inline void bmac_write_reg __P((struct bmac_softc *, int, int));
    101 static __inline void bmac_set_bits __P((struct bmac_softc *, int, int));
    102 static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int));
    103 
    104 int bmac_match __P((struct device *, struct cfdata *, void *));
    105 void bmac_attach __P((struct device *, struct device *, void *));
    106 void bmac_reset_chip __P((struct bmac_softc *));
    107 void bmac_init __P((struct bmac_softc *));
    108 void bmac_init_dma __P((struct bmac_softc *));
    109 int bmac_intr __P((void *));
    110 int bmac_rint __P((void *));
    111 void bmac_reset __P((struct bmac_softc *));
    112 void bmac_stop __P((struct bmac_softc *));
    113 void bmac_start __P((struct ifnet *));
    114 void bmac_transmit_packet __P((struct bmac_softc *, void *, int));
    115 int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *));
    116 struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int));
    117 void bmac_watchdog __P((struct ifnet *));
    118 int bmac_ioctl __P((struct ifnet *, u_long, caddr_t));
    119 int bmac_mediachange __P((struct ifnet *));
    120 void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
    121 void bmac_setladrf __P((struct bmac_softc *));
    122 
    123 int bmac_mii_readreg __P((struct device *, int, int));
    124 void bmac_mii_writereg __P((struct device *, int, int, int));
    125 void bmac_mii_statchg __P((struct device *));
    126 void bmac_mii_tick __P((void *));
    127 u_int32_t bmac_mbo_read __P((struct device *));
    128 void bmac_mbo_write __P((struct device *, u_int32_t));
    129 
    130 CFATTACH_DECL(bm, sizeof(struct bmac_softc),
    131     bmac_match, bmac_attach, NULL, NULL);
    132 
    133 struct mii_bitbang_ops bmac_mbo = {
    134 	bmac_mbo_read, bmac_mbo_write,
    135 	{ MIFDO, MIFDI, MIFDC, MIFDIR, 0 }
    136 };
    137 
    138 int
    139 bmac_read_reg(sc, off)
    140 	struct bmac_softc *sc;
    141 	int off;
    142 {
    143 	return in16rb(sc->sc_regs + off);
    144 }
    145 
    146 void
    147 bmac_write_reg(sc, off, val)
    148 	struct bmac_softc *sc;
    149 	int off, val;
    150 {
    151 	out16rb(sc->sc_regs + off, val);
    152 }
    153 
    154 void
    155 bmac_set_bits(sc, off, val)
    156 	struct bmac_softc *sc;
    157 	int off, val;
    158 {
    159 	val |= bmac_read_reg(sc, off);
    160 	bmac_write_reg(sc, off, val);
    161 }
    162 
    163 void
    164 bmac_reset_bits(sc, off, val)
    165 	struct bmac_softc *sc;
    166 	int off, val;
    167 {
    168 	bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
    169 }
    170 
    171 int
    172 bmac_match(parent, cf, aux)
    173 	struct device *parent;
    174 	struct cfdata *cf;
    175 	void *aux;
    176 {
    177 	struct confargs *ca = aux;
    178 
    179 	if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
    180 		return 0;
    181 
    182 	if (strcmp(ca->ca_name, "bmac") == 0)		/* bmac */
    183 		return 1;
    184 	if (strcmp(ca->ca_name, "ethernet") == 0)	/* bmac+ */
    185 		return 1;
    186 
    187 	return 0;
    188 }
    189 
    190 void
    191 bmac_attach(parent, self, aux)
    192 	struct device *parent, *self;
    193 	void *aux;
    194 {
    195 	struct confargs *ca = aux;
    196 	struct bmac_softc *sc = (void *)self;
    197 	struct ifnet *ifp = &sc->sc_if;
    198 	struct mii_data *mii = &sc->sc_mii;
    199 	u_char laddr[6];
    200 
    201 	callout_init(&sc->sc_tick_ch);
    202 
    203 	sc->sc_flags =0;
    204 	if (strcmp(ca->ca_name, "ethernet") == 0) {
    205 		char name[64];
    206 
    207 		memset(name, 0, 64);
    208 		OF_package_to_path(ca->ca_node, name, sizeof(name));
    209 		OF_open(name);
    210 		sc->sc_flags |= BMAC_BMACPLUS;
    211 	}
    212 
    213 	ca->ca_reg[0] += ca->ca_baseaddr;
    214 	ca->ca_reg[2] += ca->ca_baseaddr;
    215 	ca->ca_reg[4] += ca->ca_baseaddr;
    216 
    217 	sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], PAGE_SIZE);
    218 
    219 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    220 
    221 	if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
    222 	    OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
    223 		printf(": cannot get mac-address\n");
    224 		return;
    225 	}
    226 	memcpy(sc->sc_enaddr, laddr, 6);
    227 
    228 	sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE);
    229 	sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE);
    230 	sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
    231 	sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    232 	sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
    233 	sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
    234 	if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
    235 	    sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
    236 		printf("cannot allocate memory\n");
    237 		return;
    238 	}
    239 
    240 	printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
    241 		ether_sprintf(laddr));
    242 
    243 	intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc);
    244 	intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc);
    245 
    246 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    247 	ifp->if_softc = sc;
    248 	ifp->if_ioctl = bmac_ioctl;
    249 	ifp->if_start = bmac_start;
    250 	ifp->if_flags =
    251 		IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    252 	ifp->if_watchdog = bmac_watchdog;
    253 	IFQ_SET_READY(&ifp->if_snd);
    254 
    255 	mii->mii_ifp = ifp;
    256 	mii->mii_readreg = bmac_mii_readreg;
    257 	mii->mii_writereg = bmac_mii_writereg;
    258 	mii->mii_statchg = bmac_mii_statchg;
    259 
    260 	ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
    261 	mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
    262 		      MII_OFFSET_ANY, 0);
    263 
    264 	/* Choose a default media. */
    265 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    266 		ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
    267 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
    268 	} else
    269 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
    270 
    271 	bmac_reset_chip(sc);
    272 
    273 	if_attach(ifp);
    274 	ether_ifattach(ifp, sc->sc_enaddr);
    275 }
    276 
    277 /*
    278  * Reset and enable bmac by heathrow FCR.
    279  */
    280 void
    281 bmac_reset_chip(sc)
    282 	struct bmac_softc *sc;
    283 {
    284 	u_int v;
    285 
    286 	dbdma_reset(sc->sc_txdma);
    287 	dbdma_reset(sc->sc_rxdma);
    288 
    289 	v = in32rb(heathrow_FCR);
    290 
    291 	v |= EnetEnable;
    292 	out32rb(heathrow_FCR, v);
    293 	delay(50000);
    294 
    295 	v |= ResetEnetCell;
    296 	out32rb(heathrow_FCR, v);
    297 	delay(50000);
    298 
    299 	v &= ~ResetEnetCell;
    300 	out32rb(heathrow_FCR, v);
    301 	delay(50000);
    302 
    303 	out32rb(heathrow_FCR, v);
    304 }
    305 
    306 void
    307 bmac_init(sc)
    308 	struct bmac_softc *sc;
    309 {
    310 	struct ifnet *ifp = &sc->sc_if;
    311 	struct ether_header *eh;
    312 	caddr_t data;
    313 	int i, tb, bmcr;
    314 	u_short *p;
    315 
    316 	bmac_reset_chip(sc);
    317 
    318 	/* XXX */
    319 	bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
    320 	bmcr &= ~BMCR_ISO;
    321 	bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
    322 
    323 	bmac_write_reg(sc, RXRST, RxResetValue);
    324 	bmac_write_reg(sc, TXRST, TxResetBit);
    325 
    326 	/* Wait for reset completion. */
    327 	for (i = 1000; i > 0; i -= 10) {
    328 		if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
    329 			break;
    330 		delay(10);
    331 	}
    332 	if (i <= 0)
    333 		printf("%s: reset timeout\n", ifp->if_xname);
    334 
    335 	if (! (sc->sc_flags & BMAC_BMACPLUS))
    336 		bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
    337 
    338 	__asm __volatile ("mftb %0" : "=r"(tb));
    339 	bmac_write_reg(sc, RSEED, tb);
    340 	bmac_set_bits(sc, XIFC, TxOutputEnable);
    341 	bmac_read_reg(sc, PAREG);
    342 
    343 	/* Reset various counters. */
    344 	bmac_write_reg(sc, NCCNT, 0);
    345 	bmac_write_reg(sc, NTCNT, 0);
    346 	bmac_write_reg(sc, EXCNT, 0);
    347 	bmac_write_reg(sc, LTCNT, 0);
    348 	bmac_write_reg(sc, FRCNT, 0);
    349 	bmac_write_reg(sc, LECNT, 0);
    350 	bmac_write_reg(sc, AECNT, 0);
    351 	bmac_write_reg(sc, FECNT, 0);
    352 	bmac_write_reg(sc, RXCV, 0);
    353 
    354 	/* Set tx fifo information. */
    355 	bmac_write_reg(sc, TXTH, 4);	/* 4 octets before tx starts */
    356 
    357 	bmac_write_reg(sc, TXFIFOCSR, 0);
    358 	bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
    359 
    360 	/* Set rx fifo information. */
    361 	bmac_write_reg(sc, RXFIFOCSR, 0);
    362 	bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
    363 
    364 	/* Clear status register. */
    365 	bmac_read_reg(sc, STATUS);
    366 
    367 	bmac_write_reg(sc, HASH3, 0);
    368 	bmac_write_reg(sc, HASH2, 0);
    369 	bmac_write_reg(sc, HASH1, 0);
    370 	bmac_write_reg(sc, HASH0, 0);
    371 
    372 	/* Set MAC address. */
    373 	p = (u_short *)sc->sc_enaddr;
    374 	bmac_write_reg(sc, MADD0, *p++);
    375 	bmac_write_reg(sc, MADD1, *p++);
    376 	bmac_write_reg(sc, MADD2, *p);
    377 
    378 	bmac_write_reg(sc, RXCFG,
    379 		RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
    380 
    381 	if (ifp->if_flags & IFF_PROMISC)
    382 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    383 
    384 	bmac_init_dma(sc);
    385 
    386 	/* Enable TX/RX */
    387 	bmac_set_bits(sc, RXCFG, RxMACEnable);
    388 	bmac_set_bits(sc, TXCFG, TxMACEnable);
    389 
    390 	bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
    391 
    392 	ifp->if_flags |= IFF_RUNNING;
    393 	ifp->if_flags &= ~IFF_OACTIVE;
    394 	ifp->if_timer = 0;
    395 
    396 	data = sc->sc_txbuf;
    397 	eh = (struct ether_header *)data;
    398 
    399 	memset(data, 0, sizeof(eh) + ETHERMIN);
    400 	memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN);
    401 	memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN);
    402 	bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN);
    403 
    404 	bmac_start(ifp);
    405 
    406 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    407 }
    408 
    409 void
    410 bmac_init_dma(sc)
    411 	struct bmac_softc *sc;
    412 {
    413 	dbdma_command_t *cmd = sc->sc_rxcmd;
    414 	int i;
    415 
    416 	dbdma_reset(sc->sc_txdma);
    417 	dbdma_reset(sc->sc_rxdma);
    418 
    419 	memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t));
    420 	memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    421 
    422 	for (i = 0; i < BMAC_RXBUFS; i++) {
    423 		DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
    424 			vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i),
    425 			DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    426 		cmd++;
    427 	}
    428 	DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
    429 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
    430 	dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd));
    431 
    432 	sc->sc_rxlast = 0;
    433 
    434 	dbdma_start(sc->sc_rxdma, sc->sc_rxcmd);
    435 }
    436 
    437 int
    438 bmac_intr(v)
    439 	void *v;
    440 {
    441 	struct bmac_softc *sc = v;
    442 	int stat;
    443 
    444 	stat = bmac_read_reg(sc, STATUS);
    445 	if (stat == 0)
    446 		return 0;
    447 
    448 #ifdef BMAC_DEBUG
    449 	printf("bmac_intr status = 0x%x\n", stat);
    450 #endif
    451 
    452 	if (stat & IntFrameSent) {
    453 		sc->sc_if.if_flags &= ~IFF_OACTIVE;
    454 		sc->sc_if.if_timer = 0;
    455 		sc->sc_if.if_opackets++;
    456 		bmac_start(&sc->sc_if);
    457 	}
    458 
    459 	/* XXX should do more! */
    460 
    461 	return 1;
    462 }
    463 
    464 int
    465 bmac_rint(v)
    466 	void *v;
    467 {
    468 	struct bmac_softc *sc = v;
    469 	struct ifnet *ifp = &sc->sc_if;
    470 	struct mbuf *m;
    471 	dbdma_command_t *cmd;
    472 	int status, resid, count, datalen;
    473 	int i, n;
    474 	void *data;
    475 
    476 	i = sc->sc_rxlast;
    477 	for (n = 0; n < BMAC_RXBUFS; n++, i++) {
    478 		if (i == BMAC_RXBUFS)
    479 			i = 0;
    480 		cmd = &sc->sc_rxcmd[i];
    481 		status = dbdma_ld16(&cmd->d_status);
    482 		resid = dbdma_ld16(&cmd->d_resid);
    483 
    484 #ifdef BMAC_DEBUG
    485 		if (status != 0 && status != 0x8440 && status != 0x9440)
    486 			printf("bmac_rint status = 0x%x\n", status);
    487 #endif
    488 
    489 		if ((status & DBDMA_CNTRL_ACTIVE) == 0)	/* 0x9440 | 0x8440 */
    490 			continue;
    491 		count = dbdma_ld16(&cmd->d_count);
    492 		datalen = count - resid - 2;		/* 2 == framelen */
    493 		if (datalen < sizeof(struct ether_header)) {
    494 			printf("%s: short packet len = %d\n",
    495 				ifp->if_xname, datalen);
    496 			goto next;
    497 		}
    498 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
    499 		data = sc->sc_rxbuf + BMAC_BUFLEN * i;
    500 
    501 		/* XXX Sometimes bmac reads one extra byte. */
    502 		if (datalen == ETHER_MAX_LEN + 1)
    503 			datalen--;
    504 		m = bmac_get(sc, data, datalen);
    505 
    506 		if (m == NULL) {
    507 			ifp->if_ierrors++;
    508 			goto next;
    509 		}
    510 
    511 #if NBPFILTER > 0
    512 		/*
    513 		 * Check if there's a BPF listener on this interface.
    514 		 * If so, hand off the raw packet to BPF.
    515 		 */
    516 		if (ifp->if_bpf)
    517 			bpf_mtap(ifp->if_bpf, m);
    518 #endif
    519 		(*ifp->if_input)(ifp, m);
    520 		ifp->if_ipackets++;
    521 
    522 next:
    523 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
    524 			DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    525 
    526 		cmd->d_status = 0;
    527 		cmd->d_resid = 0;
    528 		sc->sc_rxlast = i + 1;
    529 	}
    530 	dbdma_continue(sc->sc_rxdma);
    531 
    532 	return 1;
    533 }
    534 
    535 void
    536 bmac_reset(sc)
    537 	struct bmac_softc *sc;
    538 {
    539 	int s;
    540 
    541 	s = splnet();
    542 	bmac_init(sc);
    543 	splx(s);
    544 }
    545 
    546 void
    547 bmac_stop(sc)
    548 	struct bmac_softc *sc;
    549 {
    550 	struct ifnet *ifp = &sc->sc_if;
    551 	int s;
    552 
    553 	s = splnet();
    554 
    555 	callout_stop(&sc->sc_tick_ch);
    556 	mii_down(&sc->sc_mii);
    557 
    558 	/* Disable TX/RX. */
    559 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    560 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    561 
    562 	/* Disable all interrupts. */
    563 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    564 
    565 	dbdma_stop(sc->sc_txdma);
    566 	dbdma_stop(sc->sc_rxdma);
    567 
    568 	ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
    569 	ifp->if_timer = 0;
    570 
    571 	splx(s);
    572 }
    573 
    574 void
    575 bmac_start(ifp)
    576 	struct ifnet *ifp;
    577 {
    578 	struct bmac_softc *sc = ifp->if_softc;
    579 	struct mbuf *m;
    580 	int tlen;
    581 
    582 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
    583 		return;
    584 
    585 	while (1) {
    586 		if (ifp->if_flags & IFF_OACTIVE)
    587 			return;
    588 
    589 		IFQ_DEQUEUE(&ifp->if_snd, m);
    590 		if (m == 0)
    591 			break;
    592 #if NBPFILTER > 0
    593 		/*
    594 		 * If BPF is listening on this interface, let it see the
    595 		 * packet before we commit it to the wire.
    596 		 */
    597 		if (ifp->if_bpf)
    598 			bpf_mtap(ifp->if_bpf, m);
    599 #endif
    600 
    601 		ifp->if_flags |= IFF_OACTIVE;
    602 		tlen = bmac_put(sc, sc->sc_txbuf, m);
    603 
    604 		/* 5 seconds to watch for failing to transmit */
    605 		ifp->if_timer = 5;
    606 		ifp->if_opackets++;		/* # of pkts */
    607 
    608 		bmac_transmit_packet(sc, sc->sc_txbuf, tlen);
    609 	}
    610 }
    611 
    612 void
    613 bmac_transmit_packet(sc, buff, len)
    614 	struct bmac_softc *sc;
    615 	void *buff;
    616 	int len;
    617 {
    618 	dbdma_command_t *cmd = sc->sc_txcmd;
    619 	vaddr_t va = (vaddr_t)buff;
    620 
    621 #ifdef BMAC_DEBUG
    622 	if (vtophys(va) + len - 1 != vtophys(va + len - 1))
    623 		panic("bmac_transmit_packet");
    624 #endif
    625 
    626 	DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
    627 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    628 	cmd++;
    629 	DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
    630 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    631 
    632 	dbdma_start(sc->sc_txdma, sc->sc_txcmd);
    633 }
    634 
    635 int
    636 bmac_put(sc, buff, m)
    637 	struct bmac_softc *sc;
    638 	caddr_t buff;
    639 	struct mbuf *m;
    640 {
    641 	struct mbuf *n;
    642 	int len, tlen = 0;
    643 
    644 	for (; m; m = n) {
    645 		len = m->m_len;
    646 		if (len == 0) {
    647 			MFREE(m, n);
    648 			continue;
    649 		}
    650 		memcpy(buff, mtod(m, caddr_t), len);
    651 		buff += len;
    652 		tlen += len;
    653 		MFREE(m, n);
    654 	}
    655 	if (tlen > PAGE_SIZE)
    656 		panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
    657 
    658 	return tlen;
    659 }
    660 
    661 struct mbuf *
    662 bmac_get(sc, pkt, totlen)
    663 	struct bmac_softc *sc;
    664 	caddr_t pkt;
    665 	int totlen;
    666 {
    667 	struct mbuf *m;
    668 	struct mbuf *top, **mp;
    669 	int len;
    670 
    671 	MGETHDR(m, M_DONTWAIT, MT_DATA);
    672 	if (m == 0)
    673 		return 0;
    674 	m->m_flags |= M_HASFCS;
    675 	m->m_pkthdr.rcvif = &sc->sc_if;
    676 	m->m_pkthdr.len = totlen;
    677 	len = MHLEN;
    678 	top = 0;
    679 	mp = &top;
    680 
    681 	while (totlen > 0) {
    682 		if (top) {
    683 			MGET(m, M_DONTWAIT, MT_DATA);
    684 			if (m == 0) {
    685 				m_freem(top);
    686 				return 0;
    687 			}
    688 			len = MLEN;
    689 		}
    690 		if (totlen >= MINCLSIZE) {
    691 			MCLGET(m, M_DONTWAIT);
    692 			if ((m->m_flags & M_EXT) == 0) {
    693 				m_free(m);
    694 				m_freem(top);
    695 				return 0;
    696 			}
    697 			len = MCLBYTES;
    698 		}
    699 		m->m_len = len = min(totlen, len);
    700 		memcpy(mtod(m, caddr_t), pkt, len);
    701 		pkt += len;
    702 		totlen -= len;
    703 		*mp = m;
    704 		mp = &m->m_next;
    705 	}
    706 
    707 	return top;
    708 }
    709 
    710 void
    711 bmac_watchdog(ifp)
    712 	struct ifnet *ifp;
    713 {
    714 	struct bmac_softc *sc = ifp->if_softc;
    715 
    716 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    717 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    718 
    719 	printf("%s: device timeout\n", ifp->if_xname);
    720 	ifp->if_oerrors++;
    721 
    722 	bmac_reset(sc);
    723 }
    724 
    725 int
    726 bmac_ioctl(ifp, cmd, data)
    727 	struct ifnet *ifp;
    728 	u_long cmd;
    729 	caddr_t data;
    730 {
    731 	struct bmac_softc *sc = ifp->if_softc;
    732 	struct ifaddr *ifa = (struct ifaddr *)data;
    733 	struct ifreq *ifr = (struct ifreq *)data;
    734 	int s, error = 0;
    735 
    736 	s = splnet();
    737 
    738 	switch (cmd) {
    739 
    740 	case SIOCSIFADDR:
    741 		ifp->if_flags |= IFF_UP;
    742 
    743 		switch (ifa->ifa_addr->sa_family) {
    744 #ifdef INET
    745 		case AF_INET:
    746 			bmac_init(sc);
    747 			arp_ifinit(ifp, ifa);
    748 			break;
    749 #endif
    750 #ifdef NS
    751 		case AF_NS:
    752 		    {
    753 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
    754 
    755 			if (ns_nullhost(*ina))
    756 				ina->x_host =
    757 				    *(union ns_host *)LLADDR(ifp->if_sadl);
    758 			else {
    759 				memcpy(LLADDR(ifp->if_sadl),
    760 				    ina->x_host.c_host,
    761 				    sizeof(sc->sc_enaddr));
    762 			}
    763 			/* Set new address. */
    764 			bmac_init(sc);
    765 			break;
    766 		    }
    767 #endif
    768 		default:
    769 			bmac_init(sc);
    770 			break;
    771 		}
    772 		break;
    773 
    774 	case SIOCSIFFLAGS:
    775 		if ((ifp->if_flags & IFF_UP) == 0 &&
    776 		    (ifp->if_flags & IFF_RUNNING) != 0) {
    777 			/*
    778 			 * If interface is marked down and it is running, then
    779 			 * stop it.
    780 			 */
    781 			bmac_stop(sc);
    782 			ifp->if_flags &= ~IFF_RUNNING;
    783 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
    784 		    (ifp->if_flags & IFF_RUNNING) == 0) {
    785 			/*
    786 			 * If interface is marked up and it is stopped, then
    787 			 * start it.
    788 			 */
    789 			bmac_init(sc);
    790 		} else {
    791 			/*
    792 			 * Reset the interface to pick up changes in any other
    793 			 * flags that affect hardware registers.
    794 			 */
    795 			/*bmac_stop(sc);*/
    796 			bmac_init(sc);
    797 		}
    798 #ifdef BMAC_DEBUG
    799 		if (ifp->if_flags & IFF_DEBUG)
    800 			sc->sc_flags |= BMAC_DEBUGFLAG;
    801 #endif
    802 		break;
    803 
    804 	case SIOCADDMULTI:
    805 	case SIOCDELMULTI:
    806 		error = (cmd == SIOCADDMULTI) ?
    807 		    ether_addmulti(ifr, &sc->sc_ethercom) :
    808 		    ether_delmulti(ifr, &sc->sc_ethercom);
    809 
    810 		if (error == ENETRESET) {
    811 			/*
    812 			 * Multicast list has changed; set the hardware filter
    813 			 * accordingly.
    814 			 */
    815 			if (ifp->if_flags & IFF_RUNNING) {
    816 				bmac_init(sc);
    817 				bmac_setladrf(sc);
    818 			}
    819 			error = 0;
    820 		}
    821 		break;
    822 
    823 	case SIOCGIFMEDIA:
    824 	case SIOCSIFMEDIA:
    825 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
    826 		break;
    827 
    828 	default:
    829 		error = EINVAL;
    830 	}
    831 
    832 	splx(s);
    833 	return error;
    834 }
    835 
    836 int
    837 bmac_mediachange(ifp)
    838 	struct ifnet *ifp;
    839 {
    840 	struct bmac_softc *sc = ifp->if_softc;
    841 
    842 	return mii_mediachg(&sc->sc_mii);
    843 }
    844 
    845 void
    846 bmac_mediastatus(ifp, ifmr)
    847 	struct ifnet *ifp;
    848 	struct ifmediareq *ifmr;
    849 {
    850 	struct bmac_softc *sc = ifp->if_softc;
    851 
    852 	mii_pollstat(&sc->sc_mii);
    853 
    854 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
    855 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
    856 }
    857 
    858 /*
    859  * Set up the logical address filter.
    860  */
    861 void
    862 bmac_setladrf(sc)
    863 	struct bmac_softc *sc;
    864 {
    865 	struct ifnet *ifp = &sc->sc_if;
    866 	struct ether_multi *enm;
    867 	struct ether_multistep step;
    868 	u_int32_t crc;
    869 	u_int16_t hash[4];
    870 	int x;
    871 
    872 	/*
    873 	 * Set up multicast address filter by passing all multicast addresses
    874 	 * through a crc generator, and then using the high order 6 bits as an
    875 	 * index into the 64 bit logical address filter.  The high order bit
    876 	 * selects the word, while the rest of the bits select the bit within
    877 	 * the word.
    878 	 */
    879 
    880 	if (ifp->if_flags & IFF_PROMISC) {
    881 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    882 		return;
    883 	}
    884 
    885 	if (ifp->if_flags & IFF_ALLMULTI) {
    886 		hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    887 		goto chipit;
    888 	}
    889 
    890 	hash[3] = hash[2] = hash[1] = hash[0] = 0;
    891 
    892 	ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
    893 	while (enm != NULL) {
    894 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
    895 			/*
    896 			 * We must listen to a range of multicast addresses.
    897 			 * For now, just accept all multicasts, rather than
    898 			 * trying to set only those filter bits needed to match
    899 			 * the range.  (At this time, the only use of address
    900 			 * ranges is for IP multicast routing, for which the
    901 			 * range is big enough to require all bits set.)
    902 			 */
    903 			hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    904 			ifp->if_flags |= IFF_ALLMULTI;
    905 			goto chipit;
    906 		}
    907 
    908 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
    909 
    910 		/* Just want the 6 most significant bits. */
    911 		crc >>= 26;
    912 
    913 		/* Set the corresponding bit in the filter. */
    914 		hash[crc >> 4] |= 1 << (crc & 0xf);
    915 
    916 		ETHER_NEXT_MULTI(step, enm);
    917 	}
    918 
    919 	ifp->if_flags &= ~IFF_ALLMULTI;
    920 
    921 chipit:
    922 	bmac_write_reg(sc, HASH0, hash[0]);
    923 	bmac_write_reg(sc, HASH1, hash[1]);
    924 	bmac_write_reg(sc, HASH2, hash[2]);
    925 	bmac_write_reg(sc, HASH3, hash[3]);
    926 	x = bmac_read_reg(sc, RXCFG);
    927 	x &= ~RxPromiscEnable;
    928 	x |= RxHashFilterEnable;
    929 	bmac_write_reg(sc, RXCFG, x);
    930 }
    931 
    932 int
    933 bmac_mii_readreg(dev, phy, reg)
    934 	struct device *dev;
    935 	int phy, reg;
    936 {
    937 	return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg);
    938 }
    939 
    940 void
    941 bmac_mii_writereg(dev, phy, reg, val)
    942 	struct device *dev;
    943 	int phy, reg, val;
    944 {
    945 	mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val);
    946 }
    947 
    948 u_int32_t
    949 bmac_mbo_read(dev)
    950 	struct device *dev;
    951 {
    952 	struct bmac_softc *sc = (void *)dev;
    953 
    954 	return bmac_read_reg(sc, MIFCSR);
    955 }
    956 
    957 void
    958 bmac_mbo_write(dev, val)
    959 	struct device *dev;
    960 	u_int32_t val;
    961 {
    962 	struct bmac_softc *sc = (void *)dev;
    963 
    964 	bmac_write_reg(sc, MIFCSR, val);
    965 }
    966 
    967 void
    968 bmac_mii_statchg(dev)
    969 	struct device *dev;
    970 {
    971 	struct bmac_softc *sc = (void *)dev;
    972 	int x;
    973 
    974 	/* Update duplex mode in TX configuration */
    975 	x = bmac_read_reg(sc, TXCFG);
    976 	if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
    977 		x |= TxFullDuplex;
    978 	else
    979 		x &= ~TxFullDuplex;
    980 	bmac_write_reg(sc, TXCFG, x);
    981 
    982 #ifdef BMAC_DEBUG
    983 	printf("bmac_mii_statchg 0x%x\n",
    984 		IFM_OPTIONS(sc->sc_mii.mii_media_active));
    985 #endif
    986 }
    987 
    988 void
    989 bmac_mii_tick(v)
    990 	void *v;
    991 {
    992 	struct bmac_softc *sc = v;
    993 	int s;
    994 
    995 	s = splnet();
    996 	mii_tick(&sc->sc_mii);
    997 	splx(s);
    998 
    999 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
   1000 }
   1001