Home | History | Annotate | Line # | Download | only in dev
if_bm.c revision 1.27.4.1
      1 /*	$NetBSD: if_bm.c,v 1.27.4.1 2006/09/09 02:41:05 rpaulo Exp $	*/
      2 
      3 /*-
      4  * Copyright (C) 1998, 1999, 2000 Tsubai Masanari.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: if_bm.c,v 1.27.4.1 2006/09/09 02:41:05 rpaulo Exp $");
     31 
     32 #include "opt_inet.h"
     33 #include "bpfilter.h"
     34 
     35 #include <sys/param.h>
     36 #include <sys/device.h>
     37 #include <sys/ioctl.h>
     38 #include <sys/kernel.h>
     39 #include <sys/mbuf.h>
     40 #include <sys/socket.h>
     41 #include <sys/systm.h>
     42 #include <sys/callout.h>
     43 
     44 #include <uvm/uvm_extern.h>
     45 
     46 #include <net/if.h>
     47 #include <net/if_dl.h>
     48 #include <net/if_ether.h>
     49 #include <net/if_media.h>
     50 
     51 #if NBPFILTER > 0
     52 #include <net/bpf.h>
     53 #endif
     54 
     55 #ifdef INET
     56 #include <netinet/in.h>
     57 #include <netinet/if_inarp.h>
     58 #endif
     59 
     60 
     61 #include <dev/ofw/openfirm.h>
     62 
     63 #include <dev/mii/mii.h>
     64 #include <dev/mii/miivar.h>
     65 #include <dev/mii/mii_bitbang.h>
     66 
     67 #include <powerpc/spr.h>
     68 
     69 #include <machine/autoconf.h>
     70 #include <machine/pio.h>
     71 
     72 #include <macppc/dev/dbdma.h>
     73 #include <macppc/dev/if_bmreg.h>
     74 
     75 #define BMAC_TXBUFS 2
     76 #define BMAC_RXBUFS 16
     77 #define BMAC_BUFLEN 2048
     78 
     79 struct bmac_softc {
     80 	struct device sc_dev;
     81 	struct ethercom sc_ethercom;
     82 #define sc_if sc_ethercom.ec_if
     83 	struct callout sc_tick_ch;
     84 	vaddr_t sc_regs;
     85 	dbdma_regmap_t *sc_txdma;
     86 	dbdma_regmap_t *sc_rxdma;
     87 	dbdma_command_t *sc_txcmd;
     88 	dbdma_command_t *sc_rxcmd;
     89 	caddr_t sc_txbuf;
     90 	caddr_t sc_rxbuf;
     91 	int sc_rxlast;
     92 	int sc_flags;
     93 	struct mii_data sc_mii;
     94 	u_char sc_enaddr[6];
     95 };
     96 
     97 #define BMAC_BMACPLUS	0x01
     98 #define BMAC_DEBUGFLAG	0x02
     99 
    100 extern u_int *heathrow_FCR;
    101 
    102 static inline int bmac_read_reg __P((struct bmac_softc *, int));
    103 static inline void bmac_write_reg __P((struct bmac_softc *, int, int));
    104 static inline void bmac_set_bits __P((struct bmac_softc *, int, int));
    105 static inline void bmac_reset_bits __P((struct bmac_softc *, int, int));
    106 
    107 int bmac_match __P((struct device *, struct cfdata *, void *));
    108 void bmac_attach __P((struct device *, struct device *, void *));
    109 void bmac_reset_chip __P((struct bmac_softc *));
    110 void bmac_init __P((struct bmac_softc *));
    111 void bmac_init_dma __P((struct bmac_softc *));
    112 int bmac_intr __P((void *));
    113 int bmac_rint __P((void *));
    114 void bmac_reset __P((struct bmac_softc *));
    115 void bmac_stop __P((struct bmac_softc *));
    116 void bmac_start __P((struct ifnet *));
    117 void bmac_transmit_packet __P((struct bmac_softc *, void *, int));
    118 int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *));
    119 struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int));
    120 void bmac_watchdog __P((struct ifnet *));
    121 int bmac_ioctl __P((struct ifnet *, u_long, caddr_t));
    122 int bmac_mediachange __P((struct ifnet *));
    123 void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
    124 void bmac_setladrf __P((struct bmac_softc *));
    125 
    126 int bmac_mii_readreg __P((struct device *, int, int));
    127 void bmac_mii_writereg __P((struct device *, int, int, int));
    128 void bmac_mii_statchg __P((struct device *));
    129 void bmac_mii_tick __P((void *));
    130 u_int32_t bmac_mbo_read __P((struct device *));
    131 void bmac_mbo_write __P((struct device *, u_int32_t));
    132 
    133 CFATTACH_DECL(bm, sizeof(struct bmac_softc),
    134     bmac_match, bmac_attach, NULL, NULL);
    135 
    136 struct mii_bitbang_ops bmac_mbo = {
    137 	bmac_mbo_read, bmac_mbo_write,
    138 	{ MIFDO, MIFDI, MIFDC, MIFDIR, 0 }
    139 };
    140 
    141 int
    142 bmac_read_reg(sc, off)
    143 	struct bmac_softc *sc;
    144 	int off;
    145 {
    146 	return in16rb(sc->sc_regs + off);
    147 }
    148 
    149 void
    150 bmac_write_reg(sc, off, val)
    151 	struct bmac_softc *sc;
    152 	int off, val;
    153 {
    154 	out16rb(sc->sc_regs + off, val);
    155 }
    156 
    157 void
    158 bmac_set_bits(sc, off, val)
    159 	struct bmac_softc *sc;
    160 	int off, val;
    161 {
    162 	val |= bmac_read_reg(sc, off);
    163 	bmac_write_reg(sc, off, val);
    164 }
    165 
    166 void
    167 bmac_reset_bits(sc, off, val)
    168 	struct bmac_softc *sc;
    169 	int off, val;
    170 {
    171 	bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
    172 }
    173 
    174 int
    175 bmac_match(parent, cf, aux)
    176 	struct device *parent;
    177 	struct cfdata *cf;
    178 	void *aux;
    179 {
    180 	struct confargs *ca = aux;
    181 
    182 	if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
    183 		return 0;
    184 
    185 	if (strcmp(ca->ca_name, "bmac") == 0)		/* bmac */
    186 		return 1;
    187 	if (strcmp(ca->ca_name, "ethernet") == 0)	/* bmac+ */
    188 		return 1;
    189 
    190 	return 0;
    191 }
    192 
    193 void
    194 bmac_attach(parent, self, aux)
    195 	struct device *parent, *self;
    196 	void *aux;
    197 {
    198 	struct confargs *ca = aux;
    199 	struct bmac_softc *sc = (void *)self;
    200 	struct ifnet *ifp = &sc->sc_if;
    201 	struct mii_data *mii = &sc->sc_mii;
    202 	u_char laddr[6];
    203 
    204 	callout_init(&sc->sc_tick_ch);
    205 
    206 	sc->sc_flags =0;
    207 	if (strcmp(ca->ca_name, "ethernet") == 0) {
    208 		char name[64];
    209 
    210 		memset(name, 0, 64);
    211 		OF_package_to_path(ca->ca_node, name, sizeof(name));
    212 		OF_open(name);
    213 		sc->sc_flags |= BMAC_BMACPLUS;
    214 	}
    215 
    216 	ca->ca_reg[0] += ca->ca_baseaddr;
    217 	ca->ca_reg[2] += ca->ca_baseaddr;
    218 	ca->ca_reg[4] += ca->ca_baseaddr;
    219 
    220 	sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], PAGE_SIZE);
    221 
    222 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    223 
    224 	if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
    225 	    OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
    226 		printf(": cannot get mac-address\n");
    227 		return;
    228 	}
    229 	memcpy(sc->sc_enaddr, laddr, 6);
    230 
    231 	sc->sc_txdma = mapiodev(ca->ca_reg[2], PAGE_SIZE);
    232 	sc->sc_rxdma = mapiodev(ca->ca_reg[4], PAGE_SIZE);
    233 	sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
    234 	sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    235 	sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
    236 	sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
    237 	if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
    238 	    sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
    239 		printf("cannot allocate memory\n");
    240 		return;
    241 	}
    242 
    243 	printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
    244 		ether_sprintf(laddr));
    245 
    246 	intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc);
    247 	intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc);
    248 
    249 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    250 	ifp->if_softc = sc;
    251 	ifp->if_ioctl = bmac_ioctl;
    252 	ifp->if_start = bmac_start;
    253 	ifp->if_flags =
    254 		IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    255 	ifp->if_watchdog = bmac_watchdog;
    256 	IFQ_SET_READY(&ifp->if_snd);
    257 
    258 	mii->mii_ifp = ifp;
    259 	mii->mii_readreg = bmac_mii_readreg;
    260 	mii->mii_writereg = bmac_mii_writereg;
    261 	mii->mii_statchg = bmac_mii_statchg;
    262 
    263 	ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
    264 	mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
    265 		      MII_OFFSET_ANY, 0);
    266 
    267 	/* Choose a default media. */
    268 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    269 		ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
    270 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
    271 	} else
    272 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
    273 
    274 	bmac_reset_chip(sc);
    275 
    276 	if_attach(ifp);
    277 	ether_ifattach(ifp, sc->sc_enaddr);
    278 }
    279 
    280 /*
    281  * Reset and enable bmac by heathrow FCR.
    282  */
    283 void
    284 bmac_reset_chip(sc)
    285 	struct bmac_softc *sc;
    286 {
    287 	u_int v;
    288 
    289 	dbdma_reset(sc->sc_txdma);
    290 	dbdma_reset(sc->sc_rxdma);
    291 
    292 	v = in32rb(heathrow_FCR);
    293 
    294 	v |= EnetEnable;
    295 	out32rb(heathrow_FCR, v);
    296 	delay(50000);
    297 
    298 	v |= ResetEnetCell;
    299 	out32rb(heathrow_FCR, v);
    300 	delay(50000);
    301 
    302 	v &= ~ResetEnetCell;
    303 	out32rb(heathrow_FCR, v);
    304 	delay(50000);
    305 
    306 	out32rb(heathrow_FCR, v);
    307 }
    308 
    309 void
    310 bmac_init(sc)
    311 	struct bmac_softc *sc;
    312 {
    313 	struct ifnet *ifp = &sc->sc_if;
    314 	struct ether_header *eh;
    315 	caddr_t data;
    316 	int i, tb, bmcr;
    317 	u_short *p;
    318 
    319 	bmac_reset_chip(sc);
    320 
    321 	/* XXX */
    322 	bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
    323 	bmcr &= ~BMCR_ISO;
    324 	bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
    325 
    326 	bmac_write_reg(sc, RXRST, RxResetValue);
    327 	bmac_write_reg(sc, TXRST, TxResetBit);
    328 
    329 	/* Wait for reset completion. */
    330 	for (i = 1000; i > 0; i -= 10) {
    331 		if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
    332 			break;
    333 		delay(10);
    334 	}
    335 	if (i <= 0)
    336 		printf("%s: reset timeout\n", ifp->if_xname);
    337 
    338 	if (! (sc->sc_flags & BMAC_BMACPLUS))
    339 		bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
    340 
    341 	if ((mfpvr() >> 16) == MPC601)
    342 		tb = mfrtcl();
    343 	else
    344 		tb = mftbl();
    345 	bmac_write_reg(sc, RSEED, tb);
    346 	bmac_set_bits(sc, XIFC, TxOutputEnable);
    347 	bmac_read_reg(sc, PAREG);
    348 
    349 	/* Reset various counters. */
    350 	bmac_write_reg(sc, NCCNT, 0);
    351 	bmac_write_reg(sc, NTCNT, 0);
    352 	bmac_write_reg(sc, EXCNT, 0);
    353 	bmac_write_reg(sc, LTCNT, 0);
    354 	bmac_write_reg(sc, FRCNT, 0);
    355 	bmac_write_reg(sc, LECNT, 0);
    356 	bmac_write_reg(sc, AECNT, 0);
    357 	bmac_write_reg(sc, FECNT, 0);
    358 	bmac_write_reg(sc, RXCV, 0);
    359 
    360 	/* Set tx fifo information. */
    361 	bmac_write_reg(sc, TXTH, 4);	/* 4 octets before tx starts */
    362 
    363 	bmac_write_reg(sc, TXFIFOCSR, 0);
    364 	bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
    365 
    366 	/* Set rx fifo information. */
    367 	bmac_write_reg(sc, RXFIFOCSR, 0);
    368 	bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
    369 
    370 	/* Clear status register. */
    371 	bmac_read_reg(sc, STATUS);
    372 
    373 	bmac_write_reg(sc, HASH3, 0);
    374 	bmac_write_reg(sc, HASH2, 0);
    375 	bmac_write_reg(sc, HASH1, 0);
    376 	bmac_write_reg(sc, HASH0, 0);
    377 
    378 	/* Set MAC address. */
    379 	p = (u_short *)sc->sc_enaddr;
    380 	bmac_write_reg(sc, MADD0, *p++);
    381 	bmac_write_reg(sc, MADD1, *p++);
    382 	bmac_write_reg(sc, MADD2, *p);
    383 
    384 	bmac_write_reg(sc, RXCFG,
    385 		RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
    386 
    387 	if (ifp->if_flags & IFF_PROMISC)
    388 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    389 
    390 	bmac_init_dma(sc);
    391 
    392 	/* Enable TX/RX */
    393 	bmac_set_bits(sc, RXCFG, RxMACEnable);
    394 	bmac_set_bits(sc, TXCFG, TxMACEnable);
    395 
    396 	bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
    397 
    398 	ifp->if_flags |= IFF_RUNNING;
    399 	ifp->if_flags &= ~IFF_OACTIVE;
    400 	ifp->if_timer = 0;
    401 
    402 	data = sc->sc_txbuf;
    403 	eh = (struct ether_header *)data;
    404 
    405 	memset(data, 0, sizeof(eh) + ETHERMIN);
    406 	memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN);
    407 	memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN);
    408 	bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN);
    409 
    410 	bmac_start(ifp);
    411 
    412 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    413 }
    414 
    415 void
    416 bmac_init_dma(sc)
    417 	struct bmac_softc *sc;
    418 {
    419 	dbdma_command_t *cmd = sc->sc_rxcmd;
    420 	int i;
    421 
    422 	dbdma_reset(sc->sc_txdma);
    423 	dbdma_reset(sc->sc_rxdma);
    424 
    425 	memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t));
    426 	memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
    427 
    428 	for (i = 0; i < BMAC_RXBUFS; i++) {
    429 		DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
    430 			vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i),
    431 			DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    432 		cmd++;
    433 	}
    434 	DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
    435 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
    436 	dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd));
    437 
    438 	sc->sc_rxlast = 0;
    439 
    440 	dbdma_start(sc->sc_rxdma, sc->sc_rxcmd);
    441 }
    442 
    443 int
    444 bmac_intr(v)
    445 	void *v;
    446 {
    447 	struct bmac_softc *sc = v;
    448 	int stat;
    449 
    450 	stat = bmac_read_reg(sc, STATUS);
    451 	if (stat == 0)
    452 		return 0;
    453 
    454 #ifdef BMAC_DEBUG
    455 	printf("bmac_intr status = 0x%x\n", stat);
    456 #endif
    457 
    458 	if (stat & IntFrameSent) {
    459 		sc->sc_if.if_flags &= ~IFF_OACTIVE;
    460 		sc->sc_if.if_timer = 0;
    461 		sc->sc_if.if_opackets++;
    462 		bmac_start(&sc->sc_if);
    463 	}
    464 
    465 	/* XXX should do more! */
    466 
    467 	return 1;
    468 }
    469 
    470 int
    471 bmac_rint(v)
    472 	void *v;
    473 {
    474 	struct bmac_softc *sc = v;
    475 	struct ifnet *ifp = &sc->sc_if;
    476 	struct mbuf *m;
    477 	dbdma_command_t *cmd;
    478 	int status, resid, count, datalen;
    479 	int i, n;
    480 	void *data;
    481 
    482 	i = sc->sc_rxlast;
    483 	for (n = 0; n < BMAC_RXBUFS; n++, i++) {
    484 		if (i == BMAC_RXBUFS)
    485 			i = 0;
    486 		cmd = &sc->sc_rxcmd[i];
    487 		status = dbdma_ld16(&cmd->d_status);
    488 		resid = dbdma_ld16(&cmd->d_resid);
    489 
    490 #ifdef BMAC_DEBUG
    491 		if (status != 0 && status != 0x8440 && status != 0x9440)
    492 			printf("bmac_rint status = 0x%x\n", status);
    493 #endif
    494 
    495 		if ((status & DBDMA_CNTRL_ACTIVE) == 0)	/* 0x9440 | 0x8440 */
    496 			continue;
    497 		count = dbdma_ld16(&cmd->d_count);
    498 		datalen = count - resid - 2;		/* 2 == framelen */
    499 		if (datalen < sizeof(struct ether_header)) {
    500 			printf("%s: short packet len = %d\n",
    501 				ifp->if_xname, datalen);
    502 			goto next;
    503 		}
    504 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
    505 		data = sc->sc_rxbuf + BMAC_BUFLEN * i;
    506 
    507 		/* XXX Sometimes bmac reads one extra byte. */
    508 		if (datalen == ETHER_MAX_LEN + 1)
    509 			datalen--;
    510 
    511 		/* Trim the CRC. */
    512 		datalen -= ETHER_CRC_LEN;
    513 
    514 		m = bmac_get(sc, data, datalen);
    515 		if (m == NULL) {
    516 			ifp->if_ierrors++;
    517 			goto next;
    518 		}
    519 
    520 #if NBPFILTER > 0
    521 		/*
    522 		 * Check if there's a BPF listener on this interface.
    523 		 * If so, hand off the raw packet to BPF.
    524 		 */
    525 		if (ifp->if_bpf)
    526 			bpf_mtap(ifp->if_bpf, m);
    527 #endif
    528 		(*ifp->if_input)(ifp, m);
    529 		ifp->if_ipackets++;
    530 
    531 next:
    532 		DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
    533 			DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    534 
    535 		cmd->d_status = 0;
    536 		cmd->d_resid = 0;
    537 		sc->sc_rxlast = i + 1;
    538 	}
    539 	dbdma_continue(sc->sc_rxdma);
    540 
    541 	return 1;
    542 }
    543 
    544 void
    545 bmac_reset(sc)
    546 	struct bmac_softc *sc;
    547 {
    548 	int s;
    549 
    550 	s = splnet();
    551 	bmac_init(sc);
    552 	splx(s);
    553 }
    554 
    555 void
    556 bmac_stop(sc)
    557 	struct bmac_softc *sc;
    558 {
    559 	struct ifnet *ifp = &sc->sc_if;
    560 	int s;
    561 
    562 	s = splnet();
    563 
    564 	callout_stop(&sc->sc_tick_ch);
    565 	mii_down(&sc->sc_mii);
    566 
    567 	/* Disable TX/RX. */
    568 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    569 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    570 
    571 	/* Disable all interrupts. */
    572 	bmac_write_reg(sc, INTDISABLE, NoEventsMask);
    573 
    574 	dbdma_stop(sc->sc_txdma);
    575 	dbdma_stop(sc->sc_rxdma);
    576 
    577 	ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
    578 	ifp->if_timer = 0;
    579 
    580 	splx(s);
    581 }
    582 
    583 void
    584 bmac_start(ifp)
    585 	struct ifnet *ifp;
    586 {
    587 	struct bmac_softc *sc = ifp->if_softc;
    588 	struct mbuf *m;
    589 	int tlen;
    590 
    591 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
    592 		return;
    593 
    594 	while (1) {
    595 		if (ifp->if_flags & IFF_OACTIVE)
    596 			return;
    597 
    598 		IFQ_DEQUEUE(&ifp->if_snd, m);
    599 		if (m == 0)
    600 			break;
    601 #if NBPFILTER > 0
    602 		/*
    603 		 * If BPF is listening on this interface, let it see the
    604 		 * packet before we commit it to the wire.
    605 		 */
    606 		if (ifp->if_bpf)
    607 			bpf_mtap(ifp->if_bpf, m);
    608 #endif
    609 
    610 		ifp->if_flags |= IFF_OACTIVE;
    611 		tlen = bmac_put(sc, sc->sc_txbuf, m);
    612 
    613 		/* 5 seconds to watch for failing to transmit */
    614 		ifp->if_timer = 5;
    615 		ifp->if_opackets++;		/* # of pkts */
    616 
    617 		bmac_transmit_packet(sc, sc->sc_txbuf, tlen);
    618 	}
    619 }
    620 
    621 void
    622 bmac_transmit_packet(sc, buff, len)
    623 	struct bmac_softc *sc;
    624 	void *buff;
    625 	int len;
    626 {
    627 	dbdma_command_t *cmd = sc->sc_txcmd;
    628 	vaddr_t va = (vaddr_t)buff;
    629 
    630 #ifdef BMAC_DEBUG
    631 	if (vtophys(va) + len - 1 != vtophys(va + len - 1))
    632 		panic("bmac_transmit_packet");
    633 #endif
    634 
    635 	DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
    636 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    637 	cmd++;
    638 	DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
    639 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    640 
    641 	dbdma_start(sc->sc_txdma, sc->sc_txcmd);
    642 }
    643 
    644 int
    645 bmac_put(sc, buff, m)
    646 	struct bmac_softc *sc;
    647 	caddr_t buff;
    648 	struct mbuf *m;
    649 {
    650 	struct mbuf *n;
    651 	int len, tlen = 0;
    652 
    653 	for (; m; m = n) {
    654 		len = m->m_len;
    655 		if (len == 0) {
    656 			MFREE(m, n);
    657 			continue;
    658 		}
    659 		memcpy(buff, mtod(m, caddr_t), len);
    660 		buff += len;
    661 		tlen += len;
    662 		MFREE(m, n);
    663 	}
    664 	if (tlen > PAGE_SIZE)
    665 		panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
    666 
    667 	return tlen;
    668 }
    669 
    670 struct mbuf *
    671 bmac_get(sc, pkt, totlen)
    672 	struct bmac_softc *sc;
    673 	caddr_t pkt;
    674 	int totlen;
    675 {
    676 	struct mbuf *m;
    677 	struct mbuf *top, **mp;
    678 	int len;
    679 
    680 	MGETHDR(m, M_DONTWAIT, MT_DATA);
    681 	if (m == 0)
    682 		return 0;
    683 	m->m_pkthdr.rcvif = &sc->sc_if;
    684 	m->m_pkthdr.len = totlen;
    685 	len = MHLEN;
    686 	top = 0;
    687 	mp = &top;
    688 
    689 	while (totlen > 0) {
    690 		if (top) {
    691 			MGET(m, M_DONTWAIT, MT_DATA);
    692 			if (m == 0) {
    693 				m_freem(top);
    694 				return 0;
    695 			}
    696 			len = MLEN;
    697 		}
    698 		if (totlen >= MINCLSIZE) {
    699 			MCLGET(m, M_DONTWAIT);
    700 			if ((m->m_flags & M_EXT) == 0) {
    701 				m_free(m);
    702 				m_freem(top);
    703 				return 0;
    704 			}
    705 			len = MCLBYTES;
    706 		}
    707 		m->m_len = len = min(totlen, len);
    708 		memcpy(mtod(m, caddr_t), pkt, len);
    709 		pkt += len;
    710 		totlen -= len;
    711 		*mp = m;
    712 		mp = &m->m_next;
    713 	}
    714 
    715 	return top;
    716 }
    717 
    718 void
    719 bmac_watchdog(ifp)
    720 	struct ifnet *ifp;
    721 {
    722 	struct bmac_softc *sc = ifp->if_softc;
    723 
    724 	bmac_reset_bits(sc, RXCFG, RxMACEnable);
    725 	bmac_reset_bits(sc, TXCFG, TxMACEnable);
    726 
    727 	printf("%s: device timeout\n", ifp->if_xname);
    728 	ifp->if_oerrors++;
    729 
    730 	bmac_reset(sc);
    731 }
    732 
    733 int
    734 bmac_ioctl(ifp, cmd, data)
    735 	struct ifnet *ifp;
    736 	u_long cmd;
    737 	caddr_t data;
    738 {
    739 	struct bmac_softc *sc = ifp->if_softc;
    740 	struct ifaddr *ifa = (struct ifaddr *)data;
    741 	struct ifreq *ifr = (struct ifreq *)data;
    742 	int s, error = 0;
    743 
    744 	s = splnet();
    745 
    746 	switch (cmd) {
    747 
    748 	case SIOCSIFADDR:
    749 		ifp->if_flags |= IFF_UP;
    750 
    751 		switch (ifa->ifa_addr->sa_family) {
    752 #ifdef INET
    753 		case AF_INET:
    754 			bmac_init(sc);
    755 			arp_ifinit(ifp, ifa);
    756 			break;
    757 #endif
    758 		default:
    759 			bmac_init(sc);
    760 			break;
    761 		}
    762 		break;
    763 
    764 	case SIOCSIFFLAGS:
    765 		if ((ifp->if_flags & IFF_UP) == 0 &&
    766 		    (ifp->if_flags & IFF_RUNNING) != 0) {
    767 			/*
    768 			 * If interface is marked down and it is running, then
    769 			 * stop it.
    770 			 */
    771 			bmac_stop(sc);
    772 			ifp->if_flags &= ~IFF_RUNNING;
    773 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
    774 		    (ifp->if_flags & IFF_RUNNING) == 0) {
    775 			/*
    776 			 * If interface is marked up and it is stopped, then
    777 			 * start it.
    778 			 */
    779 			bmac_init(sc);
    780 		} else {
    781 			/*
    782 			 * Reset the interface to pick up changes in any other
    783 			 * flags that affect hardware registers.
    784 			 */
    785 			/*bmac_stop(sc);*/
    786 			bmac_init(sc);
    787 		}
    788 #ifdef BMAC_DEBUG
    789 		if (ifp->if_flags & IFF_DEBUG)
    790 			sc->sc_flags |= BMAC_DEBUGFLAG;
    791 #endif
    792 		break;
    793 
    794 	case SIOCADDMULTI:
    795 	case SIOCDELMULTI:
    796 		error = (cmd == SIOCADDMULTI) ?
    797 		    ether_addmulti(ifr, &sc->sc_ethercom) :
    798 		    ether_delmulti(ifr, &sc->sc_ethercom);
    799 
    800 		if (error == ENETRESET) {
    801 			/*
    802 			 * Multicast list has changed; set the hardware filter
    803 			 * accordingly.
    804 			 */
    805 			if (ifp->if_flags & IFF_RUNNING) {
    806 				bmac_init(sc);
    807 				bmac_setladrf(sc);
    808 			}
    809 			error = 0;
    810 		}
    811 		break;
    812 
    813 	case SIOCGIFMEDIA:
    814 	case SIOCSIFMEDIA:
    815 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
    816 		break;
    817 
    818 	default:
    819 		error = EINVAL;
    820 	}
    821 
    822 	splx(s);
    823 	return error;
    824 }
    825 
    826 int
    827 bmac_mediachange(ifp)
    828 	struct ifnet *ifp;
    829 {
    830 	struct bmac_softc *sc = ifp->if_softc;
    831 
    832 	return mii_mediachg(&sc->sc_mii);
    833 }
    834 
    835 void
    836 bmac_mediastatus(ifp, ifmr)
    837 	struct ifnet *ifp;
    838 	struct ifmediareq *ifmr;
    839 {
    840 	struct bmac_softc *sc = ifp->if_softc;
    841 
    842 	mii_pollstat(&sc->sc_mii);
    843 
    844 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
    845 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
    846 }
    847 
    848 /*
    849  * Set up the logical address filter.
    850  */
    851 void
    852 bmac_setladrf(sc)
    853 	struct bmac_softc *sc;
    854 {
    855 	struct ifnet *ifp = &sc->sc_if;
    856 	struct ether_multi *enm;
    857 	struct ether_multistep step;
    858 	u_int32_t crc;
    859 	u_int16_t hash[4];
    860 	int x;
    861 
    862 	/*
    863 	 * Set up multicast address filter by passing all multicast addresses
    864 	 * through a crc generator, and then using the high order 6 bits as an
    865 	 * index into the 64 bit logical address filter.  The high order bit
    866 	 * selects the word, while the rest of the bits select the bit within
    867 	 * the word.
    868 	 */
    869 
    870 	if (ifp->if_flags & IFF_PROMISC) {
    871 		bmac_set_bits(sc, RXCFG, RxPromiscEnable);
    872 		return;
    873 	}
    874 
    875 	if (ifp->if_flags & IFF_ALLMULTI) {
    876 		hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    877 		goto chipit;
    878 	}
    879 
    880 	hash[3] = hash[2] = hash[1] = hash[0] = 0;
    881 
    882 	ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
    883 	while (enm != NULL) {
    884 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
    885 			/*
    886 			 * We must listen to a range of multicast addresses.
    887 			 * For now, just accept all multicasts, rather than
    888 			 * trying to set only those filter bits needed to match
    889 			 * the range.  (At this time, the only use of address
    890 			 * ranges is for IP multicast routing, for which the
    891 			 * range is big enough to require all bits set.)
    892 			 */
    893 			hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
    894 			ifp->if_flags |= IFF_ALLMULTI;
    895 			goto chipit;
    896 		}
    897 
    898 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
    899 
    900 		/* Just want the 6 most significant bits. */
    901 		crc >>= 26;
    902 
    903 		/* Set the corresponding bit in the filter. */
    904 		hash[crc >> 4] |= 1 << (crc & 0xf);
    905 
    906 		ETHER_NEXT_MULTI(step, enm);
    907 	}
    908 
    909 	ifp->if_flags &= ~IFF_ALLMULTI;
    910 
    911 chipit:
    912 	bmac_write_reg(sc, HASH0, hash[0]);
    913 	bmac_write_reg(sc, HASH1, hash[1]);
    914 	bmac_write_reg(sc, HASH2, hash[2]);
    915 	bmac_write_reg(sc, HASH3, hash[3]);
    916 	x = bmac_read_reg(sc, RXCFG);
    917 	x &= ~RxPromiscEnable;
    918 	x |= RxHashFilterEnable;
    919 	bmac_write_reg(sc, RXCFG, x);
    920 }
    921 
    922 int
    923 bmac_mii_readreg(dev, phy, reg)
    924 	struct device *dev;
    925 	int phy, reg;
    926 {
    927 	return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg);
    928 }
    929 
    930 void
    931 bmac_mii_writereg(dev, phy, reg, val)
    932 	struct device *dev;
    933 	int phy, reg, val;
    934 {
    935 	mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val);
    936 }
    937 
    938 u_int32_t
    939 bmac_mbo_read(dev)
    940 	struct device *dev;
    941 {
    942 	struct bmac_softc *sc = (void *)dev;
    943 
    944 	return bmac_read_reg(sc, MIFCSR);
    945 }
    946 
    947 void
    948 bmac_mbo_write(dev, val)
    949 	struct device *dev;
    950 	u_int32_t val;
    951 {
    952 	struct bmac_softc *sc = (void *)dev;
    953 
    954 	bmac_write_reg(sc, MIFCSR, val);
    955 }
    956 
    957 void
    958 bmac_mii_statchg(dev)
    959 	struct device *dev;
    960 {
    961 	struct bmac_softc *sc = (void *)dev;
    962 	int x;
    963 
    964 	/* Update duplex mode in TX configuration */
    965 	x = bmac_read_reg(sc, TXCFG);
    966 	if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
    967 		x |= TxFullDuplex;
    968 	else
    969 		x &= ~TxFullDuplex;
    970 	bmac_write_reg(sc, TXCFG, x);
    971 
    972 #ifdef BMAC_DEBUG
    973 	printf("bmac_mii_statchg 0x%x\n",
    974 		IFM_OPTIONS(sc->sc_mii.mii_media_active));
    975 #endif
    976 }
    977 
    978 void
    979 bmac_mii_tick(v)
    980 	void *v;
    981 {
    982 	struct bmac_softc *sc = v;
    983 	int s;
    984 
    985 	s = splnet();
    986 	mii_tick(&sc->sc_mii);
    987 	splx(s);
    988 
    989 	callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
    990 }
    991