1 /* $NetBSD: if_bmreg.h,v 1.2 2000/01/25 14:38:50 tsubai Exp $ */ 2 3 /* 4 * Copyright 1991-1998 by Open Software Foundation, Inc. 5 * All Rights Reserved 6 * 7 * Permission to use, copy, modify, and distribute this software and 8 * its documentation for any purpose and without fee is hereby granted, 9 * provided that the above copyright notice appears in all copies and 10 * that both the copyright notice and this permission notice appear in 11 * supporting documentation. 12 * 13 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 14 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 15 * FOR A PARTICULAR PURPOSE. 16 * 17 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 19 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 20 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 21 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 */ 23 24 /* -------------------------------------------------------------------- */ 25 /* Heathrow (F)eature (C)ontrol (R)egister Addresses */ 26 /* -------------------------------------------------------------------- */ 27 #define EnetEnable 0x60000000 /* enable Enet Xcvr/Controller */ 28 #define ResetEnetCell 0x80000000 /* reset Enet cell */ 29 30 /* -------------------------------------------------------------------- */ 31 /* BigMac Register Numbers & Bit Assignments */ 32 /* -------------------------------------------------------------------- */ 33 #define XIFC 0x0000 34 #define TxOutputEnable 0x0001 35 #define MIILoopbackBits 0x0006 36 #define MIIBufferEnable 0x0008 37 #define SQETestEnable 0x0010 38 #define LinkStatus 0x0100 39 #define TXFIFOCSR 0x0100 40 #define TxFIFOEnable 0x0001 41 #define TxFIFO128 0x0000 42 #define TXTH 0x0110 43 #define RXFIFOCSR 0x0120 44 #define RxFIFOEnable TxFIFOEnable 45 #define RxFIFO128 TxFIFO128 46 #define MEMADD 0x0130 47 #define MEMDATAHI 0x0140 48 #define MEMDATALO 0x0150 49 #define XCVRIF 0x0160 50 #define COLActiveLow 0x0002 51 #define SerialMode 0x0004 52 #define ClkBit 0x0008 53 #define CHIPID 0x0170 54 #define MIFCSR 0x0180 55 #define MIFDC 0x0001 /* MII clock */ 56 #define MIFDO 0x0002 /* MII data out */ 57 #define MIFDIR 0x0004 /* MII direction (1: write) */ 58 #define MIFDI 0x0008 /* MII data in */ 59 #define SROMCSR 0x0190 60 #define TXPNTR 0x01A0 61 #define RXPNTR 0x01B0 62 #define STATUS 0x0200 63 #define INTDISABLE 0x0210 64 #define IntFrameReceived 0x0001 65 #define IntRxFrameCntExp 0x0002 66 #define IntRxAlignCntExp 0x0004 67 #define IntRxCRCCntExp 0x0008 68 #define IntRxLenCntExp 0x0010 69 #define IntRxOverFlow 0x0020 70 #define IntRxCodeViolation 0x0040 71 #define IntSQETestError 0x0080 72 #define IntFrameSent 0x0100 73 #define IntTxUnderrun 0x0200 74 #define IntTxMaxSizeError 0x0400 75 #define IntTxNormalCollExp 0x0800 76 #define IntTxExcessCollExp 0x1000 77 #define IntTxLateCollExp 0x2000 78 #define IntTxNetworkCollExp 0x4000 79 #define IntTxDeferTimerExp 0x8000 80 #define NormalIntEvents ~(IntFrameSent) 81 #define NoEventsMask 0xFFFF 82 83 #define TxNeverGiveUp 0x0400 84 #define TXRST 0x0420 85 #define TxResetBit 0x0001 86 #define TXCFG 0x0430 87 #define TxMACEnable 0x0001 88 #define TxThreshold 0x0004 89 #define TxFullDuplex 0x0200 90 #define IPG1 0x0440 91 #define IPG2 0x0450 92 #define ALIMIT 0x0460 93 #define SLOT 0x0470 94 #define PALEN 0x0480 95 #define PAPAT 0x0490 96 #define TXSFD 0x04A0 97 #define JAM 0x04B0 98 #define TXMAX 0x04C0 99 #define TXMIN 0x04D0 100 #define PAREG 0x04E0 101 #define DCNT 0x04F0 102 #define NCCNT 0x0500 103 #define NTCNT 0x0510 104 #define EXCNT 0x0520 105 #define LTCNT 0x0530 106 #define RSEED 0x0540 107 #define TXSM 0x0550 108 #define RXRST 0x0620 109 #define RxResetValue 0x0000 110 #define RXCFG 0x0630 111 #define RxMACEnable 0x0001 112 #define ReservedValue 0x0004 113 #define RxPromiscEnable 0x0040 114 #define RxCRCEnable 0x0100 115 #define RxRejectOwnPackets 0x0200 116 #define RxHashFilterEnable 0x0800 117 #define RxAddrFilterEnable 0x1000 118 #define RXMAX 0x0640 119 #define RXMIN 0x0650 120 #define MADD2 0x0660 121 #define MADD1 0x0670 122 #define MADD0 0x0680 123 #define FRCNT 0x0690 124 #define LECNT 0x06A0 125 #define AECNT 0x06B0 126 #define FECNT 0x06C0 127 #define RXSM 0x06D0 128 #define RXCV 0x06E0 129 #define HASH3 0x0700 130 #define HASH2 0x0710 131 #define HASH1 0x0720 132 #define HASH0 0x0730 133 #define AFR2 0x0740 134 #define AFR1 0x0750 135 #define AFR0 0x0760 136 #define AFCR 0x0770 137 #define EnableAllCompares 0x0fff 138 139 /* -------------------------------------------------------------------- */ 140 /* Misc. Bit definitions for BMac Status word */ 141 /* -------------------------------------------------------------------- */ 142 #define RxAbortBit 0x8000 /* status bit in BMac status for rx packets */ 143 #define RxLengthMask 0x3FFF /* bits that determine length of rx packets */ 144 145 #define NETWORK_BUFSIZE (ETHERMAXPACKET + ETHERCRC + 2) 146
Indexes created Mon Sep 22 13:09:51 GMT 2025