if_mc.c revision 1.26.8.1 1 1.26.8.1 thorpej /* $NetBSD: if_mc.c,v 1.26.8.1 2021/04/03 22:28:29 thorpej Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*-
4 1.1 tsubai * Copyright (c) 1997 David Huang <khym (at) bga.com>
5 1.1 tsubai * All rights reserved.
6 1.1 tsubai *
7 1.1 tsubai * Portions of this code are based on code by Denton Gentry <denny1 (at) home.com>
8 1.1 tsubai * and Yanagisawa Takeshi <yanagisw (at) aa.ap.titech.ac.jp>.
9 1.1 tsubai *
10 1.1 tsubai * Redistribution and use in source and binary forms, with or without
11 1.1 tsubai * modification, are permitted provided that the following conditions
12 1.1 tsubai * are met:
13 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
14 1.1 tsubai * notice, this list of conditions and the following disclaimer.
15 1.1 tsubai * 2. The name of the author may not be used to endorse or promote products
16 1.1 tsubai * derived from this software without specific prior written permission
17 1.1 tsubai *
18 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 1.1 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 1.1 tsubai *
29 1.1 tsubai */
30 1.1 tsubai
31 1.1 tsubai /*
32 1.1 tsubai * Bus attachment and DMA routines for the mc driver (Centris/Quadra
33 1.1 tsubai * 660av and Quadra 840av onboard ethernet, based on the AMD Am79C940
34 1.1 tsubai * MACE ethernet chip). Also uses the PSC (Peripheral Subsystem
35 1.1 tsubai * Controller) for DMA to and from the MACE.
36 1.1 tsubai */
37 1.9 lukem
38 1.9 lukem #include <sys/cdefs.h>
39 1.26.8.1 thorpej __KERNEL_RCSID(0, "$NetBSD: if_mc.c,v 1.26.8.1 2021/04/03 22:28:29 thorpej Exp $");
40 1.1 tsubai
41 1.1 tsubai #include <sys/param.h>
42 1.1 tsubai #include <sys/device.h>
43 1.1 tsubai #include <sys/malloc.h>
44 1.1 tsubai #include <sys/socket.h>
45 1.1 tsubai #include <sys/systm.h>
46 1.1 tsubai
47 1.1 tsubai #include <net/if.h>
48 1.1 tsubai #include <net/if_ether.h>
49 1.1 tsubai #include <net/if_media.h>
50 1.1 tsubai
51 1.1 tsubai #include <dev/ofw/openfirm.h>
52 1.1 tsubai
53 1.21 dyoung #include <sys/bus.h>
54 1.1 tsubai #include <machine/autoconf.h>
55 1.13 garbled #include <machine/pio.h>
56 1.1 tsubai
57 1.1 tsubai #include <macppc/dev/am79c950reg.h>
58 1.1 tsubai #include <macppc/dev/if_mcvar.h>
59 1.1 tsubai
60 1.1 tsubai #define MC_BUFSIZE 0x800
61 1.1 tsubai
62 1.19 matt hide int mc_match(device_t, cfdata_t, void *);
63 1.19 matt hide void mc_attach(device_t, device_t, void *);
64 1.24 msaitoh hide void mc_init(struct mc_softc *);
65 1.24 msaitoh hide void mc_putpacket(struct mc_softc *, u_int);
66 1.24 msaitoh hide int mc_dmaintr(void *);
67 1.24 msaitoh hide void mc_reset_rxdma(struct mc_softc *);
68 1.24 msaitoh hide void mc_reset_txdma(struct mc_softc *);
69 1.24 msaitoh hide void mc_select_utp(struct mc_softc *);
70 1.24 msaitoh hide void mc_select_aui(struct mc_softc *);
71 1.24 msaitoh hide int mc_mediachange(struct mc_softc *);
72 1.24 msaitoh hide void mc_mediastatus(struct mc_softc *, struct ifmediareq *);
73 1.1 tsubai
74 1.1 tsubai int mc_supmedia[] = {
75 1.1 tsubai IFM_ETHER | IFM_10_T,
76 1.1 tsubai IFM_ETHER | IFM_10_5,
77 1.1 tsubai /*IFM_ETHER | IFM_AUTO,*/
78 1.1 tsubai };
79 1.1 tsubai
80 1.24 msaitoh #define N_SUPMEDIA __arraycount(mc_supmedia)
81 1.1 tsubai
82 1.22 macallan CFATTACH_DECL_NEW(mc, sizeof(struct mc_softc),
83 1.7 thorpej mc_match, mc_attach, NULL, NULL);
84 1.1 tsubai
85 1.1 tsubai hide int
86 1.19 matt mc_match(device_t parent, cfdata_t cf, void *aux)
87 1.1 tsubai {
88 1.1 tsubai struct confargs *ca = aux;
89 1.1 tsubai
90 1.1 tsubai if (strcmp(ca->ca_name, "mace") != 0)
91 1.1 tsubai return 0;
92 1.1 tsubai
93 1.1 tsubai /* requires 6 regs */
94 1.1 tsubai if (ca->ca_nreg / sizeof(int) != 6)
95 1.1 tsubai return 0;
96 1.1 tsubai
97 1.1 tsubai /* requires 3 intrs */
98 1.1 tsubai if (ca->ca_nintr / sizeof(int) != 3)
99 1.1 tsubai return 0;
100 1.1 tsubai
101 1.1 tsubai return 1;
102 1.1 tsubai }
103 1.1 tsubai
104 1.1 tsubai hide void
105 1.19 matt mc_attach(device_t parent, device_t self, void *aux)
106 1.1 tsubai {
107 1.1 tsubai struct confargs *ca = aux;
108 1.19 matt struct mc_softc *sc = device_private(self);
109 1.24 msaitoh uint8_t myaddr[ETHER_ADDR_LEN];
110 1.1 tsubai u_int *reg;
111 1.26.8.1 thorpej char intr_xname[INTRDEVNAMEBUF];
112 1.1 tsubai
113 1.22 macallan sc->sc_dev = self;
114 1.1 tsubai sc->sc_node = ca->ca_node;
115 1.14 macallan sc->sc_regt = ca->ca_tag;
116 1.1 tsubai
117 1.1 tsubai reg = ca->ca_reg;
118 1.1 tsubai reg[0] += ca->ca_baseaddr;
119 1.1 tsubai reg[2] += ca->ca_baseaddr;
120 1.1 tsubai reg[4] += ca->ca_baseaddr;
121 1.1 tsubai
122 1.20 matt sc->sc_txdma = mapiodev(reg[2], reg[3], false);
123 1.20 matt sc->sc_rxdma = mapiodev(reg[4], reg[5], false);
124 1.1 tsubai bus_space_map(sc->sc_regt, reg[0], reg[1], 0, &sc->sc_regh);
125 1.14 macallan
126 1.1 tsubai sc->sc_tail = 0;
127 1.23 macallan sc->sc_txdmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 2, NULL);
128 1.23 macallan sc->sc_rxdmacmd = (void *)dbdma_alloc(sizeof(dbdma_command_t) * 8,
129 1.23 macallan NULL);
130 1.5 wiz memset(sc->sc_txdmacmd, 0, sizeof(dbdma_command_t) * 2);
131 1.5 wiz memset(sc->sc_rxdmacmd, 0, sizeof(dbdma_command_t) * 8);
132 1.1 tsubai
133 1.1 tsubai printf(": irq %d,%d,%d",
134 1.1 tsubai ca->ca_intr[0], ca->ca_intr[1], ca->ca_intr[2]);
135 1.1 tsubai
136 1.1 tsubai if (OF_getprop(sc->sc_node, "local-mac-address", myaddr, 6) != 6) {
137 1.1 tsubai printf(": failed to get MAC address.\n");
138 1.1 tsubai return;
139 1.1 tsubai }
140 1.1 tsubai
141 1.24 msaitoh /* Allocate memory for transmit buffer and mark it non-cacheable */
142 1.8 thorpej sc->sc_txbuf = malloc(PAGE_SIZE, M_DEVBUF, M_WAITOK);
143 1.1 tsubai sc->sc_txbuf_phys = kvtop(sc->sc_txbuf);
144 1.8 thorpej memset(sc->sc_txbuf, 0, PAGE_SIZE);
145 1.1 tsubai
146 1.1 tsubai /*
147 1.24 msaitoh * Allocate memory for receive buffer and mark it non-cacheable
148 1.1 tsubai * XXX This should use the bus_dma interface, since the buffer
149 1.1 tsubai * needs to be physically contiguous. However, it seems that
150 1.1 tsubai * at least on my system, malloc() does allocate contiguous
151 1.1 tsubai * memory. If it's not, suggest reducing the number of buffers
152 1.1 tsubai * to 2, which will fit in one 4K page.
153 1.1 tsubai */
154 1.8 thorpej sc->sc_rxbuf = malloc(MC_NPAGES * PAGE_SIZE, M_DEVBUF, M_WAITOK);
155 1.1 tsubai sc->sc_rxbuf_phys = kvtop(sc->sc_rxbuf);
156 1.8 thorpej memset(sc->sc_rxbuf, 0, MC_NPAGES * PAGE_SIZE);
157 1.1 tsubai
158 1.1 tsubai if ((int)sc->sc_txbuf & PGOFSET)
159 1.1 tsubai printf("txbuf is not page-aligned\n");
160 1.1 tsubai if ((int)sc->sc_rxbuf & PGOFSET)
161 1.1 tsubai printf("rxbuf is not page-aligned\n");
162 1.1 tsubai
163 1.1 tsubai sc->sc_bus_init = mc_init;
164 1.1 tsubai sc->sc_putpacket = mc_putpacket;
165 1.1 tsubai
166 1.24 msaitoh /* Disable receive DMA */
167 1.1 tsubai dbdma_reset(sc->sc_rxdma);
168 1.1 tsubai
169 1.24 msaitoh /* Disable transmit DMA */
170 1.1 tsubai dbdma_reset(sc->sc_txdma);
171 1.1 tsubai
172 1.24 msaitoh /* Install interrupt handlers */
173 1.26.8.1 thorpej
174 1.13 garbled /*intr_establish(ca->ca_intr[1], IST_EDGE, IPL_NET, mc_dmaintr, sc);*/
175 1.26.8.1 thorpej
176 1.26.8.1 thorpej snprintf(intr_xname, sizeof(intr_xname), "%s dma", device_xname(self));
177 1.26.8.1 thorpej intr_establish_xname(ca->ca_intr[2], IST_EDGE, IPL_NET, mc_dmaintr, sc,
178 1.26.8.1 thorpej intr_xname);
179 1.26.8.1 thorpej
180 1.26.8.1 thorpej snprintf(intr_xname, sizeof(intr_xname), "%s pio", device_xname(self));
181 1.26.8.1 thorpej intr_establish_xname(ca->ca_intr[0], IST_EDGE, IPL_NET, mcintr, sc,
182 1.26.8.1 thorpej intr_xname);
183 1.1 tsubai
184 1.1 tsubai sc->sc_biucc = XMTSP_64;
185 1.1 tsubai sc->sc_fifocc = XMTFW_16 | RCVFW_64 | XMTFWU | RCVFWU |
186 1.1 tsubai XMTBRST | RCVBRST;
187 1.1 tsubai /*sc->sc_plscc = PORTSEL_10BT;*/
188 1.1 tsubai sc->sc_plscc = PORTSEL_GPSI | ENPLSIO;
189 1.1 tsubai
190 1.1 tsubai /* mcsetup returns 1 if something fails */
191 1.1 tsubai if (mcsetup(sc, myaddr)) {
192 1.1 tsubai printf("mcsetup returns non zero\n");
193 1.1 tsubai return;
194 1.1 tsubai }
195 1.1 tsubai #ifdef NOTYET
196 1.1 tsubai sc->sc_mediachange = mc_mediachange;
197 1.1 tsubai sc->sc_mediastatus = mc_mediastatus;
198 1.1 tsubai sc->sc_supmedia = mc_supmedia;
199 1.1 tsubai sc->sc_nsupmedia = N_SUPMEDIA;
200 1.1 tsubai sc->sc_defaultmedia = IFM_ETHER | IFM_10_T;
201 1.1 tsubai #endif
202 1.1 tsubai }
203 1.1 tsubai
204 1.1 tsubai /* Bus-specific initialization */
205 1.1 tsubai hide void
206 1.16 dsl mc_init(struct mc_softc *sc)
207 1.1 tsubai {
208 1.1 tsubai mc_reset_rxdma(sc);
209 1.1 tsubai mc_reset_txdma(sc);
210 1.1 tsubai }
211 1.1 tsubai
212 1.1 tsubai hide void
213 1.16 dsl mc_putpacket(struct mc_softc *sc, u_int len)
214 1.1 tsubai {
215 1.1 tsubai dbdma_command_t *cmd = sc->sc_txdmacmd;
216 1.1 tsubai
217 1.1 tsubai DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, sc->sc_txbuf_phys,
218 1.1 tsubai DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
219 1.1 tsubai
220 1.1 tsubai dbdma_start(sc->sc_txdma, sc->sc_txdmacmd);
221 1.1 tsubai }
222 1.1 tsubai
223 1.1 tsubai /*
224 1.1 tsubai * Interrupt handler for the MACE DMA completion interrupts
225 1.1 tsubai */
226 1.1 tsubai int
227 1.16 dsl mc_dmaintr(void *arg)
228 1.1 tsubai {
229 1.1 tsubai struct mc_softc *sc = arg;
230 1.1 tsubai int status, offset, statoff;
231 1.1 tsubai int datalen, resid;
232 1.1 tsubai int i, n;
233 1.1 tsubai dbdma_command_t *cmd;
234 1.1 tsubai
235 1.1 tsubai /* We've received some packets from the MACE */
236 1.1 tsubai
237 1.1 tsubai /* Loop through, processing each of the packets */
238 1.1 tsubai i = sc->sc_tail;
239 1.1 tsubai for (n = 0; n < MC_RXDMABUFS; n++, i++) {
240 1.1 tsubai if (i == MC_RXDMABUFS)
241 1.1 tsubai i = 0;
242 1.1 tsubai
243 1.1 tsubai cmd = &sc->sc_rxdmacmd[i];
244 1.2 tsubai /* flushcache(cmd, sizeof(dbdma_command_t)); */
245 1.13 garbled status = in16rb(&cmd->d_status);
246 1.13 garbled resid = in16rb(&cmd->d_resid);
247 1.1 tsubai
248 1.1 tsubai /*if ((status & D_ACTIVE) == 0)*/
249 1.1 tsubai if ((status & 0x40) == 0)
250 1.1 tsubai continue;
251 1.1 tsubai
252 1.1 tsubai #if 1
253 1.13 garbled if (in16rb(&cmd->d_count) != ETHERMTU + 22)
254 1.1 tsubai printf("bad d_count\n");
255 1.1 tsubai #endif
256 1.1 tsubai
257 1.13 garbled datalen = in16rb(&cmd->d_count) - resid;
258 1.1 tsubai datalen -= 4; /* 4 == status bytes */
259 1.1 tsubai
260 1.1 tsubai if (datalen < 4 + sizeof(struct ether_header)) {
261 1.1 tsubai printf("short packet len=%d\n", datalen);
262 1.1 tsubai /* continue; */
263 1.1 tsubai goto next;
264 1.1 tsubai }
265 1.1 tsubai
266 1.1 tsubai offset = i * MC_BUFSIZE;
267 1.1 tsubai statoff = offset + datalen;
268 1.1 tsubai
269 1.1 tsubai DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
270 1.11 perry __asm volatile("eieio");
271 1.1 tsubai
272 1.2 tsubai /* flushcache(sc->sc_rxbuf + offset, datalen + 4); */
273 1.2 tsubai
274 1.1 tsubai sc->sc_rxframe.rx_rcvcnt = sc->sc_rxbuf[statoff + 0];
275 1.1 tsubai sc->sc_rxframe.rx_rcvsts = sc->sc_rxbuf[statoff + 1];
276 1.24 msaitoh sc->sc_rxframe.rx_rntpc = sc->sc_rxbuf[statoff + 2];
277 1.24 msaitoh sc->sc_rxframe.rx_rcvcc = sc->sc_rxbuf[statoff + 3];
278 1.24 msaitoh sc->sc_rxframe.rx_frame = sc->sc_rxbuf + offset;
279 1.1 tsubai
280 1.1 tsubai mc_rint(sc);
281 1.1 tsubai
282 1.1 tsubai next:
283 1.1 tsubai DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
284 1.1 tsubai DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
285 1.11 perry __asm volatile("eieio");
286 1.1 tsubai cmd->d_status = 0;
287 1.1 tsubai cmd->d_resid = 0;
288 1.1 tsubai sc->sc_tail = i + 1;
289 1.1 tsubai }
290 1.1 tsubai
291 1.1 tsubai dbdma_continue(sc->sc_rxdma);
292 1.1 tsubai
293 1.1 tsubai return 1;
294 1.1 tsubai }
295 1.1 tsubai
296 1.1 tsubai hide void
297 1.16 dsl mc_reset_rxdma(struct mc_softc *sc)
298 1.1 tsubai {
299 1.1 tsubai dbdma_command_t *cmd = sc->sc_rxdmacmd;
300 1.1 tsubai dbdma_regmap_t *dmareg = sc->sc_rxdma;
301 1.1 tsubai int i;
302 1.24 msaitoh uint8_t maccc;
303 1.1 tsubai
304 1.1 tsubai /* Disable receiver, reset the DMA channels */
305 1.1 tsubai maccc = NIC_GET(sc, MACE_MACCC);
306 1.1 tsubai NIC_PUT(sc, MACE_MACCC, maccc & ~ENRCV);
307 1.1 tsubai
308 1.1 tsubai dbdma_reset(dmareg);
309 1.1 tsubai
310 1.1 tsubai for (i = 0; i < MC_RXDMABUFS; i++) {
311 1.1 tsubai DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, ETHERMTU + 22,
312 1.1 tsubai sc->sc_rxbuf_phys + MC_BUFSIZE * i, DBDMA_INT_ALWAYS,
313 1.1 tsubai DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
314 1.1 tsubai cmd++;
315 1.1 tsubai }
316 1.1 tsubai
317 1.1 tsubai DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
318 1.1 tsubai DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
319 1.13 garbled out32rb(&cmd->d_cmddep, kvtop((void *)sc->sc_rxdmacmd));
320 1.1 tsubai cmd++;
321 1.1 tsubai
322 1.1 tsubai dbdma_start(dmareg, sc->sc_rxdmacmd);
323 1.1 tsubai
324 1.1 tsubai sc->sc_tail = 0;
325 1.1 tsubai
326 1.1 tsubai /* Reenable receiver, reenable DMA */
327 1.1 tsubai NIC_PUT(sc, MACE_MACCC, maccc);
328 1.1 tsubai }
329 1.1 tsubai
330 1.1 tsubai hide void
331 1.16 dsl mc_reset_txdma(struct mc_softc *sc)
332 1.1 tsubai {
333 1.1 tsubai dbdma_command_t *cmd = sc->sc_txdmacmd;
334 1.1 tsubai dbdma_regmap_t *dmareg = sc->sc_txdma;
335 1.24 msaitoh uint8_t maccc;
336 1.1 tsubai
337 1.24 msaitoh /* Disable transmitter */
338 1.1 tsubai maccc = NIC_GET(sc, MACE_MACCC);
339 1.1 tsubai NIC_PUT(sc, MACE_MACCC, maccc & ~ENXMT);
340 1.1 tsubai
341 1.1 tsubai dbdma_reset(dmareg);
342 1.1 tsubai
343 1.1 tsubai DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, 0, sc->sc_txbuf_phys,
344 1.1 tsubai DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
345 1.1 tsubai cmd++;
346 1.1 tsubai DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
347 1.1 tsubai DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
348 1.1 tsubai
349 1.1 tsubai out32rb(&dmareg->d_cmdptrhi, 0);
350 1.12 christos out32rb(&dmareg->d_cmdptrlo, kvtop((void *)sc->sc_txdmacmd));
351 1.1 tsubai
352 1.24 msaitoh /* Restore old value */
353 1.1 tsubai NIC_PUT(sc, MACE_MACCC, maccc);
354 1.1 tsubai }
355 1.1 tsubai
356 1.1 tsubai void
357 1.16 dsl mc_select_utp(struct mc_softc *sc)
358 1.1 tsubai {
359 1.24 msaitoh
360 1.1 tsubai sc->sc_plscc = PORTSEL_GPSI | ENPLSIO;
361 1.1 tsubai }
362 1.1 tsubai
363 1.1 tsubai void
364 1.16 dsl mc_select_aui(struct mc_softc *sc)
365 1.1 tsubai {
366 1.24 msaitoh
367 1.1 tsubai sc->sc_plscc = PORTSEL_AUI;
368 1.1 tsubai }
369 1.1 tsubai
370 1.1 tsubai int
371 1.16 dsl mc_mediachange(struct mc_softc *sc)
372 1.1 tsubai {
373 1.26 msaitoh struct ifmedia *ifm = &sc->sc_media;
374 1.1 tsubai
375 1.26 msaitoh if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
376 1.1 tsubai return EINVAL;
377 1.1 tsubai
378 1.26 msaitoh switch (IFM_SUBTYPE(ifm->ifm_media)) {
379 1.1 tsubai
380 1.1 tsubai case IFM_10_T:
381 1.1 tsubai mc_select_utp(sc);
382 1.1 tsubai break;
383 1.1 tsubai
384 1.1 tsubai case IFM_10_5:
385 1.1 tsubai mc_select_aui(sc);
386 1.1 tsubai break;
387 1.1 tsubai
388 1.1 tsubai default:
389 1.1 tsubai return EINVAL;
390 1.1 tsubai }
391 1.1 tsubai
392 1.1 tsubai return 0;
393 1.1 tsubai }
394 1.1 tsubai
395 1.1 tsubai void
396 1.16 dsl mc_mediastatus(struct mc_softc *sc, struct ifmediareq *ifmr)
397 1.1 tsubai {
398 1.24 msaitoh
399 1.1 tsubai if (sc->sc_plscc == PORTSEL_AUI)
400 1.1 tsubai ifmr->ifm_active = IFM_ETHER | IFM_10_5;
401 1.1 tsubai else
402 1.1 tsubai ifmr->ifm_active = IFM_ETHER | IFM_10_T;
403 1.1 tsubai }
404