admpci.c revision 1.16
1 /* $NetBSD: admpci.c,v 1.16 2021/08/07 16:18:58 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 David Young. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or 7 * without modification, are permitted provided that the following 8 * conditions are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY 17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 19 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 21 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 27 * OF SUCH DAMAGE. 28 */ 29 /*- 30 * Copyright (c) 2006 Itronix Inc. 31 * All rights reserved. 32 * 33 * Written by Garrett D'Amore for Itronix Inc. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of Itronix Inc. may not be used to endorse 44 * or promote products derived from this software without specific 45 * prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 51 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 53 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 54 * ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 #include "opt_pci.h" 61 #include "pci.h" 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: admpci.c,v 1.16 2021/08/07 16:18:58 thorpej Exp $"); 65 66 #include <sys/param.h> 67 #include <sys/types.h> 68 #include <sys/bus.h> 69 #include <sys/cpu.h> 70 #include <sys/time.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 #include <sys/extent.h> 76 77 #include <uvm/uvm_extern.h> 78 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pciconf.h> 82 83 #ifdef PCI_NETBSD_CONFIGURE 84 #include <mips/cache.h> 85 #endif 86 87 #include <mips/adm5120/include/adm5120_mainbusvar.h> 88 #include <mips/adm5120/include/adm5120reg.h> 89 #include <mips/adm5120/include/adm5120var.h> 90 91 #ifdef ADMPCI_DEBUG 92 int admpci_debug = 1; 93 #define ADMPCI_DPRINTF(__fmt, ...) \ 94 do { \ 95 if (admpci_debug) \ 96 printf((__fmt), __VA_ARGS__); \ 97 } while (/*CONSTCOND*/0) 98 #else /* !ADMPCI_DEBUG */ 99 #define ADMPCI_DPRINTF(__fmt, ...) do { } while (/*CONSTCOND*/0) 100 #endif /* ADMPCI_DEBUG */ 101 102 #define ADMPCI_TAG_BUS_MASK __BITS(23, 16) 103 /* Bit 11 is reserved. It selects the AHB-PCI bridge. Let device 0 104 * be the bridge. For all other device numbers, let bit[11] == 0. 105 */ 106 #define ADMPCI_TAG_DEVICE_MASK __BITS(15, 11) 107 #define ADMPCI_TAG_DEVICE_SUBMASK __BITS(15, 12) 108 #define ADMPCI_TAG_DEVICE_BRIDGE __BIT(11) 109 #define ADMPCI_TAG_FUNCTION_MASK __BITS(10, 8) 110 #define ADMPCI_TAG_REGISTER_MASK __BITS(7, 0) 111 112 #define ADMPCI_MAX_DEVICE 113 114 struct admpci_softc { 115 device_t sc_dev; 116 struct mips_pci_chipset sc_pc; 117 118 bus_space_tag_t sc_memt; 119 bus_space_tag_t sc_iot; 120 121 bus_space_tag_t sc_conft; 122 bus_space_handle_t sc_addrh; 123 bus_space_handle_t sc_datah; 124 }; 125 126 int admpcimatch(device_t, cfdata_t, void *); 127 void admpciattach(device_t, device_t, void *); 128 129 #if NPCI > 0 130 static void admpci_attach_hook(device_t, device_t, 131 struct pcibus_attach_args *); 132 static int admpci_bus_maxdevs(void *, int); 133 static pcitag_t admpci_make_tag(void *, int, int, int); 134 static void admpci_decompose_tag(void *, pcitag_t, int *, int *, int *); 135 static pcireg_t admpci_conf_read(void *, pcitag_t, int); 136 static void admpci_conf_write(void *, pcitag_t, int, pcireg_t); 137 static const char *admpci_intr_string(void *, pci_intr_handle_t, char *, size_t); 138 static void admpci_conf_interrupt(void *, int, int, int, int, int *); 139 static void *admpci_intr_establish(void *, pci_intr_handle_t, int, 140 int (*)(void *), void *); 141 static void admpci_intr_disestablish(void *, void *); 142 static int admpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 143 #endif /* NPCI > 0 */ 144 145 CFATTACH_DECL_NEW(admpci, sizeof(struct admpci_softc), 146 admpcimatch, admpciattach, NULL, NULL); 147 148 int admpci_found = 0; 149 150 /* 151 * Physical PCI addresses are 36-bits long, so we need to have 152 * adequate storage space for them. 153 */ 154 #if NPCI > 0 155 #if !defined(_MIPS_PADDR_T_64BIT) && !defined(_LP64) 156 #error "admpci requires 64 bit paddr_t!" 157 #endif 158 #endif 159 160 #define PCI_IO_START ADM5120_BASE_PCI_IO 161 #define PCI_IO_SIZE (ADM5120_BASE_PCI_CONFADDR - ADM5120_BASE_PCI_IO) 162 163 #define PCI_MEM_START1 ADM5120_BASE_PCI_MEM 164 #define PCI_MEM_SIZE1 (ADM5120_BASE_PCI_IO - ADM5120_BASE_PCI_MEM) 165 166 #define PCI_MEM_START2 ADM5120_BOTTOM 167 #define PCI_MEM_SIZE2 (ADM5120_BASE_SRAM1 - ADM5120_BOTTOM) 168 169 int 170 admpcimatch(device_t parent, cfdata_t match, void *aux) 171 { 172 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 173 174 return !admpci_found && strcmp(ma->ma_name, "admpci") == 0; 175 } 176 177 void 178 admpciattach(device_t parent, device_t self, void *aux) 179 { 180 struct adm5120_config *admc = &adm5120_configuration; 181 struct admpci_softc *sc = device_private(self); 182 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 183 #if NPCI > 0 184 struct pcibus_attach_args pba; 185 #endif 186 187 admpci_found = 1; 188 189 sc->sc_dev = self; 190 sc->sc_conft = ma->ma_obiot; 191 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFDATA, 4, 0, 192 &sc->sc_datah) != 0) { 193 aprint_error( 194 ": unable to map PCI Configuration Data register\n"); 195 return; 196 } 197 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFADDR, 4, 0, 198 &sc->sc_addrh) != 0) { 199 aprint_error( 200 ": unable to map PCI Configuration Address register\n"); 201 return; 202 } 203 204 aprint_normal(": ADM5120 Host-PCI Bridge, " 205 "data %"PRIxBSH" addr %"PRIxBSH", sc %p\n", 206 sc->sc_datah, sc->sc_addrh, sc); 207 208 #if NPCI > 0 209 sc->sc_memt = &admc->pcimem_space; 210 sc->sc_iot = &admc->pciio_space; 211 212 sc->sc_pc.pc_conf_v = sc; 213 sc->sc_pc.pc_attach_hook = admpci_attach_hook; 214 sc->sc_pc.pc_bus_maxdevs = admpci_bus_maxdevs; 215 sc->sc_pc.pc_make_tag = admpci_make_tag; 216 sc->sc_pc.pc_decompose_tag = admpci_decompose_tag; 217 sc->sc_pc.pc_conf_read = admpci_conf_read; 218 sc->sc_pc.pc_conf_write = admpci_conf_write; 219 220 sc->sc_pc.pc_intr_v = sc; 221 sc->sc_pc.pc_intr_map = admpci_intr_map; 222 sc->sc_pc.pc_intr_string = admpci_intr_string; 223 sc->sc_pc.pc_intr_establish = admpci_intr_establish; 224 sc->sc_pc.pc_intr_disestablish = admpci_intr_disestablish; 225 sc->sc_pc.pc_conf_interrupt = admpci_conf_interrupt; 226 227 #ifdef ADMPCI_DEBUG 228 pcitag_t tag = pci_make_tag(&sc->sc_pc, 0, 0, 0); 229 ADMPCI_DPRINTF("%s: BAR 0x10 0x%08x\n", __func__, 230 pci_conf_read(&sc->sc_pc, tag, PCI_MAPREG_START)); 231 #endif 232 233 #ifdef PCI_NETBSD_CONFIGURE 234 struct pciconf_resources *pcires = pciconf_resource_init(); 235 236 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO, 237 PCI_IO_START, PCI_IO_SIZE); 238 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 239 PCI_MEM_START1, PCI_MEM_SIZE1); 240 241 /* XXX Is this one really needed? */ 242 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 243 PCI_MEM_START2, PCI_MEM_SIZE2); 244 245 pci_configure_bus(&sc->sc_pc, pcires, 246 0, mips_cache_info.mci_dcache_align); 247 248 pciconf_resource_fini(pcires); 249 #endif 250 251 pba.pba_iot = sc->sc_iot; 252 pba.pba_memt = sc->sc_memt; 253 /* XXX: review dma tag logic */ 254 pba.pba_dmat = ma->ma_dmat; 255 pba.pba_dmat64 = NULL; 256 pba.pba_pc = &sc->sc_pc; 257 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 258 pba.pba_bus = 0; 259 pba.pba_bridgetag = NULL; 260 261 config_found(self, &pba, pcibusprint, 262 CFARGS(.iattr = "pcibus")); 263 #endif /* NPCI > 0 */ 264 } 265 266 #if NPCI > 0 267 268 void 269 admpci_attach_hook(device_t parent, device_t self, 270 struct pcibus_attach_args *pba) 271 { 272 } 273 274 /* There are at most four devices on bus 0. The ADM5120 has 275 * request/grant lines for 3 PCI devices: 1, 2, and 3. The host 276 * bridge is device 0. 277 */ 278 int 279 admpci_bus_maxdevs(void *v, int bus) 280 { 281 if (bus == 0) 282 return 4; 283 284 return 1 + __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK); 285 } 286 287 pcitag_t 288 admpci_make_tag(void *v, int bus, int device, int function) 289 { 290 if (bus > __SHIFTOUT_MASK(ADMPCI_TAG_BUS_MASK) || 291 device > __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK) || 292 function > __SHIFTOUT_MASK(ADMPCI_TAG_FUNCTION_MASK)) 293 panic("%s: bad request", __func__); 294 295 return __SHIFTIN(bus, ADMPCI_TAG_BUS_MASK) | 296 __SHIFTIN(device, ADMPCI_TAG_DEVICE_MASK) | 297 __SHIFTIN(function, ADMPCI_TAG_FUNCTION_MASK); 298 } 299 300 void 301 admpci_decompose_tag(void *v, pcitag_t tag, int *b, int *d, int *f) 302 { 303 int bus, device, function; 304 305 bus = __SHIFTOUT(tag, ADMPCI_TAG_BUS_MASK); 306 device = __SHIFTOUT(tag, ADMPCI_TAG_DEVICE_MASK); 307 function = __SHIFTOUT(tag, ADMPCI_TAG_FUNCTION_MASK); 308 309 if (b != NULL) 310 *b = bus; 311 if (d != NULL) 312 *d = device; 313 if (f != NULL) 314 *f = function; 315 } 316 317 static int 318 admpci_tag_to_addr(void *v, pcitag_t tag, int reg, bus_addr_t *addrp) 319 { 320 int bus, device, function; 321 322 KASSERT(addrp != NULL); 323 324 if ((unsigned int)reg >= PCI_CONF_SIZE) 325 return -1; 326 327 /* panics if tag is not well-formed */ 328 admpci_decompose_tag(v, tag, &bus, &device, &function); 329 if (reg > __SHIFTOUT_MASK(ADMPCI_TAG_REGISTER_MASK)) 330 panic("%s: bad register", __func__); 331 332 *addrp = 0x80000000 | tag | __SHIFTIN(reg, ADMPCI_TAG_REGISTER_MASK); 333 334 return 0; 335 } 336 337 static pcireg_t 338 admpci_conf_read(void *v, pcitag_t tag, int reg) 339 { 340 int s; 341 struct admpci_softc *sc = (struct admpci_softc *)v; 342 uint32_t data; 343 bus_addr_t addr; 344 345 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 346 reg); 347 348 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 349 return 0xffffffff; 350 351 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 352 sc->sc_addrh, sc->sc_datah, addr); 353 354 s = splhigh(); 355 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 356 data = bus_space_read_4(sc->sc_conft, sc->sc_datah, 0); 357 splx(s); 358 359 ADMPCI_DPRINTF("%s: read 0x%" PRIx32 "\n", __func__, data); 360 return data; 361 } 362 363 void 364 admpci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 365 { 366 int s; 367 struct admpci_softc *sc = (struct admpci_softc *)v; 368 bus_addr_t addr; 369 370 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 371 reg); 372 373 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 374 return; 375 376 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 377 sc->sc_addrh, sc->sc_datah, addr); 378 379 s = splhigh(); 380 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 381 bus_space_write_4(sc->sc_conft, sc->sc_datah, 0, data); 382 splx(s); 383 } 384 385 const char * 386 admpci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 387 { 388 (void)snprintf(buf, len, "irq %u", (unsigned)ih); 389 return buf; 390 } 391 392 void * 393 admpci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 394 int (*handler)(void *), void *arg) 395 { 396 return adm5120_intr_establish(ih, ipl, handler, arg); 397 } 398 399 void 400 admpci_intr_disestablish(void *v, void *cookie) 401 { 402 adm5120_intr_disestablish(cookie); 403 } 404 405 void 406 admpci_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *iline) 407 { 408 /* 409 * We let the machdep_pci_intr_map take care of IRQ routing. 410 * On some platforms the BIOS may have handled this properly, 411 * on others it might not have. For now we avoid clobbering 412 * the settings establishsed by the BIOS, so that they will be 413 * there if the platform logic is confident that it can rely 414 * on them. 415 */ 416 } 417 418 /* 419 * Map the bus 0 device numbers 1, 2, and 3 to IRQ 6, 7, and 8, 420 * respectively. 421 * 422 * XXX How to handle bridges? 423 */ 424 static int 425 admpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 426 { 427 int bus, device, function; 428 429 admpci_decompose_tag(pa->pa_pc->pc_conf_v, pa->pa_tag, 430 &bus, &device, &function); 431 432 if (bus != 0 || device > 3) 433 return -1; 434 435 *ihp = (device - 1) + 6; 436 437 return 0; 438 } 439 #endif 440
Indexes created Mon Oct 27 08:10:08 GMT 2025