if_admswvar.h revision 1.7
1 /* $NetBSD: if_admswvar.h,v 1.7 2020/04/16 21:56:41 rin Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or 8 * without modification, are permitted provided that the following 9 * conditions are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above 13 * copyright notice, this list of conditions and the following 14 * disclaimer in the documentation and/or other materials provided 15 * with the distribution. 16 * 3. The names of the authors may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 27 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 29 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 #ifndef _IF_ADMSWVAR_H_ 34 #define _IF_ADMSWVAR_H_ 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/callout.h> 39 #include <sys/device.h> 40 #include <sys/endian.h> 41 #include <sys/errno.h> 42 #include <sys/intr.h> 43 #include <sys/ioctl.h> 44 #include <sys/kernel.h> 45 #include <sys/malloc.h> 46 #include <sys/mbuf.h> 47 #include <sys/socket.h> 48 #include <sys/systm.h> 49 #include <sys/wdog.h> 50 51 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 61 #include <dev/sysmon/sysmonvar.h> 62 63 #include <mips/adm5120/include/adm5120reg.h> 64 #include <mips/adm5120/include/adm5120var.h> 65 #include <mips/adm5120/include/adm5120_obiovar.h> 66 67 #include <mips/adm5120/dev/if_admswreg.h> 68 69 #define ADMSW_EVENT_COUNTERS 70 71 #define MAC_BUFLEN 0x07ff 72 73 #define ADMSW_NTXHDESC 4 74 #define ADMSW_NRXHDESC 32 75 #define ADMSW_NTXLDESC 32 76 #define ADMSW_NRXLDESC 32 77 78 #define ADMSW_NTXHDESC_MASK (ADMSW_NTXHDESC - 1) 79 #define ADMSW_NRXHDESC_MASK (ADMSW_NRXHDESC - 1) 80 #define ADMSW_NTXLDESC_MASK (ADMSW_NTXLDESC - 1) 81 #define ADMSW_NRXLDESC_MASK (ADMSW_NRXLDESC - 1) 82 83 #define ADMSW_NEXTTXH(x) (((x) + 1) & ADMSW_NTXHDESC_MASK) 84 #define ADMSW_NEXTRXH(x) (((x) + 1) & ADMSW_NRXHDESC_MASK) 85 #define ADMSW_NEXTTXL(x) (((x) + 1) & ADMSW_NTXLDESC_MASK) 86 #define ADMSW_NEXTRXL(x) (((x) + 1) & ADMSW_NRXLDESC_MASK) 87 88 struct admsw_control_data { 89 /* The transmit descriptors. */ 90 struct admsw_desc acd_txhdescs[ADMSW_NTXHDESC]; 91 92 /* The receive descriptors. */ 93 struct admsw_desc acd_rxhdescs[ADMSW_NRXHDESC]; 94 95 /* The transmit descriptors. */ 96 struct admsw_desc acd_txldescs[ADMSW_NTXLDESC]; 97 98 /* The receive descriptors. */ 99 struct admsw_desc acd_rxldescs[ADMSW_NRXLDESC]; 100 }; 101 102 #define ADMSW_CDOFF(x) offsetof(struct admsw_control_data, x) 103 #define ADMSW_CDTXHOFF(x) ADMSW_CDOFF(acd_txhdescs[(x)]) 104 #define ADMSW_CDTXLOFF(x) ADMSW_CDOFF(acd_txldescs[(x)]) 105 #define ADMSW_CDRXHOFF(x) ADMSW_CDOFF(acd_rxhdescs[(x)]) 106 #define ADMSW_CDRXLOFF(x) ADMSW_CDOFF(acd_rxldescs[(x)]) 107 108 struct admsw_descsoft { 109 struct mbuf *ds_mbuf; 110 bus_dmamap_t ds_dmamap; 111 }; 112 113 /* 114 * Software state per device. 115 */ 116 struct admsw_softc { 117 device_t sc_dev; /* generic device information */ 118 uint8_t sc_enaddr[ETHER_ADDR_LEN]; 119 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 120 bus_space_tag_t sc_st; /* bus space tag */ 121 bus_space_handle_t sc_ioh; /* MAC space handle */ 122 struct sysmon_wdog sc_smw; 123 struct ifmedia sc_ifmedia[SW_DEVS]; 124 int ndevs; /* number of IFF_RUNNING interfaces */ 125 struct ethercom sc_ethercom[SW_DEVS]; /* Ethernet common data */ 126 void *sc_sdhook; /* shutdown hook */ 127 void *sc_ih; /* interrupt cookie */ 128 struct admsw_descsoft sc_txhsoft[ADMSW_NTXHDESC]; 129 struct admsw_descsoft sc_rxhsoft[ADMSW_NRXHDESC]; 130 struct admsw_descsoft sc_txlsoft[ADMSW_NTXLDESC]; 131 struct admsw_descsoft sc_rxlsoft[ADMSW_NRXLDESC]; 132 bus_dmamap_t sc_cddmamap; /* control data DMA map */ 133 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 134 struct admsw_control_data *sc_control_data; 135 #define sc_txhdescs sc_control_data->acd_txhdescs 136 #define sc_rxhdescs sc_control_data->acd_rxhdescs 137 #define sc_txldescs sc_control_data->acd_txldescs 138 #define sc_rxldescs sc_control_data->acd_rxldescs 139 140 int sc_txfree; /* number of free Tx descriptors */ 141 int sc_txnext; /* next Tx descriptor to use */ 142 int sc_txdirty; /* first dirty Tx descriptor */ 143 144 int sc_rxptr; /* next ready Rx descriptor */ 145 146 #ifdef ADMSW_EVENT_COUNTERS 147 struct evcnt sc_ev_txstall; /* Tx stalled */ 148 struct evcnt sc_ev_rxstall; /* Rx stalled */ 149 struct evcnt sc_ev_txintr; /* Tx interrupts */ 150 struct evcnt sc_ev_rxintr; /* Rx interrupts */ 151 #if 1 152 struct evcnt sc_ev_rxsync; /* Rx syncs */ 153 #endif 154 #endif 155 156 }; 157 158 #define ADMSW_CDTXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXHOFF((x))) 159 #define ADMSW_CDTXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXLOFF((x))) 160 #define ADMSW_CDRXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXHOFF((x))) 161 #define ADMSW_CDRXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXLOFF((x))) 162 163 #define ADMSW_CDTXHSYNC(sc, x, ops) \ 164 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 165 ADMSW_CDTXHOFF((x)), sizeof(struct admsw_desc), (ops)) 166 167 #define ADMSW_CDTXLSYNC(sc, x, ops) \ 168 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 169 ADMSW_CDTXLOFF((x)), sizeof(struct admsw_desc), (ops)) 170 171 #define ADMSW_CDRXHSYNC(sc, x, ops) \ 172 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 173 ADMSW_CDRXHOFF((x)), sizeof(struct admsw_desc), (ops)) 174 175 #define ADMSW_CDRXLSYNC(sc, x, ops) \ 176 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ 177 ADMSW_CDRXLOFF((x)), sizeof(struct admsw_desc), (ops)) 178 179 #define ADMSW_INIT_RXHDESC(sc, x) \ 180 do { \ 181 struct admsw_descsoft *__ds = &(sc)->sc_rxhsoft[(x)]; \ 182 struct admsw_desc *__desc = &(sc)->sc_rxhdescs[(x)]; \ 183 struct mbuf *__m = __ds->ds_mbuf; \ 184 \ 185 __m->m_data = __m->m_ext.ext_buf + 2; \ 186 __desc->data = __ds->ds_dmamap->dm_segs[0].ds_addr + 2; \ 187 __desc->cntl = 0; \ 188 __desc->len = uimin(MCLBYTES - 2, MAC_BUFLEN - 2); \ 189 __desc->status = 0; \ 190 if ((x) == ADMSW_NRXHDESC - 1) \ 191 __desc->data |= ADM5120_DMA_RINGEND; \ 192 __desc->data |= ADM5120_DMA_OWN; \ 193 ADMSW_CDRXHSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 194 } while (0) 195 196 #define ADMSW_INIT_RXLDESC(sc, x) \ 197 do { \ 198 struct admsw_descsoft *__ds = &(sc)->sc_rxlsoft[(x)]; \ 199 struct admsw_desc *__desc = &(sc)->sc_rxldescs[(x)]; \ 200 struct mbuf *__m = __ds->ds_mbuf; \ 201 \ 202 __m->m_data = __m->m_ext.ext_buf + 2; \ 203 __desc->data = __ds->ds_dmamap->dm_segs[0].ds_addr + 2; \ 204 __desc->cntl = 0; \ 205 __desc->len = uimin(MCLBYTES - 2, MAC_BUFLEN - 2); \ 206 __desc->status = 0; \ 207 if ((x) == ADMSW_NRXLDESC - 1) \ 208 __desc->data |= ADM5120_DMA_RINGEND; \ 209 __desc->data |= ADM5120_DMA_OWN; \ 210 ADMSW_CDRXLSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 211 } while (0) 212 213 void admwdog_attach(struct admsw_softc *); 214 215 #endif /* _IF_ADMSWVAR_H_ */ 216
Indexes created Mon Oct 20 20:10:13 GMT 2025