uart.c revision 1.10 1 /* $NetBSD: uart.c,v 1.10 2014/03/16 05:20:25 dholland Exp $ */
2
3 /*-
4 * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or
8 * without modification, are permitted provided that the following
9 * conditions are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above
13 * copyright notice, this list of conditions and the following
14 * disclaimer in the documentation and/or other materials provided
15 * with the distribution.
16 * 3. The names of the authors may not be used to endorse or promote
17 * products derived from this software without specific prior
18 * written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
27 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
29 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: uart.c,v 1.10 2014/03/16 05:20:25 dholland Exp $");
36
37 #include <sys/param.h>
38 #include <sys/bus.h>
39 #include <sys/conf.h>
40 #include <sys/device.h>
41 #include <sys/ioctl.h>
42 #include <sys/intr.h>
43 #include <sys/kauth.h>
44 #include <sys/kernel.h>
45 #include <sys/proc.h>
46 #include <sys/tty.h>
47
48 #include <dev/cons.h>
49
50 #include <mips/adm5120/include/adm5120var.h>
51 #include <mips/adm5120/include/adm5120_obiovar.h>
52 #include <mips/adm5120/dev/uart.h>
53
54 #define REG_READ(o) bus_space_read_4(sc->sc_st, sc->sc_ioh, (o))
55 #define REG_WRITE(o,v) bus_space_write_4(sc->sc_st, sc->sc_ioh, (o),(v))
56
57 cons_decl(uart_);
58
59 dev_type_open(uart_open);
60 dev_type_open(uart_close);
61 dev_type_read(uart_read);
62 dev_type_write(uart_write);
63 dev_type_ioctl(uart_ioctl);
64 dev_type_tty(uart_tty);
65 dev_type_poll(uart_poll);
66 dev_type_stop(uart_stop);
67
68 const struct cdevsw uart_cdevsw = {
69 .d_open = uart_open,
70 .d_close = uart_close,
71 .d_read = uart_read,
72 .d_write = uart_write,
73 .d_ioctl = uart_ioctl,
74 .d_stop = uart_stop,
75 .d_tty = uart_tty,
76 .d_poll = uart_poll,
77 .d_mmap = nommap,
78 .d_kqfilter = ttykqfilter,
79 .d_flag = D_TTY
80 };
81
82 struct consdev uartcons = {
83 .cn_getc = uart_cngetc,
84 .cn_putc = uart_cnputc,
85 .cn_pollc = uart_cnpollc,
86 .cn_dev = NODEV,
87 .cn_pri = CN_NORMAL
88 };
89
90 struct uart_softc {
91 device_t sc_dev;
92 struct tty * sc_tty;
93
94 bus_space_tag_t sc_st;
95 bus_space_handle_t sc_ioh;
96 void * sc_ih;
97 };
98
99 extern struct cfdriver uart_cd;
100 static int uart_consattached;
101
102 static int uart_probe (device_t, cfdata_t, void *);
103 static void uart_attach (device_t, device_t, void *);
104
105 void uart_start(struct tty *);
106 int uart_param(struct tty *, struct termios *);
107 int uart_intr(void *);
108
109 CFATTACH_DECL_NEW(uart, sizeof(struct uart_softc),
110 uart_probe, uart_attach, NULL, NULL);
111
112 static int
113 uart_probe(device_t parent, cfdata_t cf, void *aux)
114 {
115 struct obio_attach_args * const oba = aux;
116
117 if (strcmp(oba->oba_name, cf->cf_name) == 0)
118 return (1);
119
120 return (0);
121 }
122
123 static void
124 uart_attach(device_t parent, device_t self, void *aux)
125 {
126 struct obio_attach_args * const oba = aux;
127 struct uart_softc * const sc = device_private(self);
128 struct tty *tp;
129 int maj, minor;
130
131 sc->sc_dev = self;
132 sc->sc_st = oba->oba_st;
133 if (bus_space_map(oba->oba_st, oba->oba_addr, 256, 0, &sc->sc_ioh)) {
134 aprint_error("unable to map device\n");
135 return;
136 }
137
138 /* Establish the interrupt. */
139 sc->sc_ih = adm5120_intr_establish(oba->oba_irq, INTR_FIQ, uart_intr, sc);
140 if (sc->sc_ih == NULL) {
141 aprint_error("unable to establish interrupt\n");
142 return;
143 }
144 REG_WRITE(UART_CR_REG,UART_CR_PORT_EN|UART_CR_RX_INT_EN|UART_CR_RX_TIMEOUT_INT_EN);
145
146 maj = cdevsw_lookup_major(&uart_cdevsw);
147 minor = device_unit(sc->sc_dev);
148
149 tp = tty_alloc();
150 tp->t_oproc = uart_start;
151 tp->t_param = uart_param;
152 sc->sc_tty = tp;
153 tp->t_dev = makedev(maj, minor);
154 tty_attach(tp);
155 if (minor == 0 && uart_consattached) {
156 /* attach as console*/
157 cn_tab->cn_dev = tp->t_dev;
158 aprint_normal(" console");
159 }
160 aprint_normal("\n");
161 }
162
163 int
164 uart_cnattach(void)
165 {
166 cn_tab = &uartcons;
167 uart_consattached = 1;
168 return (0);
169 }
170
171 void
172 uart_cnputc(dev_t dev, int c)
173 {
174 char chr;
175 chr = c;
176 while ((*((volatile unsigned long *)0xb2600018)) & 0x20)
177 continue;
178 (*((volatile unsigned long *)0xb2600000)) = c;
179 }
180
181 int
182 uart_cngetc(dev_t dev)
183 {
184 while ((*((volatile unsigned long *)0xb2600018)) & 0x10)
185 continue;
186 return (*((volatile unsigned long *)0xb2600000)) & 0xff;
187 }
188
189 void
190 uart_cnpollc(dev_t dev, int on)
191 {
192
193 }
194
195
196 /*
197 * TTY device
198 */
199
200 int
201 uart_open(dev_t dev, int flag, int mode, struct lwp *l)
202 {
203 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
204 struct tty *tp = sc->sc_tty;
205 int s, error = 0;
206
207 s = spltty();
208
209 tp->t_dev = dev;
210 if ((tp->t_state & TS_ISOPEN) == 0) {
211 tp->t_state |= TS_CARR_ON;
212 ttychars(tp);
213 tp->t_iflag = TTYDEF_IFLAG;
214 tp->t_oflag = TTYDEF_OFLAG;
215 tp->t_cflag = TTYDEF_CFLAG | CLOCAL;
216 tp->t_lflag = TTYDEF_LFLAG;
217 tp->t_ispeed = tp->t_ospeed = 115200;
218 ttsetwater(tp);
219 } else if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN,
220 tp) != 0) {
221 splx(s);
222 return (EBUSY);
223 }
224
225 splx(s);
226
227 error = (*tp->t_linesw->l_open)(dev, tp);
228
229 return (error);
230 }
231
232 int
233 uart_close(dev_t dev, int flag, int mode, struct lwp *l)
234 {
235 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
236 struct tty *tp = sc->sc_tty;
237
238 (*tp->t_linesw->l_close)(tp, flag);
239 ttyclose(tp);
240 return (0);
241 }
242
243
244 int
245 uart_read(dev_t dev, struct uio *uio, int flag)
246 {
247 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
248 struct tty *tp = sc->sc_tty;
249
250 return ((*tp->t_linesw->l_read)(tp, uio, flag));
251 }
252
253 int
254 uart_write(dev_t dev, struct uio *uio, int flag)
255 {
256 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
257 struct tty *tp = sc->sc_tty;
258
259 return ((*tp->t_linesw->l_write)(tp, uio, flag));
260 }
261
262 int
263 uart_poll(dev_t dev, int events, struct lwp *l)
264 {
265 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
266 struct tty *tp = sc->sc_tty;
267
268 return ((*tp->t_linesw->l_poll)(tp, events, l));
269 }
270
271 int
272 uart_ioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
273 {
274 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
275 struct tty *tp = sc->sc_tty;
276 int error;
277
278 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
279 if (error != EPASSTHROUGH)
280 return (error);
281 return (ttioctl(tp, cmd, data, flag, l));
282 }
283
284 int
285 uart_param(struct tty *tp, struct termios *t)
286 {
287
288 return (0);
289 }
290
291 struct tty*
292 uart_tty(dev_t dev)
293 {
294 struct uart_softc *sc = device_lookup_private(&uart_cd, minor(dev));
295
296 return sc->sc_tty;
297 }
298
299
300 void
301 uart_start(struct tty *tp)
302 {
303 int s,i,cnt;
304
305 s = spltty();
306 if (tp->t_state & (TS_TTSTOP | TS_BUSY))
307 goto out;
308 ttypull(tp);
309 tp->t_state |= TS_BUSY;
310 while (tp->t_outq.c_cc != 0) {
311 cnt = ndqb(&tp->t_outq, 0);
312 for (i=0; i<cnt; i++)
313 uart_cnputc(0,tp->t_outq.c_cf[i]);
314 ndflush(&tp->t_outq, cnt);
315 }
316 tp->t_state &= ~TS_BUSY;
317 out:
318 splx(s);
319 }
320
321 void
322 uart_stop(struct tty *tp, int flag)
323 {
324 int s;
325
326 s = spltty();
327 if (tp->t_state & TS_BUSY)
328 if ((tp->t_state & TS_TTSTOP) == 0)
329 tp->t_state |= TS_FLUSH;
330 splx(s);
331 }
332
333 int
334 uart_intr(void *v)
335 {
336 struct uart_softc *sc = v;
337 struct tty *tp = sc->sc_tty;
338 int c, l_r;
339
340 if (REG_READ(UART_RSR_REG) & UART_RSR_BE) {
341 REG_WRITE(UART_ECR_REG, UART_ECR_RSR);
342 console_debugger();
343 }
344
345 while ((REG_READ(UART_FR_REG) & UART_FR_RX_FIFO_EMPTY) == 0) {
346 c = REG_READ(UART_DR_REG) & 0xff;
347 if (tp->t_state & TS_ISOPEN)
348 l_r = (*tp->t_linesw->l_rint)(c, tp);
349 }
350 return 0;
351 }
352