augpio.c revision 1.2
1 /* $NetBSD: augpio.c,v 1.2 2006/02/13 04:30:47 gdamore Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 Itronix Inc. 5 * All rights reserved. 6 * 7 * Written by Garrett D'Amore for Itronix Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of Itronix Inc. may not be used to endorse 18 * or promote products derived from this software without specific 19 * prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: augpio.c,v 1.2 2006/02/13 04:30:47 gdamore Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/errno.h> 41 #include <sys/device.h> 42 #include <sys/gpio.h> 43 #include <sys/kernel.h> 44 45 #include <dev/gpio/gpiovar.h> 46 47 #include <machine/bus.h> 48 #include <machine/cpu.h> 49 50 #include <mips/alchemy/include/aubusvar.h> 51 #include <mips/alchemy/include/aureg.h> 52 #include <mips/alchemy/dev/augpioreg.h> 53 #include <mips/alchemy/dev/augpiovar.h> 54 55 struct augpio_softc { 56 struct device sc_dev; 57 struct gpio_chipset_tag sc_gc; 58 gpio_pin_t sc_pins[AUGPIO_NPINS]; 59 int sc_npins; 60 int sc_isgpio2; 61 }; 62 63 static int augpio_pin_read(void *, int); 64 static void augpio_pin_write(void *, int, int); 65 static void augpio_pin_ctl(void *, int, int); 66 static int augpio_match(struct device *, struct cfdata *, void *); 67 static void augpio_attach(struct device *, struct device *, void *); 68 69 CFATTACH_DECL(augpio, sizeof(struct augpio_softc), 70 augpio_match, augpio_attach, NULL, NULL); 71 72 #define GETREG(x) \ 73 (*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) 74 #define PUTREG(x, v) \ 75 ((*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) = (v)) 76 77 static int augpio_found = 0; 78 79 int 80 augpio_match(struct device *parent, struct cfdata *match, void *aux) 81 { 82 struct aubus_attach_args *aa = (struct aubus_attach_args *)aux; 83 84 if (strcmp(aa->aa_name, "augpio") != 0) 85 return 0; 86 87 if (augpio_found) 88 return 0; 89 90 return 1; 91 } 92 93 void 94 augpio_attach(struct device *parent, struct device *self, void *aux) 95 { 96 int pin; 97 98 struct augpio_softc *sc = (struct augpio_softc *)self; 99 struct aubus_attach_args *aa = aux; 100 struct gpiobus_attach_args gba; 101 102 sc->sc_npins = 0; 103 104 printf(": Alchemy GPIO"); 105 if (aa->aa_addrs[0] == SYS_BASE) { 106 107 for (pin = 0; pin < aa->aa_addrs[1]; pin++) { 108 109 sc->sc_pins[sc->sc_npins].pin_num = pin; 110 sc->sc_pins[sc->sc_npins].pin_caps = 111 GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | 112 GPIO_PIN_TRISTATE; 113 sc->sc_pins[sc->sc_npins].pin_flags = 114 au_gpio_ctl(pin, 0); 115 sc->sc_pins[sc->sc_npins].pin_state = 116 au_gpio_read(pin); 117 sc->sc_npins++; 118 } 119 sc->sc_isgpio2 = 0; 120 printf(", primary block"); 121 122 } else if (aa->aa_addrs[0] == GPIO2_BASE) { 123 /* 124 * We rely on firmware (or platform init code) to initialize 125 * the GPIO2 block. We can't do it ourselves, because 126 * resetting the GPIO2 block can have nasty effects (e.g. 127 * reset PCI bus...) 128 */ 129 for (pin = 0; pin < aa->aa_addrs[1]; pin++) { 130 sc->sc_pins[sc->sc_npins].pin_num = pin; 131 sc->sc_pins[sc->sc_npins].pin_caps = 132 GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 133 sc->sc_pins[sc->sc_npins].pin_flags = 134 au_gpio2_ctl(pin, 0); 135 sc->sc_pins[sc->sc_npins].pin_state = 136 au_gpio2_read(pin); 137 sc->sc_npins++; 138 } 139 140 printf(", secondary block"); 141 sc->sc_isgpio2 = 1; 142 143 } else { 144 printf(", unidentified block"); 145 } 146 printf("\n"); 147 148 sc->sc_gc.gp_cookie = sc; 149 sc->sc_gc.gp_pin_read = augpio_pin_read; 150 sc->sc_gc.gp_pin_write = augpio_pin_write; 151 sc->sc_gc.gp_pin_ctl = augpio_pin_ctl; 152 153 gba.gba_gc = &sc->sc_gc; 154 gba.gba_pins = sc->sc_pins; 155 gba.gba_npins = sc->sc_npins; 156 157 config_found_ia(&sc->sc_dev, "gpiobus", &gba, gpiobus_print); 158 } 159 160 int 161 augpio_pin_read(void *arg, int pin) 162 { 163 struct augpio_softc *sc = arg; 164 165 return (sc->sc_isgpio2 ? au_gpio2_read(pin) : au_gpio_read(pin)); 166 } 167 168 void 169 augpio_pin_write(void *arg, int pin, int value) 170 { 171 struct augpio_softc *sc = arg; 172 173 if (sc->sc_isgpio2) 174 au_gpio2_write(pin, value); 175 else 176 au_gpio_write(pin, value); 177 } 178 179 void 180 augpio_pin_ctl(void *arg, int pin, int flags) 181 { 182 struct augpio_softc *sc = arg; 183 184 if (sc->sc_isgpio2) 185 (void) au_gpio2_ctl(pin, flags); 186 else 187 (void) au_gpio_ctl(pin, flags); 188 } 189 190 int 191 au_gpio_read(int pin) 192 { 193 194 pin = 1 << pin; 195 return ((GETREG(SYS_BASE + AUGPIO_SYS_PINSTATERD) & pin) ? 196 GPIO_PIN_HIGH : GPIO_PIN_LOW); 197 } 198 199 void 200 au_gpio_write(int pin, int value) 201 { 202 203 pin = 1 << pin; 204 if (value) { 205 PUTREG(SYS_BASE + AUGPIO_SYS_OUTPUTSET, pin); 206 } else { 207 PUTREG(SYS_BASE + AUGPIO_SYS_OUTPUTCLR, pin); 208 } 209 } 210 211 int 212 au_gpio_ctl(int pin, int flags) 213 { 214 uint32_t tri, out; 215 int old; 216 217 old = 0; 218 219 pin = 1 << pin; 220 tri = GETREG(SYS_BASE + AUGPIO_SYS_TRIOUTRD); 221 out = GETREG(SYS_BASE + AUGPIO_SYS_OUTPUTRD); 222 old = 0; 223 224 if (tri & pin) { 225 old |= GPIO_PIN_INPUT; 226 } else { 227 old |= GPIO_PIN_OUTPUT; 228 } 229 230 if (flags & (GPIO_PIN_TRISTATE|GPIO_PIN_INPUT)) { 231 PUTREG(SYS_BASE + AUGPIO_SYS_TRIOUTCLR, pin); 232 } else if (flags & GPIO_PIN_OUTPUT) { 233 if (pin & out) { 234 PUTREG(SYS_BASE + AUGPIO_SYS_OUTPUTSET, pin); 235 } else { 236 PUTREG(SYS_BASE + AUGPIO_SYS_OUTPUTCLR, pin); 237 } 238 } 239 240 return old; 241 } 242 243 int 244 au_gpio2_read(int pin) 245 { 246 247 pin = 1 << pin; 248 249 return ((GETREG(GPIO2_BASE + AUGPIO_GPIO2_PINSTATE) & pin) ? 250 GPIO_PIN_HIGH : GPIO_PIN_LOW); 251 } 252 253 void 254 au_gpio2_write(int pin, int value) 255 { 256 257 pin = 1 << pin; 258 259 if (value) { 260 PUTREG(GPIO2_BASE + AUGPIO_GPIO2_OUTPUT, (pin | (pin << 16))); 261 } else { 262 PUTREG(GPIO2_BASE + AUGPIO_GPIO2_OUTPUT, (pin << 16)); 263 } 264 } 265 266 int 267 au_gpio2_ctl(int pin, int flags) 268 { 269 uint32_t dir; 270 int old; 271 272 pin = 1 << pin; 273 274 dir = GETREG(GPIO2_BASE + AUGPIO_GPIO2_DIR); 275 old = dir; 276 277 if (dir & pin) { 278 old |= GPIO_PIN_OUTPUT; 279 } else { 280 old |= GPIO_PIN_INPUT; 281 } 282 283 if (flags & GPIO_PIN_INPUT) { 284 dir |= pin; 285 PUTREG(GPIO2_BASE + AUGPIO_GPIO2_DIR, pin); 286 } else if (flags & GPIO_PIN_OUTPUT) { 287 dir &= ~pin; 288 PUTREG(GPIO2_BASE + AUGPIO_GPIO2_DIR, pin); 289 } 290 291 return old; 292 } 293
Indexes created Tue Sep 23 22:09:46 GMT 2025