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augpio.c revision 1.3 
      1 /* $NetBSD: augpio.c,v 1.3 2006/02/18 23:21:06 gdamore Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2006 Itronix Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Garrett D'Amore for Itronix Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. The name of Itronix Inc. may not be used to endorse
     18  *    or promote products derived from this software without specific
     19  *    prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
     25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     28  * ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #include <sys/cdefs.h>
     35 __KERNEL_RCSID(0, "$NetBSD: augpio.c,v 1.3 2006/02/18 23:21:06 gdamore Exp $");
     36 
     37 #include <sys/types.h>
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/errno.h>
     41 #include <sys/device.h>
     42 #include <sys/gpio.h>
     43 #include <sys/kernel.h>
     44 
     45 #include <dev/gpio/gpiovar.h>
     46 
     47 #include <machine/bus.h>
     48 #include <machine/cpu.h>
     49 
     50 #include <mips/alchemy/include/aubusvar.h>
     51 #include <mips/alchemy/include/aureg.h>
     52 #include <mips/alchemy/dev/augpioreg.h>
     53 
     54 struct augpio_softc {
     55 	struct device			sc_dev;
     56 	struct gpio_chipset_tag		sc_gc;
     57 	gpio_pin_t			sc_pins[AUGPIO_NPINS];
     58 	int				sc_npins;
     59 	bus_space_tag_t			sc_bst;
     60 	bus_space_handle_t		sc_bsh;
     61 	int				sc_caps;
     62 	const char 			*sc_name;
     63 	int				(*sc_getctl)(void *, int);
     64 };
     65 
     66 static int augpio_read(void *, int);
     67 static void augpio_write(void *, int, int);
     68 static void augpio_ctl(void *, int, int);
     69 static int augpio_getctl(void *, int);
     70 
     71 static int augpio2_read(void *, int);
     72 static void augpio2_write(void *, int, int);
     73 static void augpio2_ctl(void *, int, int);
     74 static int augpio2_getctl(void *, int);
     75 
     76 static int augpio_match(struct device *, struct cfdata *, void *);
     77 static void augpio_attach(struct device *, struct device *, void *);
     78 
     79 CFATTACH_DECL(augpio, sizeof(struct augpio_softc),
     80     augpio_match, augpio_attach, NULL, NULL);
     81 
     82 #define	GETREG(x)	\
     83 	(*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x))
     84 #define	PUTREG(x, v)	\
     85 	((*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
     86 
     87 static int augpio_found = 0;
     88 
     89 int
     90 augpio_match(struct device *parent, struct cfdata *match, void *aux)
     91 {
     92 	struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
     93 
     94 	if (strcmp(aa->aa_name, "augpio") != 0)
     95 		return 0;
     96 
     97 	if (augpio_found)
     98 		return 0;
     99 
    100 	return 1;
    101 }
    102 
    103 void
    104 augpio_attach(struct device *parent, struct device *self, void *aux)
    105 {
    106 	int	pin;
    107 
    108 	struct augpio_softc *sc = (struct augpio_softc *)self;
    109 	struct aubus_attach_args *aa = aux;
    110 	struct gpiobus_attach_args gba;
    111 
    112 	sc->sc_bst = aa->aa_st;
    113 	sc->sc_npins = aa->aa_addrs[1];
    114 	sc->sc_gc.gp_cookie = sc;
    115 
    116 	if (aa->aa_addrs[0] == GPIO_BASE) {
    117 
    118 		if (bus_space_map(sc->sc_bst, aa->aa_addrs[0],
    119 			AUGPIO_SIZE, 0, &sc->sc_bsh) != 0) {
    120 			printf(": cannot map registers!\n");
    121 			return;
    122 		}
    123 		sc->sc_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
    124 		    GPIO_PIN_TRISTATE;
    125 		sc->sc_gc.gp_pin_read = augpio_read;
    126 		sc->sc_gc.gp_pin_write = augpio_write;
    127 		sc->sc_gc.gp_pin_ctl = augpio_ctl;
    128 		sc->sc_getctl = augpio_getctl;
    129 		sc->sc_name = "primary block";
    130 
    131 	} else if (aa->aa_addrs[0] == GPIO2_BASE) {
    132 		/*
    133 		 * We rely on firmware (or platform init code) to initialize
    134 		 * the GPIO2 block.  We can't do it ourselves, because
    135 		 * resetting the GPIO2 block can have nasty effects (e.g.
    136 		 * reset PCI bus...)
    137 		 */
    138 		if (bus_space_map(sc->sc_bst, aa->aa_addrs[0],
    139 			AUGPIO2_SIZE, 0, &sc->sc_bsh) != 0) {
    140 			printf(": cannot map registers!\n");
    141 			return;
    142 		}
    143 		sc->sc_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
    144 		sc->sc_gc.gp_pin_read = augpio2_read;
    145 		sc->sc_gc.gp_pin_write = augpio2_write;
    146 		sc->sc_gc.gp_pin_ctl = augpio2_ctl;
    147 		sc->sc_getctl = augpio2_getctl;
    148 		sc->sc_name = "secondary block";
    149 
    150 	} else {
    151 		printf(": unidentified block\n");
    152 		return;
    153 	}
    154 
    155 	for (pin = 0; pin < sc->sc_npins; pin++) {
    156 		gpio_pin_t	*pp = &sc->sc_pins[pin];
    157 
    158 		pp->pin_num = pin;
    159 		pp->pin_caps = sc->sc_caps;
    160 		pp->pin_flags = sc->sc_getctl(sc, pin);
    161 		pp->pin_state = sc->sc_gc.gp_pin_read(sc, pin);
    162 	}
    163 
    164 	gba.gba_gc = &sc->sc_gc;
    165 	gba.gba_pins = sc->sc_pins;
    166 	gba.gba_npins = sc->sc_npins;
    167 
    168 	printf(": Alchemy GPIO, %s\n", sc->sc_name);
    169 	config_found_ia(&sc->sc_dev, "gpiobus", &gba, gpiobus_print);
    170 }
    171 
    172 int
    173 augpio_read(void *arg, int pin)
    174 {
    175 	struct augpio_softc	*sc = arg;
    176 
    177 	pin = 1 << pin;
    178 
    179 	if (bus_space_read_4(sc->sc_bst, sc->sc_bsh, AUGPIO_PINSTATERD) & pin)
    180 		return GPIO_PIN_HIGH;
    181 	else
    182 		return GPIO_PIN_LOW;
    183 }
    184 
    185 void
    186 augpio_write(void *arg, int pin, int value)
    187 {
    188 	struct augpio_softc	*sc = arg;
    189 
    190 	pin = 1 << pin;
    191 	bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    192 	    value ? AUGPIO_OUTPUTSET : AUGPIO_OUTPUTCLR, pin);
    193 }
    194 
    195 void
    196 augpio_ctl(void *arg, int pin, int flags)
    197 {
    198 	struct augpio_softc	*sc = arg;
    199 	bus_addr_t		reg;
    200 
    201 	pin = 1 << pin;
    202 
    203 	if (flags & (GPIO_PIN_TRISTATE|GPIO_PIN_INPUT)) {
    204 		reg = AUGPIO_TRIOUTCLR;
    205 	} else if (flags & GPIO_PIN_OUTPUT) {
    206 		uint32_t		out;
    207 		out = bus_space_read_4(sc->sc_bst, sc->sc_bsh, AUGPIO_OUTPUTRD);
    208 		reg = pin & out ? AUGPIO_OUTPUTSET : AUGPIO_OUTPUTCLR;
    209 	} else {
    210 		return;
    211 	}
    212 
    213 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, pin);
    214 }
    215 
    216 int
    217 augpio_getctl(void *arg, int pin)
    218 {
    219 	struct augpio_softc	*sc = arg;
    220 
    221 	if (bus_space_read_4(sc->sc_bst, sc->sc_bsh, AUGPIO_TRIOUTRD) & pin)
    222 		return GPIO_PIN_OUTPUT;
    223 	else
    224 		return GPIO_PIN_INPUT;
    225 }
    226 
    227 int
    228 augpio2_read(void *arg, int pin)
    229 {
    230 	struct augpio_softc	*sc = arg;
    231 
    232 	pin = 1 << pin;
    233 
    234 	if (bus_space_read_4(sc->sc_bst, sc->sc_bsh, AUGPIO2_PINSTATE) & pin)
    235 		return GPIO_PIN_HIGH;
    236 	else
    237 		return GPIO_PIN_LOW;
    238 }
    239 
    240 void
    241 augpio2_write(void *arg, int pin, int value)
    242 {
    243 	struct augpio_softc	*sc = arg;
    244 
    245 	pin = 1 << pin;
    246 
    247 	if (value) {
    248 		pin = pin | (pin << 16);
    249 	} else {
    250 		pin = (pin << 16);
    251 	}
    252 
    253 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, AUGPIO2_OUTPUT, pin);
    254 }
    255 
    256 void
    257 augpio2_ctl(void *arg, int pin, int flags)
    258 {
    259 	struct augpio_softc	*sc = arg;
    260 	uint32_t		dir;
    261 
    262 	pin = 1 << pin;
    263 
    264 	dir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, AUGPIO2_DIR);
    265 
    266 	if (flags & GPIO_PIN_INPUT) {
    267 		dir |= pin;
    268 	} else if (flags & GPIO_PIN_OUTPUT) {
    269 		dir &= ~pin;
    270 	}
    271 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, AUGPIO2_DIR, dir);
    272 }
    273 
    274 int
    275 augpio2_getctl(void *arg, int pin)
    276 {
    277 	struct augpio_softc	*sc = arg;
    278 	uint32_t		dir;
    279 
    280 	pin = 1 << pin;
    281 
    282 	dir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, AUGPIO2_DIR);
    283 	if (dir & (uint32_t)pin) {
    284 		return GPIO_PIN_OUTPUT;
    285 	} else {
    286 		return GPIO_PIN_INPUT;
    287 	}
    288 }
    289 
    290