aupcmciavar.h revision 1.1 1 1.1 gdamore /* $NetBSD: aupcmciavar.h,v 1.1 2006/02/23 03:49:28 gdamore Exp $ */
2 1.1 gdamore
3 1.1 gdamore /*-
4 1.1 gdamore * Copyright (c) 2006 Itronix Inc.
5 1.1 gdamore * All rights reserved.
6 1.1 gdamore *
7 1.1 gdamore * Written by Garrett D'Amore for Itronix Inc.
8 1.1 gdamore *
9 1.1 gdamore * Redistribution and use in source and binary forms, with or without
10 1.1 gdamore * modification, are permitted provided that the following conditions
11 1.1 gdamore * are met:
12 1.1 gdamore * 1. Redistributions of source code must retain the above copyright
13 1.1 gdamore * notice, this list of conditions and the following disclaimer.
14 1.1 gdamore * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 gdamore * notice, this list of conditions and the following disclaimer in the
16 1.1 gdamore * documentation and/or other materials provided with the distribution.
17 1.1 gdamore * 3. The name of Itronix Inc. may not be used to endorse
18 1.1 gdamore * or promote products derived from this software without specific
19 1.1 gdamore * prior written permission.
20 1.1 gdamore *
21 1.1 gdamore * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
22 1.1 gdamore * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 1.1 gdamore * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 1.1 gdamore * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
25 1.1 gdamore * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 1.1 gdamore * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 1.1 gdamore * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 1.1 gdamore * ON ANY THEORY OF LIABILITY, WHETHER IN
29 1.1 gdamore * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 1.1 gdamore * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 1.1 gdamore * POSSIBILITY OF SUCH DAMAGE.
32 1.1 gdamore */
33 1.1 gdamore
34 1.1 gdamore #ifndef _MIPS_ALCHEMY_DEV_AUPCMCIAVAR_H
35 1.1 gdamore #define _MIPS_ALCHEMY_DEV_AUPCMCIAVAR_H
36 1.1 gdamore
37 1.1 gdamore #define AUPCMCIA_NWINS 16
38 1.1 gdamore #define AUPCMCIA_NSLOTS 2 /* current boards only have two slots */
39 1.1 gdamore
40 1.1 gdamore #define AUPCMCIA_IRQ_CARD 0
41 1.1 gdamore #define AUPCMCIA_IRQ_INSERT 1
42 1.1 gdamore #define AUPCMCIA_MAP_SIZE 16 * 1024 * 1024 /* arbitrary */
43 1.1 gdamore
44 1.1 gdamore struct aupcmcia_machdep {
45 1.1 gdamore int am_nslots;
46 1.1 gdamore bus_size_t (*am_slot_offset)(int);
47 1.1 gdamore int (*am_slot_irq)(int, int);
48 1.1 gdamore void (*am_slot_enable)(int);
49 1.1 gdamore void (*am_slot_disable)(int);
50 1.1 gdamore int (*am_slot_status)(int);
51 1.1 gdamore const char * (*am_slot_name)(int);
52 1.1 gdamore };
53 1.1 gdamore
54 1.1 gdamore /*
55 1.1 gdamore * Machdep code must implement this to supply its slot implementation
56 1.1 gdamore * details to the framework. The address
57 1.1 gdamore */
58 1.1 gdamore struct aupcmcia_machdep *aupcmcia_machdep(void);
59 1.1 gdamore
60 1.1 gdamore #endif /* _MIPS_ALCHEMY_DEV_AUPCIVAR_H */
61