aupsc.c revision 1.2 1 1.2 shige /* $NetBSD: aupsc.c,v 1.2 2006/03/06 17:15:03 shige Exp $ */
2 1.1 shige
3 1.1 shige /*-
4 1.1 shige * Copyright (c) 2006 Shigeyuki Fukushima.
5 1.1 shige * All rights reserved.
6 1.1 shige *
7 1.1 shige * Written by Shigeyuki Fukushima.
8 1.1 shige *
9 1.1 shige * Redistribution and use in source and binary forms, with or without
10 1.1 shige * modification, are permitted provided that the following conditions
11 1.1 shige * are met:
12 1.1 shige * 1. Redistributions of source code must retain the above copyright
13 1.1 shige * notice, this list of conditions and the following disclaimer.
14 1.1 shige * 2. Redistributions in binary form must reproduce the above
15 1.1 shige * copyright notice, this list of conditions and the following
16 1.1 shige * disclaimer in the documentation and/or other materials provided
17 1.1 shige * with the distribution.
18 1.1 shige * 3. The name of the author may not be used to endorse or promote
19 1.1 shige * products derived from this software without specific prior
20 1.1 shige * written permission.
21 1.1 shige *
22 1.1 shige * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
23 1.1 shige * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 1.1 shige * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 shige * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
26 1.1 shige * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 shige * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
28 1.1 shige * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.1 shige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 1.1 shige * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31 1.1 shige * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 1.1 shige * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 shige */
34 1.1 shige
35 1.1 shige #include <sys/cdefs.h>
36 1.2 shige __KERNEL_RCSID(0, "$NetBSD: aupsc.c,v 1.2 2006/03/06 17:15:03 shige Exp $");
37 1.1 shige
38 1.1 shige #include "locators.h"
39 1.1 shige
40 1.1 shige #include <sys/param.h>
41 1.1 shige #include <sys/systm.h>
42 1.1 shige #include <sys/device.h>
43 1.1 shige #include <sys/errno.h>
44 1.1 shige
45 1.1 shige #include <machine/bus.h>
46 1.1 shige #include <machine/cpu.h>
47 1.1 shige
48 1.1 shige #include <mips/alchemy/include/aubusvar.h>
49 1.1 shige #include <mips/alchemy/include/aureg.h>
50 1.1 shige #include <mips/alchemy/dev/aupscreg.h>
51 1.1 shige #include <mips/alchemy/dev/aupscvar.h>
52 1.2 shige #include <mips/alchemy/dev/smbusreg.h>
53 1.1 shige
54 1.1 shige struct aupsc_softc {
55 1.1 shige struct device sc_dev;
56 1.1 shige bus_space_tag_t sc_bust;
57 1.1 shige bus_space_handle_t sc_bush;
58 1.1 shige int sc_pscsel;
59 1.1 shige };
60 1.1 shige
61 1.1 shige const struct aupsc_proto {
62 1.1 shige const char *name;
63 1.2 shige int protocol;
64 1.2 shige int statreg;
65 1.2 shige int statbit;
66 1.1 shige } aupsc_protos [] = {
67 1.2 shige { "ausmbus", AUPSC_SEL_SMBUS, AUPSC_SMBSTAT, SMBUS_STAT_SR },
68 1.1 shige #if 0
69 1.1 shige { "auaudio" },
70 1.1 shige { "aui2s" },
71 1.1 shige { "ausmbus" },
72 1.1 shige { "auspi" },
73 1.1 shige #endif
74 1.2 shige { NULL, AUPSC_SEL_DISABLE, 0, 0 }
75 1.1 shige };
76 1.1 shige
77 1.1 shige static int aupsc_match(struct device *, struct cfdata *, void *);
78 1.1 shige static void aupsc_attach(struct device *, struct device *, void *);
79 1.2 shige static int aupsc_submatch(struct device *, struct cfdata *, const int *,
80 1.2 shige void *);
81 1.2 shige static int aupsc_print(void *, const char *);
82 1.2 shige
83 1.2 shige static void aupsc_enable(void *, int);
84 1.2 shige static void aupsc_disable(void *);
85 1.2 shige static void aupsc_suspend(void *);
86 1.2 shige
87 1.1 shige
88 1.1 shige CFATTACH_DECL(aupsc, sizeof(struct aupsc_softc),
89 1.1 shige aupsc_match, aupsc_attach, NULL, NULL);
90 1.1 shige
91 1.1 shige static int
92 1.1 shige aupsc_match(struct device *parent, struct cfdata *cf, void *aux)
93 1.1 shige {
94 1.1 shige struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
95 1.1 shige
96 1.1 shige if (strcmp(aa->aa_name, cf->cf_name) != 0)
97 1.1 shige return 0;
98 1.1 shige
99 1.1 shige return 1;
100 1.1 shige }
101 1.1 shige
102 1.1 shige static void
103 1.1 shige aupsc_attach(struct device *parent, struct device *self, void *aux)
104 1.1 shige {
105 1.1 shige int i;
106 1.1 shige uint32_t rv;
107 1.1 shige struct aupsc_softc *sc = (struct aupsc_softc *)self;
108 1.1 shige struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
109 1.1 shige struct aupsc_attach_args pa;
110 1.2 shige struct aupsc_controller ctrl;
111 1.1 shige
112 1.1 shige sc->sc_bust = aa->aa_st;
113 1.1 shige if (bus_space_map(sc->sc_bust, aa->aa_addr,
114 1.1 shige AUPSC_SIZE, 0, &sc->sc_bush) != 0) {
115 1.1 shige aprint_normal(": unable to map device registers\n");
116 1.1 shige return;
117 1.1 shige }
118 1.1 shige
119 1.1 shige /* Initialize PSC_SEL register */
120 1.1 shige sc->sc_pscsel = AUPSC_SEL_DISABLE;
121 1.1 shige rv = bus_space_read_4(sc->sc_bust, sc->sc_bush, AUPSC_SEL);
122 1.1 shige bus_space_write_4(sc->sc_bust, sc->sc_bush,
123 1.1 shige AUPSC_SEL, (rv & AUPSC_SEL_PS(AUPSC_SEL_DISABLE)));
124 1.2 shige bus_space_write_4(sc->sc_bust, sc->sc_bush,
125 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_DISABLE));
126 1.1 shige
127 1.1 shige aprint_normal(": Alchemy PSC\n");
128 1.1 shige
129 1.2 shige ctrl.psc_bust = sc->sc_bust;
130 1.2 shige ctrl.psc_bush = sc->sc_bush;
131 1.2 shige ctrl.psc_sel = &(sc->sc_pscsel);
132 1.2 shige ctrl.psc_enable = aupsc_enable;
133 1.2 shige ctrl.psc_disable = aupsc_disable;
134 1.2 shige ctrl.psc_suspend = aupsc_suspend;
135 1.2 shige pa.aupsc_ctrl = ctrl;
136 1.2 shige
137 1.1 shige for (i = 0 ; aupsc_protos[i].name != NULL ; i++) {
138 1.2 shige struct aupsc_protocol_device p;
139 1.2 shige uint32_t s;
140 1.2 shige
141 1.1 shige pa.aupsc_name = aupsc_protos[i].name;
142 1.1 shige
143 1.2 shige p.sc_dev = sc->sc_dev;
144 1.2 shige p.sc_ctrl = ctrl;
145 1.2 shige
146 1.2 shige aupsc_enable(&p, aupsc_protos[i].protocol);
147 1.2 shige s = bus_space_read_4(sc->sc_bust, sc->sc_bush,
148 1.2 shige aupsc_protos[i].statreg);
149 1.2 shige aupsc_disable(&p);
150 1.2 shige
151 1.2 shige if (s & aupsc_protos[i].statbit) {
152 1.2 shige (void) config_found_sm_loc(self, "aupsc", NULL,
153 1.2 shige &pa, aupsc_print, aupsc_submatch);
154 1.2 shige }
155 1.1 shige }
156 1.1 shige }
157 1.1 shige
158 1.1 shige static int
159 1.1 shige aupsc_submatch(struct device *parent, struct cfdata *cf,
160 1.1 shige const int *ldesc, void *aux)
161 1.1 shige {
162 1.1 shige
163 1.1 shige return config_match(parent, cf, aux);
164 1.1 shige }
165 1.1 shige
166 1.1 shige static int
167 1.1 shige aupsc_print(void *aux, const char *pnp)
168 1.1 shige {
169 1.1 shige struct aupsc_attach_args *pa = aux;
170 1.1 shige
171 1.1 shige if (pnp)
172 1.1 shige aprint_normal("%s at %s", pa->aupsc_name, pnp);
173 1.1 shige
174 1.1 shige return UNCONF;
175 1.1 shige }
176 1.2 shige
177 1.2 shige static void
178 1.2 shige aupsc_enable(void *arg, int proto)
179 1.2 shige {
180 1.2 shige struct aupsc_protocol_device *sc = arg;
181 1.2 shige
182 1.2 shige /* XXX: (TODO) setting clock AUPSC_SEL_CLK */
183 1.2 shige switch (proto) {
184 1.2 shige case AUPSC_SEL_SPI:
185 1.2 shige case AUPSC_SEL_I2S:
186 1.2 shige case AUPSC_SEL_AC97:
187 1.2 shige case AUPSC_SEL_SMBUS:
188 1.2 shige break;
189 1.2 shige case AUPSC_SEL_DISABLE:
190 1.2 shige aupsc_disable(arg);
191 1.2 shige break;
192 1.2 shige default:
193 1.2 shige printf("%s: aupsc_enable: unsupported protocol.\n",
194 1.2 shige sc->sc_dev.dv_xname);
195 1.2 shige return;
196 1.2 shige }
197 1.2 shige
198 1.2 shige if (*(sc->sc_ctrl.psc_sel) != AUPSC_SEL_DISABLE) {
199 1.2 shige printf("%s: aupsc_enable: please disable first.\n",
200 1.2 shige sc->sc_dev.dv_xname);
201 1.2 shige return;
202 1.2 shige }
203 1.2 shige
204 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
205 1.2 shige AUPSC_SEL, AUPSC_SEL_PS(proto));
206 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
207 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_ENABLE));
208 1.2 shige delay(1);
209 1.2 shige }
210 1.2 shige
211 1.2 shige static void
212 1.2 shige aupsc_disable(void *arg)
213 1.2 shige {
214 1.2 shige struct aupsc_protocol_device *sc = arg;
215 1.2 shige
216 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
217 1.2 shige AUPSC_SEL, AUPSC_SEL_PS(AUPSC_SEL_DISABLE));
218 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
219 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_DISABLE));
220 1.2 shige delay(1);
221 1.2 shige }
222 1.2 shige
223 1.2 shige static void
224 1.2 shige aupsc_suspend(void *arg)
225 1.2 shige {
226 1.2 shige struct aupsc_protocol_device *sc = arg;
227 1.2 shige
228 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
229 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_SUSPEND));
230 1.2 shige delay(1);
231 1.2 shige }
232