aupsc.c revision 1.7 1 1.7 kiyohara /* $NetBSD: aupsc.c,v 1.7 2012/01/03 07:36:02 kiyohara Exp $ */
2 1.1 shige
3 1.1 shige /*-
4 1.1 shige * Copyright (c) 2006 Shigeyuki Fukushima.
5 1.1 shige * All rights reserved.
6 1.1 shige *
7 1.1 shige * Written by Shigeyuki Fukushima.
8 1.1 shige *
9 1.1 shige * Redistribution and use in source and binary forms, with or without
10 1.1 shige * modification, are permitted provided that the following conditions
11 1.1 shige * are met:
12 1.1 shige * 1. Redistributions of source code must retain the above copyright
13 1.1 shige * notice, this list of conditions and the following disclaimer.
14 1.1 shige * 2. Redistributions in binary form must reproduce the above
15 1.1 shige * copyright notice, this list of conditions and the following
16 1.1 shige * disclaimer in the documentation and/or other materials provided
17 1.1 shige * with the distribution.
18 1.1 shige * 3. The name of the author may not be used to endorse or promote
19 1.1 shige * products derived from this software without specific prior
20 1.1 shige * written permission.
21 1.1 shige *
22 1.1 shige * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
23 1.1 shige * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 1.1 shige * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 shige * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
26 1.1 shige * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 shige * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
28 1.1 shige * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.1 shige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 1.1 shige * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31 1.1 shige * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 1.1 shige * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 shige */
34 1.1 shige
35 1.1 shige #include <sys/cdefs.h>
36 1.7 kiyohara __KERNEL_RCSID(0, "$NetBSD: aupsc.c,v 1.7 2012/01/03 07:36:02 kiyohara Exp $");
37 1.1 shige
38 1.1 shige #include "locators.h"
39 1.1 shige
40 1.1 shige #include <sys/param.h>
41 1.1 shige #include <sys/systm.h>
42 1.1 shige #include <sys/device.h>
43 1.1 shige #include <sys/errno.h>
44 1.1 shige
45 1.6 dyoung #include <sys/bus.h>
46 1.1 shige #include <machine/cpu.h>
47 1.1 shige
48 1.1 shige #include <mips/alchemy/include/aubusvar.h>
49 1.1 shige #include <mips/alchemy/include/aureg.h>
50 1.1 shige #include <mips/alchemy/dev/aupscreg.h>
51 1.1 shige #include <mips/alchemy/dev/aupscvar.h>
52 1.4 shige #include <mips/alchemy/dev/ausmbus_pscreg.h>
53 1.1 shige
54 1.1 shige struct aupsc_softc {
55 1.7 kiyohara device_t sc_dev;
56 1.1 shige bus_space_tag_t sc_bust;
57 1.1 shige bus_space_handle_t sc_bush;
58 1.1 shige int sc_pscsel;
59 1.1 shige };
60 1.1 shige
61 1.1 shige const struct aupsc_proto {
62 1.1 shige const char *name;
63 1.2 shige int protocol;
64 1.1 shige } aupsc_protos [] = {
65 1.5 gdamore { "ausmbus", AUPSC_SEL_SMBUS },
66 1.5 gdamore { "auspi", AUPSC_SEL_SPI },
67 1.1 shige #if 0
68 1.1 shige { "auaudio" },
69 1.1 shige { "aui2s" },
70 1.1 shige #endif
71 1.5 gdamore { NULL, AUPSC_SEL_DISABLE }
72 1.1 shige };
73 1.1 shige
74 1.7 kiyohara static int aupsc_match(device_t, struct cfdata *, void *);
75 1.7 kiyohara static void aupsc_attach(device_t, device_t, void *);
76 1.7 kiyohara static int aupsc_submatch(device_t, struct cfdata *, const int *, void *);
77 1.2 shige static int aupsc_print(void *, const char *);
78 1.2 shige
79 1.2 shige static void aupsc_enable(void *, int);
80 1.2 shige static void aupsc_disable(void *);
81 1.2 shige static void aupsc_suspend(void *);
82 1.2 shige
83 1.1 shige
84 1.7 kiyohara CFATTACH_DECL_NEW(aupsc, sizeof(struct aupsc_softc),
85 1.1 shige aupsc_match, aupsc_attach, NULL, NULL);
86 1.1 shige
87 1.1 shige static int
88 1.7 kiyohara aupsc_match(device_t parent, struct cfdata *cf, void *aux)
89 1.1 shige {
90 1.1 shige struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
91 1.1 shige
92 1.1 shige if (strcmp(aa->aa_name, cf->cf_name) != 0)
93 1.1 shige return 0;
94 1.1 shige
95 1.1 shige return 1;
96 1.1 shige }
97 1.1 shige
98 1.1 shige static void
99 1.7 kiyohara aupsc_attach(device_t parent, device_t self, void *aux)
100 1.1 shige {
101 1.1 shige int i;
102 1.1 shige uint32_t rv;
103 1.7 kiyohara struct aupsc_softc *sc = device_private(self);
104 1.1 shige struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
105 1.1 shige struct aupsc_attach_args pa;
106 1.2 shige struct aupsc_controller ctrl;
107 1.1 shige
108 1.7 kiyohara sc->sc_dev = self;
109 1.1 shige sc->sc_bust = aa->aa_st;
110 1.1 shige if (bus_space_map(sc->sc_bust, aa->aa_addr,
111 1.1 shige AUPSC_SIZE, 0, &sc->sc_bush) != 0) {
112 1.7 kiyohara aprint_error(": unable to map device registers\n");
113 1.1 shige return;
114 1.1 shige }
115 1.1 shige
116 1.1 shige /* Initialize PSC_SEL register */
117 1.1 shige sc->sc_pscsel = AUPSC_SEL_DISABLE;
118 1.1 shige rv = bus_space_read_4(sc->sc_bust, sc->sc_bush, AUPSC_SEL);
119 1.1 shige bus_space_write_4(sc->sc_bust, sc->sc_bush,
120 1.1 shige AUPSC_SEL, (rv & AUPSC_SEL_PS(AUPSC_SEL_DISABLE)));
121 1.2 shige bus_space_write_4(sc->sc_bust, sc->sc_bush,
122 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_DISABLE));
123 1.1 shige
124 1.1 shige aprint_normal(": Alchemy PSC\n");
125 1.7 kiyohara aprint_naive("\n");
126 1.1 shige
127 1.2 shige ctrl.psc_bust = sc->sc_bust;
128 1.2 shige ctrl.psc_bush = sc->sc_bush;
129 1.2 shige ctrl.psc_sel = &(sc->sc_pscsel);
130 1.2 shige ctrl.psc_enable = aupsc_enable;
131 1.2 shige ctrl.psc_disable = aupsc_disable;
132 1.2 shige ctrl.psc_suspend = aupsc_suspend;
133 1.2 shige pa.aupsc_ctrl = ctrl;
134 1.5 gdamore pa.aupsc_addr = aa->aa_addr;
135 1.5 gdamore pa.aupsc_irq = aa->aa_irq[0];
136 1.2 shige
137 1.1 shige for (i = 0 ; aupsc_protos[i].name != NULL ; i++) {
138 1.2 shige struct aupsc_protocol_device p;
139 1.2 shige uint32_t s;
140 1.2 shige
141 1.1 shige pa.aupsc_name = aupsc_protos[i].name;
142 1.1 shige
143 1.2 shige p.sc_dev = sc->sc_dev;
144 1.2 shige p.sc_ctrl = ctrl;
145 1.2 shige
146 1.2 shige aupsc_enable(&p, aupsc_protos[i].protocol);
147 1.5 gdamore s = bus_space_read_4(sc->sc_bust, sc->sc_bush, AUPSC_STAT);
148 1.2 shige aupsc_disable(&p);
149 1.2 shige
150 1.5 gdamore if (s & AUPSC_STAT_SR) {
151 1.2 shige (void) config_found_sm_loc(self, "aupsc", NULL,
152 1.2 shige &pa, aupsc_print, aupsc_submatch);
153 1.2 shige }
154 1.1 shige }
155 1.1 shige }
156 1.1 shige
157 1.1 shige static int
158 1.7 kiyohara aupsc_submatch(device_t parent, struct cfdata *cf, const int *ldesc, void *aux)
159 1.1 shige {
160 1.1 shige
161 1.1 shige return config_match(parent, cf, aux);
162 1.1 shige }
163 1.1 shige
164 1.1 shige static int
165 1.1 shige aupsc_print(void *aux, const char *pnp)
166 1.1 shige {
167 1.5 gdamore /*
168 1.5 gdamore * By default we don't want to print anything, because
169 1.5 gdamore * otherwise we see complaints about protocols that aren't
170 1.5 gdamore * configured on every port. (E.g. each PSC can support 4
171 1.5 gdamore * protocols, but on a typical design, only one protocol can
172 1.5 gdamore * be configured per board.)
173 1.5 gdamore *
174 1.5 gdamore * Basically, this whole thing should be replaced with an
175 1.5 gdamore * indirect configuration mechanism. Direct configuration
176 1.5 gdamore * doesn't make sense when we absolutely require kernel
177 1.5 gdamore * configuration to operate.
178 1.5 gdamore *
179 1.5 gdamore * Alternatively, a board-specific configuration mechanism
180 1.5 gdamore * could determine this, and provide direct configuration as
181 1.5 gdamore * we do for PCMCIA.
182 1.5 gdamore */
183 1.1 shige
184 1.5 gdamore return QUIET;
185 1.1 shige }
186 1.2 shige
187 1.2 shige static void
188 1.2 shige aupsc_enable(void *arg, int proto)
189 1.2 shige {
190 1.2 shige struct aupsc_protocol_device *sc = arg;
191 1.5 gdamore int i;
192 1.2 shige
193 1.2 shige /* XXX: (TODO) setting clock AUPSC_SEL_CLK */
194 1.2 shige switch (proto) {
195 1.2 shige case AUPSC_SEL_SPI:
196 1.2 shige case AUPSC_SEL_I2S:
197 1.2 shige case AUPSC_SEL_AC97:
198 1.2 shige case AUPSC_SEL_SMBUS:
199 1.2 shige break;
200 1.2 shige case AUPSC_SEL_DISABLE:
201 1.2 shige aupsc_disable(arg);
202 1.2 shige break;
203 1.2 shige default:
204 1.2 shige printf("%s: aupsc_enable: unsupported protocol.\n",
205 1.7 kiyohara device_xname(sc->sc_dev));
206 1.2 shige return;
207 1.2 shige }
208 1.2 shige
209 1.2 shige if (*(sc->sc_ctrl.psc_sel) != AUPSC_SEL_DISABLE) {
210 1.2 shige printf("%s: aupsc_enable: please disable first.\n",
211 1.7 kiyohara device_xname(sc->sc_dev));
212 1.2 shige return;
213 1.2 shige }
214 1.2 shige
215 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
216 1.2 shige AUPSC_SEL, AUPSC_SEL_PS(proto));
217 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
218 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_ENABLE));
219 1.5 gdamore
220 1.5 gdamore /* wait up to a whole second, but test every 10us */
221 1.5 gdamore for (i = 1000000; i; i -= 10) {
222 1.5 gdamore if (bus_space_read_4(sc->sc_ctrl.psc_bust,
223 1.5 gdamore sc->sc_ctrl.psc_bush, AUPSC_STAT) & AUPSC_STAT_SR)
224 1.5 gdamore return;
225 1.5 gdamore delay(10);
226 1.5 gdamore }
227 1.2 shige }
228 1.2 shige
229 1.2 shige static void
230 1.2 shige aupsc_disable(void *arg)
231 1.2 shige {
232 1.2 shige struct aupsc_protocol_device *sc = arg;
233 1.2 shige
234 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
235 1.2 shige AUPSC_SEL, AUPSC_SEL_PS(AUPSC_SEL_DISABLE));
236 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
237 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_DISABLE));
238 1.2 shige delay(1);
239 1.2 shige }
240 1.2 shige
241 1.2 shige static void
242 1.2 shige aupsc_suspend(void *arg)
243 1.2 shige {
244 1.2 shige struct aupsc_protocol_device *sc = arg;
245 1.2 shige
246 1.2 shige bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
247 1.2 shige AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_SUSPEND));
248 1.2 shige delay(1);
249 1.2 shige }
250